msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 1 MC68HC908GP32 User Bootloader 1 ********************************************************* ****************** 2 ********************************************************* ****************** 3 ** MegasquirtnSpark - extra + enhanced 4 ** by James Murray (james@nscc.info) 5 ** and Phil Ringwood (philip.ringwood@ntlworld.com) 6 ** 7 ** IMPORTANT!!! Complain to us, not the orignal authors whose code we have used. 8 ** 9 ** 10 ** Adds lots of new features, see the website for details 11 ** http://megasquirt.sourceforge.net/extra 12 ** 13 ** 006 looks ok on stim. Simulated crank signal on middle LED 14 ** coil outputs on top and bottom 15 ** 007 - make simulator a config option. Can only be changed at compile time 16 ** at present. May need to implement paged tables in future. 17 ** 008 - added 'S' signature command 18 ** called it MSnS-extra009 - software config of code type via Megatune 19 ** userdefined can choose between MSnS / Neon with or without crank simulator 20 ** 21 ** Think coila and coilb are transposed for some reason? FIXED 22 ** 010 fix bug that caused MSnS mode not to work. Interrupt disarm/re-arm 23 ** was half implemented 24 ** 011 add initial support for 36-1 and 60-2 wheels (simulators) 25 ** 012 jumped onto multiple tables 26 ** VE tables+req fuel will be flash or RAM. All other constants flash only 27 ** Initial page allocation: 0 variables ; 1,2 fuel ; 3 spark 28 ** 012d try spark as 10x10. Not yet supported by MT so put back to 8x8 29 ** 013 start rolling in DT code - pretty radical changes!! 30 ** 014 Extended spark table to 12x12. OK on scope. Injectors to fix. 31 ** 014b no. squirts + mode always from table 1. Alternati ng only in single table. 32 ** 014c Added 10deg timing offset and start of EDIS support 33 ** 014d fixed up rev limiters. dropped cool off period and removed duplication 34 ** 014e work on 36-1 decoder 35 ** 014f fix up FIDLE spark output 36 ** 014h kpa fix by Phil 37 ** 015b changes to DT mode selection 38 ** (changelog continues lower) 39 ********************************************************* msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 2 MC68HC908GP32 User Bootloader ****************** 40 ********************************************************* ****************** 41 ********************************************************* ****************** 42 ** Added MSnS-Enhanced functions to James' MSnS-Extra - P Ringwood 43 ** (Aug 2004) 44 ** 45 ** I/O Structure: 46 ** 47 ** X0 - Flyback 48 ** X1 - Flyback 49 ** X2 - Water Injection Pump Output 50 ** X3 - Water Injection Pulsed Output @ Injector #2 rate 51 ** X4 - Output 1 52 ** X5 - Output 2 53 ** X6 - EGT Input (0-5V) 54 ** X7 - Fuel Pressure Input (0-5V) 55 ** 56 ** TOMI HEADER JP1 57 ** Pin 4 - Launch control Input (Low Active) 58 ** pin 5 - Knock Input (Low Active) 59 ** pin 6 - NOS System Feedback (low active) 60 ** 61 ** Added knock detection system: See help file for details or the 62 ** knock part of the code 63 ** Knock detected on pin 5 of the HEADER TOM (JP1) when it is low it 64 ** detects a knock 65 ** 66 ** Added an Ignition Advance relative to Coolant temp 67 ** 68 ** The Launch Control has been Modified with an idea by Matt, now you 69 ** have the option of a variable hard cut rev limit point. If its 70 ** selected in MT then the rpm the engine is running at when the 71 ** launch button/switch is pressed is set as the hard limit. this 72 ** is to enable you to alter the setting at the track without having 73 ** to get the laptop out. I wouldnt recommend this with a clutch switch 74 ** as every time you put your foot on the clutch it will take in the 75 ** rpm and use that as the limit, I would use a thumb switch or 76 ** something similar as the launch switch. 77 ** 78 ** If you dont like it just select it off in MT:-) 79 ** 80 ** Added an Over boost protection rev cut and soft cut settings 81 ** msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 3 MC68HC908GP32 User Bootloader 82 ** Added Water Injection Control comes on when IAT and boost above 83 ** set-points 84 ** Water pump output (X2) Pulsed output @ injector #2 rate to fast 85 ** acting solenoid (X3) 86 ** 87 ** Added fuel pressure monitoring (X7) and EGT monitoring (X6) 88 ** 89 ** Added Target AFR's (Dave Edge's Code) <45KPa >90KPa (Full closed 90 ** loop mode) 91 ** 92 ** Added Ignition Retard with IAT temperature at a rate of 93 ** 1 degree retard / user defined degrees of IAT (thanks to Eric 94 ** for his help) 95 ** 96 ** KPa open loop for O2 added, optional between Throttle or KPa 97 ** Throttle Position Open loop is now adjustable. 98 ** N.B. Only works when not in "Target AFR Mode" 99 ********************************************************* ****************** 100 * 015c Weird spark and irq led glitch that has been present for a number of 101 * releases now 99% fixed with some tweaks to TIMERROLL 102 * Cranking advance calc fixed (was 10deg offset) 103 * 015d Make high/low speed spark calc based on cycle time not fixed rpm so 104 * it works at the right set point for any number of cylinders 105 * Support for 1-8 cylinders even-fire now. 9+ don't work 106 * Made ve1x,2,3 into macro instead of subroutine to save a little stack. 107 * 015d4 Try to optimise 8,10,12,16. Assume 9,11,13,14,15 illegal. 108 * 015d5 Rectify some spark calc errors to do with 10deg offset 109 * 015e Move code to 8MHz (altered burner.asm too) 110 * 015e1,2 Add EDIS support (timing 1-2 retarded at low advance for some reason) 111 * 015e3 Dual EDIS 112 * 015e4 some fixes by PR 113 * 016 Added Fan control from MSnEDIS. Left retard input for now. 114 * 017a Changed from "A" = 31 back to 25 and added "a" = 31 for enhancements 115 * 017b Added seperate fuel and spark cut selections for launch and revlimiter 116 * also option for the base number to cut sparks from. - PR 117 * 017c Added Roger Enns' Staging Injection System - PR 118 * 017d Changed the Barometric Correction so as it can msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 4 MC68HC908GP32 User Bootloader be set to a max KPa and 119 * a min KPa value, incase of a processor reset during running. - PR 120 * 017e Bug fix for PW1 in DT Mode 121 * Added a second O2 sensor option to run EGO on VE Table2 122 * and page2 enrichments. - PR 123 * 017e1 Added fuel and or spark cut to over boost protection - PR 124 * 017e2 Added cli to P and B SCI routines to help stumbles when using MT 125 * 017e3 ?????? 126 * 017e4 Boost Control check added before doing output1 as same pin used - PR 127 * 017e5 Tidied up some DT functions (ASECnt EgoCnt) - PR 128 * 017e6 Added NOS Anti-turbolag - PR 129 * 018 Added another 12x12 spark table. Can be used with NOS or Just 130 * with JP1 Pin6 input, this can be switched in on the run. -PR 131 * 018a Changes to Neon code to keep ign outputs on right channel 132 * 018b (aborted changes to Neon code to make 24bit hi-res timer) 133 * 018c Changes to TIMERROLL. Just add on 0.1ms to current value. 134 * 018d More optimisation on cycle calcs in TIMERROLL to speed it up 135 * 018e Moved NOS and Staging PW checks to main routine - PR 136 * 018f Added adjustable timer for Spark Table 2 to cut in at after input on. - PR 137 * 018g Can turn off Magnus' false trigger fix (test option) 138 * 019 Added to VE table 1 to make it 11x11 - PR 139 * 019a Went to 12x12 for VE table1 - PR 140 * 019b Both VE tables now 12x12 - PR 141 * 019c Idle PWM Bug fix. Added a window operation to the Outputs 1 and 2 - PR 142 * 019d Changes to Target AFR, to allow tps to change target when MAP >90KPa 143 * Also added VE table 3 for use with the extra Spark Table - PR 144 * 020 Changes to target afrs so now it has user setpoints for the KPa points. 145 * Increased pages to 8, removed page8 = 0 as per James' instructions - PR 146 * 020a Made output duty cycle configurable 50%/75% Mod to EDIS so 147 * "zero delay" is now 64us I found the output unreliable before. 148 * 020a1 Change to EDIS multispark mode. 2048us always sent during crank 149 * (fixed 10BTDC) 150 * 020b Added 12x12 afr target table to both VE tables 1 and 3. 151 * Removed D.Edge's Targets - PR 152 * 020c Bug fix for prime pulse, was always 25.5mS. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 5 MC68HC908GP32 User Bootloader Added priming pulse 153 * after 2 seconds 154 * option and Prime pump without prime pulse and 2 x priming pulses 155 * option. - PR 156 * 020d Anti-Rev System added, crude Traction Control. - PR 157 * 020e Refined Anti-Rev system, fixed a few bugs in it, working well 158 * on stim - PR 159 * 020f Bug fixes to Boost Controller - PR 160 * 020g We think 12x12 AFR targets is confusing, so brought it down to 8x8. 161 * Added RPM to Boost Controller and Knock can now remove boost 162 * via Boost conroller - PR 163 * 020h Optimisation of the header file for the enhanced stuff, to stop 164 * stack over writing - PR 165 * 020i Rolled JSM strand 020a+020a1 into this release. Added multi-spark 166 * set point 167 * 020j True (crude) dwell control for MSnS needs more testing 168 * Next cylinder mode if < 20 deg trigger angle. Part way to TFI. 169 * 020k Some changes to the Anti-Rev system - PR 170 * 020m Now Anti-Rev has a counter for counting engine cycles - PR 171 * 020n Changes to make the AFR target in AFR rather than volts - PR 172 * 020o Reorganised position of AFR inc files, added speed inputs and 173 * calculations to Anti-Rev - PR 174 * 020p Removed all WB inc files, no need to have incs MT can do it now. 175 * Also changed the outputs so as all can be inverted, should have 176 * done this a while ago. 177 * 020p1 Added page zero check and reload all the feature bits - JSM 178 * 020p2 Removed wheel ENcoders. Accel/decel ctime correction in DOSQUIRT 179 * At high rpm dwell period reduces to minimum 0.2ms off time 180 * Changed output state in bootload and stall mode to avoid 181 * overheating coil - JSM 182 * 020p3 (ignore testing stack) 183 * 020p4 Traction and AFR changes - PR 184 * 020q 7pin HEI - JSM 185 * 020r Removed toothsync, ignore_small,HoldSpark variables. See notes in .h 186 * Changes to Neon for low speed 187 * 020r3 Continue Neon (works) 188 * 020r4 Added Megaview fix to 'A' command 189 * 020s Added ability to switch to targets above tps setpoint and Alpha-n. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 6 MC68HC908GP32 User Bootloader 190 * Re-organised Spark Angle Additions to clear a byte from the h 191 * file and limits minimum angle to MSnS or 192 * Edis limit - PR 193 * 020t Combined 020s and 020r branches. Took out some of the limits 194 * from 020s as it didn't work? 195 * 020t1 Fixed the Limits in subracting nos, etc, angles (BCS rather than 196 * BMI, thanks James) - Phil 197 * 020t2 Bug fix to the Shift Light code. - Phil 198 * 020t3 PWM idle warmup open loop 199 * 020t4 Cranking mode blocked until stall or restart (For low rpm rock 200 * climbers) 201 * 020i1 turn off DOSQUIRT cli, interrupt protection in TIMERROLL 202 * 020i2 turn off TIMERROLL cli 203 * 020i3 Bandaid for rpmp/rpmc calc to stop drop to zero. MV fix 204 * 020i4 Undid i2 change 205 * 020i5 Check to see if we missed a 0.1ms int during 0.1ms, if we did 206 * then repeat section 207 * 020i6 Removed i3 bandaid. Added hi speed/low spd LED 208 * 020i7 Changed hi/low speed calc to MSnS style rpm based 209 * 020i7a Commented 'ACK IRQ' in TIMERROLL - fixed stumble?!?!?!?!?! 210 * No spikes visible. 211 * 020i8 Revert to ctime based hi/low selection. Keep ACK commented. 212 * 020i9 Fixed real issue, I'd changed re-enabling around RPMLOWBYTECHK, 213 * put back to std) 214 * 020u Included all fixes from 020i9 215 * 020v Try to support Page Chunk write 216 * 020v1 Small boost controller changes (Matt Dupuis idea) 217 * 020v2 Added interpolated allowable traction slip and traction indicator 218 * to OUTPUTS - PR 219 * 020v3 Fixed up chunk write "X" command. 220 * 020v4 Added hysterisis to outputs 1 and 2 - Phil 221 * 020w Added two new tables for 3d mapped boost control 222 * 020w1 Textual config error messages 223 * 020w2 Looking at Neon mode. Fixed silly error in .asm + .h 224 * 020w3 Boost controller changes 225 * 020w4 Make flood clear TPS setting configurable 226 * 020w5 Rolled out NOS and Knock subraction of angles and BCS changes 227 * to cure int miss - PR 228 * 021 new version number. Changed signature. 229 * 021a Timing angle error crept in at 020w5. Fixed. 230 * 021b Added 1 second delay before cant_crank applied. Stall timer now 231 * 0.25s if not cranking. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 7 MC68HC908GP32 User Bootloader 232 * 021c Send the ports a-d in realtime data 233 * 021d Added facility to cut decel enrichment when above user setpoint 234 * in KPa, and added timer to over run - PR 235 * 021e Added 300 KPa sensor capability - PR 236 * 021f Make 7.37MHz again for MV testing, only partial change. 0.1ms 237 * and EDIS calc untouched 238 * 021f1 Back to 8MHz. Code now sets MV mode if we receive an 'A' command. 239 * Then W is ignored 240 * to save corrupting data and V returns 125 zeros. 241 * 021f2 Make Megaview emuluation mode the default until S,P,R,X received 242 * 021f3 Increase running stall timeout to 0.5s 243 * 021g Fix to 300kpa baro correction and make it one-shot - PR 244 * 021h Change stall timeout so FP runs as normal on startup and 0.5s 245 * stall limit only comes into effect once we've left crank mode for sure 246 * 021i Yet another fix to 300KPa stuff and added 400KPa sensor capability - PR 247 * 021j Added an IAT related boost reduction to the boost controller, 248 * fixed bug in ASE - PR 249 * 021k Added another 6x6 boost table KPa based to switch to on the run - PR 250 * 021l Another output added, LED18 can now be reused for output4 or for 251 * Fan Control as well as X2 - PR 252 * 021m Bug fix to Fixed Angle, found MT not sending a perfect #00 when 253 * -10 deg set so now we check if its lower than #03 - PR 254 * 021n Finally managed to get the adv angle limit for traction control 255 * to work - PR 256 * 021n1 Rolled back some of the code to how it was in 021h/021i, to fix a 257 * Neon problem - LJ 258 * 021o Fixed Fuel Pump prime timer and interpoled prime now works on 259 * first pulse - PR 260 * 021p Cranking PW can use CLT or MAT or average (hot start on cold 261 * day issues) 262 * 021q Generic wheel decoder, started LED18. 263 * 021q1 Looking good. Added third wasted spark coil output on middle LED 264 * 021q2 Mode was hard coded to wheel decoder, fixed 265 * 021q2 Make <21 teeth use low-res timer for decoding 266 * 021q3 Fixed a bug preventing time based cranking working with wheel 267 * decoder in ChkHold 268 * Tidied up a few sections in that area to remove some bra. 269 * Increased Neon initial sync from 3 pulses to 5. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 8 MC68HC908GP32 User Bootloader 270 * Fixed a silly error that stopped low-res from working (add 271 * instead of adc) 272 * 021r Added "late leading" feature. Sort of works? 273 * No O2 correction in Overrun fuel cut mode 274 * 021s Over flow fixed by adding supernorm into calculations - PR 275 * 021t Undid 021n1 cranking changes. Looks ok on stim. 276 * 021u Toyota DLI ignition multiplex output. D17 is IGt, D19 is IGdA, 277 * D18 is IGdB 278 * 021v Tiny MV/Megatunix compatability tweak. Added 'T' Text version of 279 * release. Send back some real data to MV 'V' command to get 280 * correct map reading with 4250 sensor. Add low speed check for 281 * wheel decoders to prevent false sparking at too low rpm 282 * Make trigger return cranking only apply when cranking, not when "slow" 283 * Took out en_ack and falsetrig advanced options 284 * 021w1 Changes to spark output selection, big tidy up into macro and 285 * new hei4 dwell setting 286 * 021w2 Remove some feature ram variables to make space for dwell timers. 287 * 021w3 Tried a super short 5us dwell for HEI - didn't work.) 288 * 021w4 The trigger return for cranking only fix broke the Neon decoder. Oops. 289 * 021w5 Included Lee's crank phase fix for Neon mode. Fixed low speed spark. 290 * Two line error in dwell timer code was to blame. 291 * Dwell and multi outputs still not working, needs more resolution. 292 * 021w6 Added config checks for wasted spark outputs, more work on dwell. 293 * Make 75%,50% what they say when in wasted spark 294 * 021w7 Removed RAM copies of feature3,4,5,6 to allow more space. All 295 * features need re-testing 296 * 021w8 Made dwell timers 16bit. Had to stack h in TIMERROLL and SPARKTIME. 297 * Beware of stack overflow. 298 * 021w9 Combination of HEI4 + real dwell. Can choose to turn coil on at 299 * trigger during cranking 300 * 021w10 Added MV compatability to 300 and 400 KPa sensors, limit is 255KPa, 301 * untested - PR 302 * 021w11 Cosmetic change only 303 * 021x Added compatability with Eric's Aceleration Wizard in MT and bug 304 * fix to Knock angle - PR 305 * 021x1 Added MAPlast and TPSlast into real time variables sent to MT - PR 306 * 021x2 Re-write of Neon section. This is designed to msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 9 MC68HC908GP32 User Bootloader improve cranking 307 * decoding. - LJ 308 * 021x2 fixes were merged in later by JSM) 309 * 021x3 Fix to check7 section for 3 spark outputs. More work on dwell 310 * 021x4 Added accel/decel correction for dwell. (try to fix wacky HEI7 311 * behaviour) 312 * add check for missed sparktime, caused by 'early' trigger 313 * 021x5 When in "low speed" and doing dwell control, schedule dwell at same 314 * time as spark 315 * In "high speed" the dwell control is still poor during varying rpm 316 * 021x6 Bug fix to MAP based Accel stuff,added decel as a seperate option 317 * for MAP or TPS - PR 318 * 021x7 Added coolant check to over run fuel cut off and decay to accel 319 * enrichment - PR 320 * 021x7a No code changes just comments added to the Flash area for tuning 321 * software writters to see whats where - PR 322 * 021x8 Really fixed(?) spark output checking in check7 and added 323 * another couple of checks on the outputs 324 * 021x9 Bug fix to Accel decay also added X6 and X7 checks to Outputs 325 * 1 and 2 and the facility to have output3 switch on if Output1 326 * and Source or Output2 on- PR 327 * 021x10 Another bug fix to Accel Decay - PR 328 * 022 Re-arranged/shrunk data tables to give more variable space - PR 329 * Renamed to 022 because data format is incompatib le. 330 * 022a Made min nitrous rpm for interpolated fuel a user setting - JSM 331 * Fix to nitrous duty cycle cut - JSM 332 * Added Ryan's PWM idle improvements (using diff 021u vs 021u-idle) 333 * and made settings flashable. Not tested yet - JSM 334 * 022b Removed InjOCFuel_f 1 and 2 from code as not used and causing 335 * trouble in MT - PR 336 * 022b1 Fix to V command, was sending 212 rather than 200, thanks Dave - PR 337 * 022b2 More comments added for Tuning software writers - PR (No code changes) 338 * 022c Added Table for cranking Pulse Widths - PR 339 * 022c1 Bug fix to Priming PW in table mode - PR 340 * 022d Added Table for ASE - PR 341 * 022d1 Slight change to outputs to allow it to work better with MTx - PR 342 * 022e Dwell calc based on batt voltage 343 * Reduce multiplication of period correction msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 10 MC68HC908GP32 User Bootloader 344 * Dwell delay timed with hi-res timer where dwell period fits 345 * between trigger and spark 346 * (to-do: change spark cut/hold spark to omit coil on instead of 347 * coil off) 348 * Testing required. Wheel decoder looks odd, but could be test 349 * bench not code? 350 * 022e1 Changed some comments for Tuning Software writters - PR 351 * 022e2 More comments for software writters, grrrrrr :-) - PR 352 * 022e3 Entire msns-extra.asm file comments cleaned and beautified. 353 * comments are now tabbed and a best effort has been made to keep 354 * them from wrapping over an 80 col display and to keep them as close 355 * to lined up as possible. Only 1 code change in load_table: to 356 * switch to 201 from 212 - DJA 02-15-2005 357 * 022e4 Bug fix found by DJA after comments - PR 358 * 022f Added lineto clear megaview compat mode when a "P" command arrives 359 * handles the case where the ecu resets in use, it'll go back to 360 * enahanced mode. upon recept of next P cmd. should help megatune 361 * and megatunix. (megatunix detected it) 362 * 022g work on moving some dwell calcs to mainloop to avoid dropouts in wheel decoder mode 363 * Added equates in .h to allow temp storage in burner ram area (when 364 * not burning of course!) e.g. DOSQUIRT, TIMERROLL , SPARKTIME 365 * Revised check at end of TIMERROLL to avoid missing the next int 366 * 022h Added the ability to turn accel enrich off during ase - PR 367 * 022i Major movement and optimising of main loop, removed items like fuel and spark 368 * calculations from being done within a subroutine . - PR 369 * 022i1 Even more optimising of main loop - PR 370 * 022i2 ? - PR 371 * 022i3 Uncommented some CLIs in TIMERROLL and commented some in "B" command. 372 * Also some CLI taken out of burnconst (burner8b.a sm) to ensure that nothing 373 * can clobber the burner ram while it is in use. Hopes to fix serial comms 374 * symptoms since 022g 375 * 022i4 Replaced a line that got deleted in error. 376 * 022i5 Bug fix for DT, makes single table modes better too - PR 377 * 022i6 Removed old ASE settings and Cranking PW, all done with the tables now - PR msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 11 MC68HC908GP32 User Bootloader 378 * 022i7 Bug fix for DT, req_fuel ram not correct and ALT/SIM removed from VE2 - PR 379 * 022j Moved Page2 in line with Page1 so RAM lines up again, so rolled out 022i7 fix, 380 * Also made the new output bits after secl + 30 - PR 381 * 023 Rolled code version forward as Page 2 moved in 022j - PR 382 * 023a Added the facility to have normal Prime Pulse and interpoled, also added IAT 383 * check when firing up ADC so its stored ready for Prime Pulse Calcs - PR 384 *-> 023b released by Phil.... code not in here yet <-* 385 * 023c1 Spark changes 386 * Rename some variables, HRcTime -> global iTime, next cyl mode cleanup to 387 * remove nasty hack. Should work on any num cyls now. 388 * Extended T2 to 24bits in software, very small overhead every 65ms 389 * 023c2 Send iTimeX out with realtime data so hi-res rpm calc gauge works at all rpm 390 * iTime to get zeroed on stall. Why no fuel < 100rpm? A fix in place 391 * Make dwell settings in 0.05ms. Do period calcs in us then convert to 0.1ms 392 * afterwards. Hope to reduce jittering of dwell period when predicting many 393 * periods ahead 394 * 023c3 More of the same 395 * 023c4 Fix what got broken in wheel decoder 396 * 023c5 Include Phil's 023b fixes 397 * 023c6 Fixed up my typos in Neon section 398 * Bumped up default values for very cold crank PW and ASE to give users the idea. 399 * These tables should have a 1/x type decay, really ramping up when cold. 400 * 023c7 Next cyl low rpm/dwell issue? Set spark angle as trigg angle when NC/cranking 401 * iTime calc was getting missed 402 * 023c8 Make spark output pos/neg a quick byte for tiny speedup in ints 403 * 023c9 Added second input for wheel decoder in pin10 404 * 023c10 Change ddrc only the fly after a B. Put output on correct pin! 405 * 023c11 10deg offset in next cyl displayed crank angle 406 * Known limitation. Next cyl and wheel decoder do not work correctly 407 * I'll look into this as it could be great for dual VR pickup bikes 408 * 023c12 At ~500 rpm seeing phantom misdecoded outputs. Can't be sure if this 409 * is real or testbench. Seems ok now with no code changes??! 410 * 024 Same code new name 411 * 024a Changes to HEI7 bypass code to be closer to GM 412 * 024b Added Fixed ASE period to ASE - PR 413 * 024c Added fixed VE value period during Fixed ASE msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 12 MC68HC908GP32 User Bootloader timer and jump past warmup 414 * section if its not needed to save some time - PR 415 * 024d Changed from fixed VE to fixed MAP during ASE, also tidied up the spark-fuel 416 * cut options as they were difficult to fault find - PR 417 * 024e Changes to 300-400KPa stuff, added supernorm to the calcs - PR 418 * 024f Increased hires/lowres dwell margin aiming to eliminate observed problem 419 * as the dwell start point goes earlier than the trigger 420 * Fixed a silly typo (JSM) that had broken Neon - JSM 421 * 024g Removed one shot from error message so MTx can display errors, also 422 * added the 300-400KPa fix to the DT stuff - PR 423 * 024h Add an option to allow better testing of wasted spark outputs on the stim. 424 * It takes the normal tach input and steps through the outputs. DO NOT USE 425 * ON THE CAR! 426 * 024h1 Block v.low speed misdecoding for wheel and add a failsafe "turnallspkoff" 427 * in the mainloop when not running 428 * 024h2 Had to make the error message one-shot again or it cocks up Megatune 429 * 024i Moved sparkcut to cut dwell not spark to avoid module overheating 430 * 024i2 Start of output support for twin rotor 431 * 024i3 Increased hires/lowres dwell margin as missed sparks still evident 432 * 024i4 More twin rotor. Fixed 1ms split working for testing. 433 * 024i5 Added maps for split, not used yet 434 * 024i6 Added vars to use split map and fixed split for testing 435 * 024i7 Inital checks for rotary outputs 436 * Got it working on scope both with fixed and mapped split 437 * Changed the way trigger return is used in MSnS slightly (PR reported problem) 438 * 024i8 Dwell was half what it should be due to remenants of test code 439 * 024j Fix to 3-400KPa stuff - PR 440 * 024k Ensure all spark outputs are inactive at power on 441 * 024l Fixed the IAT from being altered during fixed MAP - PR 442 * 024l2 Fixup wheel decoding not picking up. Fixup excessive dwell at cranking rpm 443 * 024l3 Rotary - make sure trailing coil is off when it ought to be. 444 * Dwell is still imperfect under changing rpm 445 * 024m Bug fix to second O2 sensor correction limit - PR 446 * 024n (024l3 change got lost.. put back in) 447 * Wheel decoder fix used mask of $3f, should have msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 13 MC68HC908GP32 User Bootloader been $5f 448 * Changed dwell calcs a bit, found that accel/dece l correction wasn't 449 * working because iTimep wasn't being stored correctly 450 * 024n2,3,4,5 internal releases 451 * 024o DT test to see if alt - sim modes work (worked OK)- PR 452 * 024p Added the 3-400KPa fix to the DT code - PR 453 * 024q Work on wheel decoder sync issue. Works on scope. To be tested on bench. 454 * Now picks up 36-1 on bench fine. Trigger return with dwell gives odd 455 * results. 456 * 024r Added personality checks to spark stuff, if personality = 00 then no spark 457 * stuff needs to be run. Tidied up a few bra instructions to jmp - PR 458 * 024s Added the ability to use the MAP sensor as constant baro corr when in 459 * alpha-n mode - PR 460 * 024s1 Realised constant baro wasnt what was needed, it was the KPa calcs, 461 * so added that to the calcs as an option for alpha-n - PR 462 * 024s2 Test code - added bandaid to check if 0.1ms got missed, fire off in mainloop 463 * 024s4 Test code make dwell delay fixed 1ms - no dropouts 464 * 024s5 Remove unused UMUL32 465 * 024s6 Check for negative iTime caused by missed T2X increment 466 * 024s7 Forgot to remove fixed 1ms.. 467 * 024s8 False trigger protection was still commented out 468 * 024s9 Odd fire averaging back into code (was never in MSnS) 469 * 024s12 Wheel decoder false trigger protection at tooth level. 470 * Rolling filtered average tooth time stored. If IRQ trigger comes far too 471 * early then must be a false trigger, gets ignored. Missing tooth period 472 * also compared to rolling average instead of just previous period. 473 * 025a Logging of wheel decoder teeth time - page 9 ($F0) 474 * 025b Logging of "trigger" time - page 10 ($F1) Data reduced to 99 x byte pairs 475 * 199th byte is pointer to next byte to be written 476 * 200th byte low bit =0 for us, 1 = 0.1ms units 477 * 025c Added hysteresis to Rotary split and other trailing fixups 478 * 025d Include Ryan Davidson idle code. Add configurabl e tach output 479 * 025e Hopefully included all of Ryan's code this time. 480 * 025f Added a way to trigger extra cranking fuel by making TPS go above floodclear 481 * 3 times whilst engine not running or cranking. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 14 MC68HC908GP32 User Bootloader - PR 482 * 025g Added a RPM based Accel Enrichment, triggers from MAP or TPS as usual, but 483 * the fuel added is based on the engine rpm not rate of change. - PR 484 * 025g1 Small change to RPM AE - PR 485 * 025g2 Added a check to see if RPM AE lower than decay value also bug 486 * fix to AE stuff - PR 487 * 025h Rolled in Ken Culver's (KC) rotary fixes that were against 025e 488 * 025i Big changes to the way dwell is handled when multiple coils are used. 489 * When Launch is on, nitrous is off. 490 * 025i3 Work in progress. Make dwelldelay1,2,3,4 work from flash for testing only. 491 * CalcSpk dwell working as expected. 492 * 025i4 Test dwelldelay1,2,3,4 calcs 493 * 025i5 Dwelldelay calcs fixups. Looks ok on scope and in logged debug data. 494 * 025i6 Removed debug data from "R" command 495 * 025j Moved the RPM based AE stuff to a different page - PR 496 * 025j1 Warmup Idle bug fix, in Warmup mode only - PR 497 * 025j2 Fixup fixed "dwell" duty cycle for single output - JSM 498 * 025k Merged in KC's 025i6mod rotary changes - JSM 499 * 025l Added Mass Air Flow Meter as an option for fuel calculations - PR 500 * 025l2 Bug fix to Idle PWM as noticed by Caaarlo - PR 501 * 025m Bug fix in major error to KPa and MAF stuff - PR 502 * 025n Poor wheel pickup after stall. Tiny change in stall section. 503 * 025n1 If >20 teeth then 3/4 rolling average else use last tooth 504 * 025n2 Zero lowres on stall 505 * 025n3 Don't check for false triggers in wheel until synced up 506 * 025n4,5,6,7 Working on dwell calc + dwell accel correction. Sign was wrong 507 * 025n8 Reduced amount of accel factor added in all those sections of dwell delay calc. 508 * 025n9 Removed "double it in accel" dwell correction 509 * 025p Bug fix for Hot Idle PWM - PR 510 * 025q Added Air Density Factor as an option for MAF stuff - PR 511 * 025q1 Added Constant Baro Correction using a Standard 4250 map sensor on X7 - PR 512 * 025v Changes to IAT air density, now uses CLT sensor too - PR 513 * 025v1 Bug fix to IAT correction air density, have to do airtemp calcs first - PR 514 * 025w Changed fixed Temperature values to variable in coolant Air Density - PR 515 * 025x Roll in KC's Idle-advance code and revert a few small changes from 025k, 025n9 516 * For testing purposes, make hi-res dwell optional 517 * 025x1 Typo in "fix" msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 15 MC68HC908GP32 User Bootloader 518 * 025y Flat shift and launch have own limits 519 * Launch to nitrous on delay, flat shift to nitrous on delay 520 * Start of nitrous fuel hold-on in code. 521 * 025z Flat shift has own retard limit and setting. 522 * 026a Next-cyl railing at trigger fix from Baldur. 523 * 026b Minor tweak to when SparkAngle gets saved for better next cyl stability at low advance 524 * Config option to bypass "new" 025 wheel decoder element 525 * 026c SparkD now gets turned off in stall. Soft rev limiter fixed. 526 * SparkAngle now stored once all calcs done. 527 * 026d Added config data for 2nd stage nitrous and updates to .ini. Code does not use it yet. 528 * Fixed false "config error" when choosing fuel only. JSM 529 * 026e Included PR's fix for realtime baro correction 530 * 026f Experimental oddfire ignition offset code. Dwell WILL NOT work correctly. 531 * 026g Save ram by combining stHp, avgtoothh and low bytes. Added another byte 532 * Add hysteresis to hi-res dwell. 533 * 026g2 Turn on fuel pump as soon as any trigger received. 534 * 026h Constant baro correction for alpha-n 535 * 026h2 Undid 026g2 fuel pump as it was half hearted and caused problems for some. 536 * 026i Re-write rpm calc for better odd-fire averaging. Avg now done before calc 537 * with period data not avg of 8 bit answer 538 * 026j Added 5th and 6th spark outputs and 5 & 6 o/p dwell 539 * Code went beyond $D000 and collided with flash tables. Tables moved to $E000. 540 * Added "dual dizzy" output option, allows 4,6 triggers to control 2 alternate coils 541 * Some work on oddfire dwell, dwells across two periods only to avoid "oddness".. perhaps 542 * **Reversed sense of 2nd trigger input** so it is the same as the IRQ 543 * Extended the oddfire offset stuff to the six outputs. 544 * (No feedback on whether this code is any use yet.) 545 * TO-DO review dwell calcs for 5 and 6 outputs, working but imperfect 546 * 027a Same code. Bumped up number as so much changed. 547 * 027a1 Fixed a false config error in dual dizzy mode 548 * 027b Prevent dual dizzy if not in wheel decoder. Fix? for low speed TFI 549 * 027c Found bug in coil selection on 5cyl COP. Make 2nd trigger high/low active 550 * 027d Added low speed dwell for channels E & F 551 * 027e Idle advance and staging changes - KC 552 * still to add the RX8 code Ken has written and re-arrange flash_table0 for more ram 553 * 028a Rearrange and shrink flash tables to create msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 16 MC68HC908GP32 User Bootloader more RAM. This required moving lots and 554 * lots of config data and there could easily be breakage 555 * 028b 2nd trigger and missing tooth would not have worked, tooth count still reset to zero 556 * 028c 2nd trigger + missing, now specify 720deg worth of teeth. i.e. 60-2 = 120 tooth 557 * Tested with ms2wheelsim. 558 * 028d KG idle code added 559 * page selection fixup and a few tweaks - JSM 560 * 029a Idle tweak KG. Staging no looping - JSM 561 * Included PR's decel mode AE changes and MAF stuff (026h2-> 026h3) 562 * 029b Staging. KC. One line idle change KG 563 * Get tooth and trigger loggers working right again (028 broke it) 564 * Re-arranged 2nd trigger bits in 0.1ms. Did I get it right this time? JSM 565 * 029c did not exist, but "029c" ini file exists 566 * 029d Fixed warmup >255% bug 567 * Merged ksp's Boost Control bits from 024s9bc (report bcDC%) 568 * Pambient for 300/400kpa sensors set to more reasonable, but hardcoded, value 569 * 029e Removed ability to turn off hires dwell. Set "running" as soon as we get IRQ 570 * Tweaks to wheeldecoder to "help" starting sync 571 * 029f Pambient for boost control is a flash var 572 * 029g Made wheel decoder use hardcoded WHEELINIT holdoff value again as pre 029e 573 * 029h Comment out line for KeithG idle. Add debug pages $F2,$F3 to read back RAM 574 * see mem_map.txt 575 * Change TX logic to enable 256 bytes to be returned 576 * Check Pambient is non zero else default to 100T 577 * 029h5 Bug fix to RPM based AE stuff - PR 578 * 029i Make 60-2 wheel decoder use *2 instead of *2.5 for comparison 579 * Bumped up format version because RPM-AE bytes were in wrong order 580 * 029j 026h+ had bug that caused reset when loading in MSQ. 581 * 029j1 Bug fix to Decel mode and made Decel timer same as Accel timer - PR 582 * 029k KeithG change to idle (uncomment a few lines) 583 * Make wheel decoder for "-2" use *1.5 like "-1" 584 * Moved 300kpa,400kpa map sensor settings to constants page, rewrote code 585 * that used them and introduced baro300, baro400 include files. 586 * Make default 024s9 style wheel decoder, changed default baro limits tighter 587 * Remove 029j1 code as it broke GammaE on startup, not sure why yet. 588 * 029l Put 029j1 code back in with two line fix from PhilR. 025 decoder default. 589 * 029m CLT/rpm air density stuff had serious bugs. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 17 MC68HC908GP32 User Bootloader Changed multiply. 590 * Real problem was table size was incorrectly defined so tablelookup fell off the end. 591 * Changed default data to something that seems more reasonable. (JSM) 592 * 029n Tweaks to baro corr. Confirmed 2 equal sensors required for realtime. 593 * 029n2,3,4 ini file changes only 594 * 029o Moved ego step count select to page1 so it can appear on right dialogue 595 * False trigger disabling option re-added (for use with trigger logger) 596 * 029p Always use 024s9 style decoder during cranking 597 * 029q Bumped up code version so that format and version match for release. No real change. 598 * 029q2hr High Res Code - Highly Experimental 599 * 029q2hr4 Finally got it working good on the stim! 600 * 029q2hr5 Added calcs for table 2, nitrous, tc accel, etc... 601 * in the interrupt for injector 602 * 029q2hr6a Tracking down "stutter" issue as well as rich VE table. Changed some things 603 **029q2hr7a 6a with injection timing moved to DOSQUIRT - kg 604 * 029q2hr7c same with much removed 605 * 029q2hr7d hr7a with a fix for channel 2 from Ken - Muythaibxr 606 * 029q2hr7e many issues - not good 607 * 029q2hr8a 07d with prime pulse fix and 029r wheel decoder fix 608 * 029q2hr8b reworked pwcalc and pwuse, prime fixed? alternating inj, Water inj, NOS still broken 609 * 029q2hr8c alternating inj fixed? prime, Water inj, NOS still broken 610 * 029q2hr8d reworked some of code in prep for hires staging 611 * 029q2hr8e Ghost pulses removed awaiting hires staging and NOS/H2O testing 612 * hr_08f 029t WUE/ASE fix, h2o fix to clear bit, hires staging, no staging transition 613 * hr_08g Fixed priming PW, fixed ghost PW at power up with WD - sph, kg 614 * hr_08g5 Change battery voltage correction and opening time to 0.01ms res - sph, kg 615 * hr08g6 air density correction revision test - kg 616 * hr09a incorported spike fixes from 029v - kg 617 * hr09b rotary fix with sph spacing edits caused problems with PW spikes. - kg 618 * hr09c used HR_09a as basis with a one line edit for rotary - kg 619 * hr10a added all 029y3 to hr09c code. changed supernorm use as per magnus - kg 620 * hr10b added nonstandard map sensor fix from 029y4. supernorm use as per Magnus - kg 621 * hr10d2 Fixed supernorm use, finally got nonstandard map to work - kg 622 * hr10e fixed overboost for nonstandard sensors - kg 623 * hr10f added 029y5 fix for 12-1 wheels high speed msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 18 MC68HC908GP32 User Bootloader miss -kg 624 * hr10g weird varying Air Density with RPM for low tooth number wheels 2 crank, 1 cam. 625 * hr11a Add % baro instead of MAP and added ALS 626 * hr11b fixed staged to work with % baro, removed 2 idle variables from stack 627 * hr11c added NGC wheel capability 628 * hr11c1 fixed EGO/ALS interaction which caused EGO to be off all the time 629 * 630 ********************************************************* ******************* 631 ********************************************************* ******************* 632 ** M E G A S Q U I R T N S P A R K - 2 0 0 3 - V2.986 633 ** 634 ** By Magnus Bjelk (magnus@r16site.com) 635 ** 636 ** Fuel injection and ignition controller 637 ** based on the work of Bowling and Grippo 638 ** 639 ** Large chunks of code is from MegaSquirtDT by Eric Fahlgren/Guy Hill 640 ********************************************************* ****************** 641 ********************************************************* ****************** 642 643 ********************************************************* ****************** 644 ********************************************************* ****************** 645 ** M E G A S Q U I R T - 2 0 0 1 - V2.00 646 ** 647 ** (C) 2002 - B. A. Bowling And A. C. Grippo 648 ** 649 ** This header must appear on all derivatives of this code. 650 ** 651 ********************************************************* ****************** 652 ********************************************************* ****************** 653 654 655 ;-------------------------------------------------------- ------------------ 656 ; Version 2.0 657 ;-------------------------------------------------------- ------------------ 658 ; 2003-07-08 MBJ First release 659 ; 660 ;-------------------------------------------------------- ------------------ 661 ; Version 2.01 662 ;-------------------------------------------------------- ------------------ 663 ; 2003-07-16 MBJ Bugfix. rpm not zero until 2.5 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 19 MC68HC908GP32 User Bootloader seconds after start 664 ; resulting in lots of advance at cranking if you're 665 ; quick on the key 666 ;-------------------------------------------------------- ------------------ 667 ; Version 2.02 668 ;-------------------------------------------------------- ------------------ 669 ; 2003-08-04 MBJ Bugfix. Ignition module output always on for 3.2ms 670 ; resulting in high rpm (more than 6000 for 4 cyl) 671 ; late ignition. Added kind of dwell control 672 ;-------------------------------------------------------- ------------------ 673 ; Version 2.986 674 ;-------------------------------------------------------- ------------------ 675 ; 2003-09-16 MBJ Updated to be compatible with MegaSquirt 2.986 676 ;-------------------------------------------------------- ------------------ 677 ; Version 3.0 678 ;-------------------------------------------------------- ------------------ 679 ; 2003-10-08 MBJ Adding new features: 680 ; Long triggers, up to 135 deg, different angle calc 681 ; Timebased cranking timing, for VR pickups 682 ; Invert output option 683 ; Rev limiters, soft and hard 684 ; Programable outputs 685 ; Fixed high speed rpm calculation 686 ;-------------------------------------------------------- ------------------ 687 ;-------------------------------------------------------- ------------------ 688 ; Version 3.01 689 ;-------------------------------------------------------- ------------------ 690 ; 2004-05-08 MBJ Bugfix. Extra long triggers (over 89.5 deg) not 691 ; working as intended 692 ;-------------------------------------------------------- ------------------ 693 694 ;.base 10t 695 ;.set simulate 696 0040 697 org ram_start 0040 698 include "msns-extra.h" 699 ;**************************************************** 700 ; msns-extra.h - code mods based on megasquirtnspark JSM 701 ; Lots of stuff used from Dual table 702 ; 703 ; MegaSquirt.h Include File - V1.9999 704 ; 705 ; (C) Bruce A. Bowling / Al C. Grippo 706 ; 707 ; This header must appear on all derivatives 708 ; of this file. 709 ;**************************************************** 710 ; V2.0 Include File For megasquirt.asm 711 ;**************************************************** 712 ;* 713 ;* MegaSquirt Hardware Wiring 714 ;* 715 ; 716 717 ;Port A 718 ; PTA0 - FP 719 ; PTA1 - FIDLE 720 ; PTA2 - Output 2 (X5) 721 ; PTA3 - Output 1 (X4) 722 ; PTA4 X3 723 ; PTA5 X2 724 ; PTA6 - Flyback 725 ; PTA7 - Flyback 726 727 ;Port B (ADC inputs) 728 ; PTB0/AD0 - MAP 729 ; PTB1/AD1 - MAT 730 ; PTB2/AD2 - CLT 731 ; PTB3/AD3 - TPS 732 ; PTB4/AD4 - BAT 733 ; PTB5/AD5 - EGO 734 ; PTB6/AD6 - "X7" spare, EGO2, fuel pressure or 2nd MAP 735 ; PTB7/AD7 - "X6" spare, EGT 736 737 ;Port C 738 ; PTC0 - Squirt LED or coil a 739 ; PTC1 - Accel LED or coil b or HEI7 bypass 740 ; PTC2 - Warmup LED or coil c or output 4 741 ; PTC3 } multiplexed shift { or coil e 742 ; PTC4 } light outputs { or 2nd trig input 743 744 ;Port D 745 ; PTD0/~SS - unused or coil d 746 ; PTD1/MISO - nitrous in / table switch 747 ; PTD2/MOSI - knock in / coil f 748 ; PTD3/SPSCK - launch in 749 ; PTD4/T1CH0 - Inj1 750 ; PTD5/T1CH1 - Inj2 751 752 753 ;portd 0040 754 NosIn: equ 1 0040 755 KnockIn: equ 2 0040 756 launch: equ 3 0040 757 inject1: equ 4 0040 758 inject2: equ 5 759 760 ;porta 0040 761 fuelp: equ 0 0040 762 iasc: equ 1 0040 763 output2: equ 2 0040 764 output1: equ 3 0040 765 water2: equ 4 0040 766 water: equ 5 ; or used for X2 Electric fan output 767 0040 768 boostP equ 3 0040 769 Output3: equ 0 770 771 ;portc 0040 772 sled: equ 0 ; LED17 0040 773 aled: equ 1 ; LED19 0040 774 wled: equ 2 ; also IRQ LED18 only used in "fuel only" code 0040 775 coila equ 0 ; LED17 0040 776 coilb equ 1 ; LED19 0040 777 pin10 equ 3 ; ptc3 - 2nd trigger for wheel decoder or shiftlight 0040 778 ALSIn equ 3 ; ptc3 (pin 10) - Anti Lag System enable 0040 779 pin11 equ 4 ; ptc4 780 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 20 MC68HC908GP32 User Bootloader 0040 781 c13_of equ %00000001 ; defined but rarely used in code 0040 782 c13_o2 equ %00000010 ; NB or WB02 0040 783 c13_cs equ %00000100 ; SD or Alpha-N 0040 784 c13_bc equ %00001000 ; none or barometric compensation 785 0040 786 WHEELINIT equ %11000011 ; 029g holdoff 3 (011), was 5 (101) recently 787 788 ;oddfire offset setting equates 0040 789 outoff_22b equ $01 0040 790 outoff_45b equ $02 0040 791 outoff_90b equ $04 792 793 ; this is the size of the data page, used by the P and C commands 0040 794 PAGESIZE equ 189T 795 0040 796 KPASCALE300 equ $42 ; 1+ 0.258*256 = 66 hardcoded scaling factor for kpa 0040 797 KPASCALE400 equ $a7 ; 1+ 0.652*256 = 167 798 ;**************************************************** 799 ;* 800 ;* MegaSquirt RAM Variables 801 ;* 802 ;* We wish we had plenty of RAM to burn 803 ;**************************************************** 804 ms_ram_start: 805 806 ; RAM Variables - Ordered List for RS232 realtime download - delivered in one pack 0040 807 secl: ds 1 ; low seconds - from 0 to 255, then rollover (0) 0041 808 squirt: ds 1 ; Event variable bit field for Injector Firing (1) 809 ; Squirt Event Scheduling Variables - bit fields for "squirt" variable 0042 810 inj1: equ 0 ; 0 = no squirt 1 = squirt 0042 811 inj2: equ 1 ; 0 = no squirt 1 = squirt 0042 812 sched1: equ 2 ; 0 = nothing scheduled 1 = scheduled to squirt 0042 813 firing1: equ 3 ; 0 = not squirting 1 = squirting 0042 814 sched2: equ 4 0042 815 firing2: equ 5 0042 816 bcTableUse: equ 6 ; boost control 817 0042 818 engine: ds 1 ; Variable bit-field to hold engine current status (2) 819 ; Engine Operating/Status variables - bit fields for "engine" variable 0043 820 running: equ 0 ; 0 = engine not running 1 = running 0043 821 crank: equ 1 ; 0 = engine not cranking 1 = engine cranking 0043 822 startw: equ 2 ; 0 = not in startup warmup 1 = in warmup enrichment 0043 823 warmup: equ 3 ; 0 = not in warmup 1 = in warmup 0043 824 tpsaen: equ 4 ; 0 = not in TPS acceleration mode 1 = TPS acceleration mode 0043 825 tpsden: equ 5 ; 0 = not in deacceleration mode 1 = in deacceleration mode 0043 826 mapaen: equ 6 ; 0 = not in MAP acceleration mode 1 = MAP deaceeleration mode 0043 827 idleOn: equ 7 ; 828 0043 829 baro: ds 1 ; Barometer ADC Raw Reading - KPa (0 - 255) (3) 0044 830 map: ds 1 ; Manifold Absolute Pressure ADC Raw Reading - KPa (0 - 255) 0045 831 mat: ds 1 ; Manifold Air Temp ADC Raw Reading - counts (0 - 255) 0046 832 clt: ds 1 ; Coolant Temperature ADC Raw Reading - counts (0 - 255) 0047 833 tps: ds 1 ; Throttle Position Sensor ADC Raw Reading - counts, represents 0 - 5 volts 0048 834 batt: ds 1 ; Battery Voltage ADC Raw Reading - counts 0049 835 ego: ds 1 ; Exhaust Gas Oxygen ADC Raw Reading - counts 004A 836 egocorr: ds 1 ; Oxygen Sensor Correction (10) 004B 837 aircor: ds 1 ; Air Density Correction lookup - percent 004C 838 warmcor: ds 1 ; Total Warmup Correction - percent 004D 839 rpm: ds 1 ; Computed engine RPM - rpm/100 004E 840 pwcalch: ds 1 ; high order of calculated pulsewith (16 bits) - sph added for HR 004F 841 pwcalcl: ds 1 ; low order of pulsewidth (16 bits) 0050 842 tpsaccel: ds 1 ; Acceleration enrichment - percent 0051 843 barocor: ds 1 ; Barometer Lookup Correction - percent 0052 844 gammae: ds 1 ; Total Gamma Enrichments - percent 0053 845 vecurr: ds 1 ; Current VE value from lookup table - percent 0054 846 pwcalc2h: ds 1 ; high res PW 2 (20+21) 0055 847 pwcalc2l: ds 1 0056 848 vecurr2: ds 1 ; current VE2 (22) 0057 849 idleDC: ds 1 ; Idle DC count value (23) 0058 850 ctimeCommH: ds 1 ; Cycle time H for communication 0059 851 ctimeCommL: ds 1 ; Cycle time L for communication 005A 852 SparkAngle: ds 1 ; Spark angle (256 = 90 deg) (26) 005B 853 afrTarget: ds 1 ; AFR Target temp variable 005C 854 o2_fpadc: ds 1 ; Second O2 sensor or Fuel Pressure 005D 855 egtadc: ds 1 ; EGT Temperature 005E 856 CltIatAngle: ds 1 ; Coolant Iat Angle (30) 005F 857 KnockAngle: ds 1 ; Knock Angle 0060 858 egoCorr2: ds 1 ; Second O2 sensor Ego Correction 859 ; ( 33 total variables to here numbers 0 to 32- kg) 860 ;------------------------- 861 0061 862 SparkBits: ds 1 ; Spark timing bits 0062 863 SparkTrigg equ 0 ; SparkBits(0) IRQ has triggered, but no spark yet 0062 864 SparkHSpeed equ 1 ; SparkBits(1) High speed spark (using highres timer) 0062 865 SparkLSpeed equ 2 ; SparkBits(2) Low speed spark (using low speed timer or trigger going low) 0062 866 dwellcd equ 3 ; used for rotary to tell calcdwellspk not to dwell trailing 0062 867 rise equ 4 ;} found a rising IRQ edge / 2nd multispark / coilcbit 0062 868 lc_fs equ 5 ; doing flat shift vs. launch 0062 869 trigret equ 6 ; falling edge at end of short pulses - sets crank timing 0062 870 Knocked equ 7 ; Knock system working 871 872 ;Rev limiter variables 0062 873 RevLimBits ds 1 ; Rev limiter status bits 0063 874 RevLimSoft equ 0 ; RevLimBits(0) Soft rev limiter in action 0063 875 RevLimHSoft equ 1 ; RevLimBits(1) Soft rev limiter hard mode 0063 876 RevLimHard equ 2 ; RevLimBits(2) Hard rev limiter in action 0063 877 sparkon equ 3 ; ran out of space in sparkbits 0063 878 coilerr equ 4 ; out of sequence coil detection 0063 879 sparkCut equ 5 ; Spark Cut in action 0063 880 LaunchOn equ 6 ; Soft Launch On 0063 881 Advancing equ 7 ; Advancing Knock system 882 0063 883 personality ds 1 ; code works from ram. loaded from flash at boot 0064 884 MSNS equ 0 ; Megasquirtnspark 0064 885 MSNEON equ 1 ; MS neon decoder 0064 886 WHEEL equ 2 ; generalised decoder 36-1, 60-2 etc 0064 887 WHEEL2 equ 3 ; 0 = -1 1 = -2 0064 888 EDIS equ 4 ; edis 0064 889 DUALEDIS equ 5 ; two edis modules (for edis4 on V8, edis6 on V12) 0064 890 TFI equ 6 ; Ford TFI system 0064 891 HEI7 equ 7 ; GM 7 pin HEI 892 893 ** output bits 894 ** spark output defaults to FIDLE (original MSnS) 895 ** Neon code always put coils on D19 and D17 0064 896 outputpins ds 1 ; 0 (B&G) | 1 (non B&G) 0065 897 REUSE_FIDLE equ 0 ; FIDLE for iasc | spark output 0065 898 REUSE_LED17 equ 1 ; LED17 for sled | coila output 0065 899 REUSE_LED18 equ 2 ; mismatch between .ini and .asm 0065 900 REUSE_LED18_2 equ 3 ; 901 ; LED18_2 LED18 function 902 ; 0 0 wled 903 ; 0 1 irq 904 ; 1 0 output4 905 ; 1 1 spark c 906 0065 907 REUSE_LED19 equ 4 ; LED19 for aled | coilb output 0065 908 X2_FAN equ 5 ; X2 water/n2o | fan control 0065 909 LED18_FAN equ 6 ; LED18 output4 | fan control 0065 910 TOY_DLI equ 7 ; toyota DLI ignition multiplex 911 0065 912 feature1 ds 1 ; some features taken from Dual Table 0066 913 wd_2trig equ 0 ; wheel decoder 2nd trigger i/p - new in 023c9 0066 914 wd_2trigb equ 1 ; for use by BIT 0066 915 whlsim equ 2 ; enable wheel simulator for use on the stim ONLY 0066 916 taeIgnCount equ 3 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 21 MC68HC908GP32 User Bootloader 0066 917 rotaryFDign equ 4 ; enable rotary FD ignition outputs 0066 918 hybridAlphaN equ 5 0066 919 CrankingPW2 equ 6 0066 920 Nitrous equ 7 921 0066 922 feature2 ds 1 ; more 0067 923 BoostControl equ 0 0067 924 ShiftLight equ 1 0067 925 LaunchControl equ 2 0067 926 primebit equ 3 0067 927 out3sparkd equ 4 ; 1= use output for spark D 0067 928 min_dwell equ 5 0067 929 dwellduty50 equ 6 0067 930 config_error equ 7 ; set if non-sense combination of options - don't run. 931 0067 932 feature7 ds 1 ; Enhanced stuff 0068 933 TractionNos equ 0 ; Turn Nos off in Traction Loss? 0068 934 dwellcont equ 1 ; Real (crude) dwell control 0068 935 TCcycleSec equ 2 ; Hold traction settings for cycles or till rpm stable for 0.1S 0068 936 WheelSensor equ 3 ; TC wheel sensors fitted 0068 937 AlphaTarAFR equ 4 ; Alpha n or speed density for target afr 0068 938 TPSTargetAFR equ 5 ; TPS setpoint for target AFR's 0068 939 StagedMAP2nd equ 6 ; Do we want to use a 2nd param for staged (MAP only for now) 0068 940 StagedAnd equ 7 ; and/or operation for Staged second param 941 942 ;bit definitions of "missing" flash feature vars in .asm 943 0068 944 EnhancedBits: ds 1 ; Enhanced Stuff 0069 945 NosDcOk: equ 0 ; Nos System not causing Duty Cycle of >90% 0069 946 NosSysOn: equ 1 ; Nos System Running 0069 947 OverRun: equ 2 ; Over Run Fuel Cut 0069 948 REStaging: equ 3 ; Roger Enns Staging On 0069 949 NosAntiLag: equ 4 ; Nos Antilag running 0069 950 NosSysReady: equ 5 ; NOS Ready to go 0069 951 UseVE3: equ 6 ; Use VE table 3 0069 952 Primed: equ 7 ; Fuel System Primed 953 0069 954 EnhancedBits2: ds 1 ; A few more enhanced bits 006A 955 Traction: equ 0 ; Traction control running 006A 956 Output1On: equ 1 ; Bit for the output 1 on 006A 957 Output2On: equ 2 ; Bit for the output 2 on 006A 958 cant_crank equ 3 ; Flag that we can't enter crank mode 006A 959 cant_delay equ 4 ; delay bit for cant crank mode 006A 960 over_Run_Set: equ 5 ; Set over run active for timer 006A 961 mv_mode: equ 6 ; we are in Megaview mode, disable enhanced comms 006A 962 OneShotBaro: equ 7 ; One check for baro correction 963 006A 964 coilsel: ds 1 ; which coil are we working on 006B 965 coilabit equ 0 ; now a bit each to make life easier 006B 966 coilbbit equ 1 006B 967 coilcbit equ 2 006B 968 coildbit equ 3 006B 969 coilebit equ 4 006B 970 coilfbit equ 5 971 ;don't expect any more! 972 006B 973 EnhancedBits4: ds 1 006C 974 roll1 equ 0 ; bits to see if we missed a T2 overflow 006C 975 roll2 equ 1 006C 976 page2: equ 2 ; this was a whole byte 006C 977 wspk equ 3 ; set if we are running wasted spark type multiple outputs 006C 978 indwell equ 4 ; hi-res dwell is in process - may drop 006C 979 nextcyl equ 5 ; quick calc for next cyl mode 006C 980 invspk equ 6 ; quick calc for inverted / non-inverted spark 006C 981 FxdASEDone equ 7 ; Fixed ASE done now use normal ASE 982 006C 983 EnhancedBits5: ds 1 006D 984 rotary2 equ 0 ; gets copied from flash var on boot and Burn 985 ; enable twin rotor leading/trailing split stuff 006D 986 checkbit equ 1 ; For testing the code. 006D 987 toothlog equ 2 ; log teeth in wheel decoder 006D 988 triglog equ 3 ; log ignition triggers (all ignition codes) 006D 989 rsh_s equ 4 ; rotary split hysteresis on split 006D 990 rsh_r equ 5 ; rotary split hysteresis on rpm 006D 991 cto equ 6 ; tach output armed 006D 992 ctodiv equ 7 ; tach output divider bit for half speed 006D 993 ctodivb equ $80 ; ctodiv for bit/eor ops 994 006D 995 EnhancedBits6: ds 1 006E 996 hrdwon equ 0 ; hi-res dwell hysteresis bit 006E 997 wsync equ 1 ; wheel is synced 006E 998 whold equ 2 ; wheel not in holdoff 006E 999 trigger2 equ 3 ; used in conjunction with "rise" bit for 2nd trigger input 006E 1000 IdleAdvTimeOK equ 4 006E 1001 StgTransDone equ 5 006E 1002 idashbit equ 6 ; kg PWM idle 006E 1003 istartbit equ 7 ; kg PWM idle added for startup 1004 1005 1006 ; Engine RPM -> RPM = 12000/(ncyl * (rpmph - rpmpl)) 006E 1007 rpmph: ds 1 ; High part of RPM Period 006F 1008 rpmpl: ds 1 ; Low part of RPM Period 0070 1009 rpmch: ds 1 ; Counter for high part of RPM 0071 1010 rpmcl: ds 1 ; Counter for low part of RPM 0072 1011 idleph ds 1T 0073 1012 idlepl ds 1T 1013 0074 1014 flocker: ds 1 ; Flash locker semaphore 1015 1016 ; Previous ADC values for computing derivatives 0075 1017 lmap: ds 1 ; Manifold Absolute Pressure ADC last Reading 0076 1018 lmat: ds 1 ; Manifold Air Temp ADC last Reading 0077 1019 lclt: ds 1 ; Coolant Temperature ADC last Reading 0078 1020 ltps: ds 1 ; Throttle Position Sensor ADC last Reading 0079 1021 lbatt: ds 1 ; Battery Voltage ADC last Reading 007A 1022 lego: ds 1 ; Last EGO ADC reading 1023 1024 ;Global Time Clock 007B 1025 mms: ds 1 ; 0.0001 second update variable 007C 1026 ms: ds 1 ; 0.001 second increment 007D 1027 tenth: ds 1 ; 1/10th second 007E 1028 sech: ds 1 ; high seconds - rollover at 65536 secs (1110.933 minutes, 18.51 hours) 007F 1029 tpsaclk: ds 1 ; TPS enrichment timer clock in 0.1 second resolution 0080 1030 egocount: ds 1 ; Counter value for EGO step - incremented every ignition pulse 0081 1031 asecount: ds 1 ; Counter value for after-start enrichment counter - every ignition pulse 0082 1032 igncount1: ds 1 ; Ignition pulse counter 0083 1033 igncount2: ds 1 ; Ignition pulse counter 0084 1034 altcount1: ds 1 ; Alternate count selector 0085 1035 altcount2: ds 1 ; Alternate count selector 0086 1036 Decay_Accel: ds 1 ; Storage for Accel Value to decay from 0087 1037 tpsfuelcut: ds 1 ; TPS Fuel Cut (percent) 1038 1039 ;SCI parameters/variables 0088 1040 txcnt ds 1 ; SCI transmitter count (incremented) 0089 1041 txgoal ds 1 ; SCI number of bytes to transmit 008A 1042 txmode ds 1 ; Transmit mode flag 008B 1043 rxoffset ds 1 ; offset placeholder when receiving VE/constants vis. SCI 008C 1044 adsel: ds 1 ; ADC Selector Variable 1045 1046 ;Timer Equates for real-time clock function 008D 1047 T1Timerstop equ %00110010 ;TSC 008D 1048 T1Timergo equ %01010010 ;TSC 1049 ;T2SC0_No_PWM equ %00010000 ;TSC0 1050 1051 ; These control Injector PWM mode for T1SC0 and T1SC1 008D 1052 Timergo_NO_INT equ %00000010 ;TSC without interrupts msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 22 MC68HC908GP32 User Bootloader 1053 ;T1SCX_PWM equ %00011010 ; Unbuffered PWM enabled 008D 1054 T1SCX_PWM equ %00011110 ; Unbuffered PWM enabled - set high on compare, toggle on overflow 1055 008D 1056 T1SCX_NO_PWM equ %00010000 ; No PWM 1057 008D 1058 burnSrc ds 2T 008F 1059 burnDst ds 2T 0091 1060 burnCount ds 1T 1061 1062 ; Temporary variables 0092 1063 tmp1 ds 1 0093 1064 tmp2 ds 1 0094 1065 tmp3 ds 1 0095 1066 tmp4 ds 1 0096 1067 tmp5 ds 1 0097 1068 tmp6 ds 1 0098 1069 tmp7 ds 1 0099 1070 tmp8 ds 1 009A 1071 tmp9 ds 1 009B 1072 tmp10 ds 1 009C 1073 tmp11 ds 1 009D 1074 tmp12 ds 1 009E 1075 tmp13 ds 1 009F 1076 tmp14 ds 1 00A0 1077 tmp15 ds 1 00A1 1078 tmp16 ds 1 00A2 1079 tmp17 ds 1 00A3 1080 tmp18 ds 1 00A4 1081 tmp19 ds 1 00A5 1082 tmp20 ds 1 00A6 1083 tmp21 ds 1 00A7 1084 tmp22 ds 1 1085 00A8 1086 T2CNTX ds 1 ; software 3rd byte of T2 1087 ; variables here don't need to be zero page 1088 ; Spark timing variables 00A9 1089 T2LastX: ds 1 ; T2 xhigh last 00AA 1090 T2LastH: ds 1 ; Timer 2 high last ; T2 at last decoded pulse. All spark codes. 00AB 1091 T2LastL: ds 1 ; Timer 2 low last 00AC 1092 itimeX: ds 1 ; Time between decoded triggers in us. X - calc in DOSQUIRT 00AD 1093 itimeH: ds 1 ; mid byte 00AE 1094 itimeL: ds 1 ; low byte 00AF 1095 SparkDelayH: ds 1 ; Spark delay high 00B0 1096 SparkDelayL: ds 1 ; Spark delay low 00B1 1097 SparkOnLeftah: ds 1 ; Time left for spark to be on (0.1ms) coil a high 00B2 1098 SparkOnLeftal: ds 1 ; Time left for spark to be on (0.1ms) coil a low 00B3 1099 SparkOnLeftbh: ds 1 ; Time left for spark to be on (0.1ms) coil b high 00B4 1100 SparkOnLeftbl: ds 1 ; Time left for spark to be on (0.1ms) coil b low 00B5 1101 SparkOnLeftch: ds 1 ; Time left for spark to be on (0.1ms) coil c high 00B6 1102 SparkOnLeftcl: ds 1 ; Time left for spark to be on (0.1ms) coil c low 00B7 1103 SparkOnLeftdh: ds 1 ; Time left for spark to be on (0.1ms) coil d high 00B8 1104 SparkOnLeftdl: ds 1 ; Time left for spark to be on (0.1ms) coil d low 00B9 1105 SparkOnLefteh: ds 1 ; Time left for spark to be on (0.1ms) coil e high 00BA 1106 SparkOnLeftel: ds 1 ; Time left for spark to be on (0.1ms) coil e low 00BB 1107 SparkOnLeftfh: ds 1 ; Time left for spark to be on (0.1ms) coil f high 00BC 1108 SparkOnLeftfl: ds 1 ; Time left for spark to be on (0.1ms) coil f low 00BD 1109 cTimeH: ds 1 ; Cycle time for spark delay calculation 00BE 1110 cTimeL: ds 1 ; Cycle time for spark delay calculation 00BF 1111 SparkTempH: ds 1 ; Temporary storage for spark delay calculation 00C0 1112 SparkTempL: ds 1 ; Temporary storage for spark delay calculation 00C1 1113 SparkCarry: ds 1 ; Temporary storage for spark delay calculation 00C2 1114 SRevLimTimeLeft ds 1 ; Soft rev limiter time left to hard mode 00C3 1115 T2PrevX: ds 1 ; top byte - only used for v.low rpm 00C4 1116 T2PrevH: ds 1 ; T2 at last IRQ/tooth - wheel decoder 00C5 1117 T2PrevL: ds 1 ; low byte 00C6 1118 acch: ds 1 ; engine accel/devel 00C7 1119 accl: ds 1 ; " 00C8 1120 Pambient ds 1T 00C9 1121 kpa ds 1T 00CA 1122 coolant ds 1T 00CB 1123 idleLastDC ds 1T 00CC 1124 bcDC ds 1T 00CD 1125 KPAlast ds 1T 00CE 1126 TPSlast ds 1T 00CF 1127 idleCtlClock ds 1T 00D0 1128 idleActClock ds 1T 00D1 1129 bcActClock ds 1T 00D2 1130 bcCtlClock ds 1T ;DT 00D3 1131 TPSfuelCorr ds 1T 1132 1133 ; Enhanced stuff added 00D4 1134 OverRunTime: ds 1 ; Timer for over run to cut in 00D5 1135 SparkCutCnt: ds 1 00D6 1136 KnockTimLft: ds 1 00D7 1137 KnockAdv: ds 1 00D8 1138 kpa_n: ds 1 ; Kpa or TPs value for spark table lookup. 00D9 1139 tmp31: ds 1 ; Tmp storage for anything thats only used in a jsr 00DA 1140 tmp32: ds 1 ; Tmp Storage for anything thats only used in a jsr 00DB 1141 ST2Timer: ds 1 ; Spark Table 2 delay timer 00DC 1142 VE3Timer: ds 1 ; VE Table 3 delay timer 00DD 1143 TCAccel: ds 1 ; Traction Control Enrichment 00DE 1144 TCAngle: ds 1 ; Traction Control Spark Retard 00DF 1145 TCSparkCut: ds 1 ; Traction Control Spark Cut number and prime pulse cnt 00E0 1146 mmsDiv: ds 1 ; 0.1mS counter for Boost Control 00E1 1147 TCCycles: ds 1 ; Engine hold cycles 00E2 1148 Out3Timer: ds 1 ; Output3 timer 1149 ;yet more ram variables for EDIS /wheel stuff 00E3 1150 wheelcount ds 1 ; wheel counter for decoder _and_ HoldSpark/toothsync/ignore_small 1151 ;note on wheelcount: 1152 ;In Neon mode this is used as a holdoff for syncing counting up to zero 1153 ; bit7 = !sync 1154 ; bit6 = holdspark 1155 ; Once synced it is used to count the teeth 1156 ; In non-Neon mode it is used as HoldSpark counting down to zero 1157 ; these two used by tooth decoders or EDIS 00E4 1158 dwelldelay1 ds 1 ; 2 bytes of dwell delay in 0.1ms 00E5 1159 ds 1 00E6 1160 dwelldelay2 ds 1 ; same for period +1 00E7 1161 ds 1 00E8 1162 dwelldelay3 ds 1 ; same for period +2 00E9 1163 ds 1 00EA 1164 dwelldelay4 ds 1 ; same for period +3 00EB 1165 ds 1 00EC 1166 dwelldelay5 ds 1 ; same for period +4 00ED 1167 ds 1 00EE 1168 dwelldelay6 ds 1 ; same for period +5 00EF 1169 ds 1 1170 sawh: ; EDIS SAW width 1171 stHp: 00F0 1172 avgtoothh: ds 1 ; OR.. gap between teeth previous in decoders 1173 sawl: 1174 stLp: 00F1 1175 avgtoothl: ds 1 ; low byte 00F2 1176 lowresH ds 1 ; low res counter. Added for Neon code. 00F3 1177 lowresL ds 1 ; 00F4 1178 dwelldms ds 1 ; target dwell in 0.1ms units 00F5 1179 dwellush ds 1 ; target dwell in us units 00F6 1180 dwellusl ds 1 ; low byte 00F7 1181 sparktargeth ds 1 ; H target t2 value for spark (used in hi-res dwell) 00F8 1182 sparktargetl ds 1 ; L 00F9 1183 iTimepX ds 1 00FA 1184 iTimepH ds 1 ; previous hi-res cycle time (for accel/decel) 00FB 1185 iTimepL ds 1 ; 00FC 1186 splitdelH: ds 1 ; trailing split delay for rotary 00FD 1187 splitdelL: ds 1 00FE 1188 KnockBoost ds 1 ; Boost to remove from controller if Knock detected msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 23 MC68HC908GP32 User Bootloader 00FF 1189 KnockAngleRet: ds 1 ; Knock Angle storage 0100 1190 rpmlast: ds 1 ; RPM accel dot last value 0101 1191 VlaunchLimit: ds 1 ; Variable Launch RPM value 0102 1192 page ds 1 0103 1193 DelayAngle: ds 1 ; Angle to delay spark (TriggAngle - SparkAngle) 0104 1194 airTemp: ds 1 0105 1195 NitrousAngle: ds 1 ; Nitrous Angle of Retard 0106 1196 NosPW: ds 1 ; PW to add for NOS System 0107 1197 pw_stagedh: ds 1 0108 1198 pw_stagedl: ds 1 0109 1199 n2olaunchdel: ds 1 ; launch to nitrous delay timer 010A 1200 n2ohold: ds 1 ; nitrous fuel and retard hold-on timer ; not yet used 010B 1201 pw_staged2h: ds 1 ; secondary pulsewidth for staging. 010C 1202 pw_staged2l: ds 1 010D 1203 stgTransitionCnt: ds 1 ; transition count for staging. 010E 1204 idlAdvHld: ds 1 ; Idle Advance Hold off after conditions are met. 1205 ; rename and use these place holders as needed 010F 1206 idleDelayClock ds 1 ; PWM Idle kg 0110 1207 engineLoad: ds 1 ; Fuel Lookup load - kg 0111 1208 ramslot3: ds 1 ; oh shit, only 3 left!idlerpm: 0112 1209 ramslot2: ds 1 ; oh shit, only 2 left!idletarget: 0113 1210 ramslot1: ds 1 ; oh shit, only 1 left! 1211 1212 1213 ;no more or ram copy of data will overrun stack 1214 ms_ram_end: 1215 ;************************************************** 1216 ; Flash Configuration Variables here - variables can be downloaded via serial link 1217 ; VETABLE and Constants 1218 ; "VE" is entry point, everything is offset from this point 1219 ; All of these variables point to RAM locations. Renamed to _r 1220 ; 1221 ms_rf_start: 0114 1222 VE_r rmb $90 ; 64 bytes for VE Table - Now 144 for 12x12 1223 ;CWU_r rmb 1 ; Crank Enrichment at -40 F 1224 ;CWH_r rmb 1 ; Crank Enrichment at 170 F 1225 ;AWEV_r rmb 1 ; After-start Warmup Percent enrichment add-on value 1226 ;AWC_r rmb 1 ; After-start number of cycles 1227 ;WWU_r rmb $0A ; Warmup bins(fn temp) 1228 ;TPSAQ_r rmb $04 ; TPS acceleration amount (fn TPSDOT) in 0.1 ms units 1229 ;tpsacold_r rmb 1 ; Cold acceleration amount (at -40 degrees) in 0.1 ms units 1230 ;tpsthresh_r rmb 1 ; Accel TPS DOT threshold 1231 ;TPSASYNC_r rmb 1 ; ***** TPS Acceleration clock value 1232 ;TPSDQ_r rmb 1 ; Deacceleration fuel cut 01A4 1233 egotemp_r rmb 1 ; Coolant Temperature where EGO is active 01A5 1234 egocountcmp_r rmb 1 ; Counter value where EGO step is to occur 01A6 1235 egodelta_r rmb 1 ; EGO Percent step size for rich/lean 01A7 1236 egolimit_r rmb 1 ; Upper/Lower EGO rail limit (egocorr is inside 100 +/- Limit) 01A8 1237 REQ_FUEL_r rmb 1 ; Fuel Constant 01A9 1238 DIVIDER_r rmb 1 ; IRQ divide factor for pulse 01AA 1239 Alternate_r rmb 1 ; Alternate injector drivers 01AB 1240 InjOpen_r rmb 1 ; Injector Open Time 01AC 1241 InjOCFuel_r rmb 1 ; PW-correlated amount of fuel injected during injector open 01AD 1242 INJPWM_r rmb 1 ; Injector PWM duty cycle at current limit 01AE 1243 INJPWMT_r rmb 1 ; Injector PWM mmillisec time at which to activate. 01AF 1244 BATTFAC_r rmb 1 ; Battery Gamma Factor 01B0 1245 rpmk_r rmb 2 ; Constant for RPM = 12,000/ncyl - downloaded constant 01B2 1246 RPMRANGEVE_r rmb 12 ; VE table RPM Bins for 2-D interpolation 01C4 1247 KPARANGEVE_r rmb 12 ; VE Table MAP Pressure Bins for 2_D interp. 01D6 1248 CONFIG11_r rmb 1 ; Configuration for PC Configurator 1249 ; Bit 0-1 = MAP Type 1250 ; 00 = MPX4115AP 1251 ; 01 = MPX4250AP 1252 ; 10 = MPXH6300A 1253 ; 11 = MPXH6400A 1254 ; Bit 2 = Engine Stroke 1255 ; 0 = Four Stroke 1256 ; 1 = Two Stroke 1257 ; Bit 3 = Injection Type - NOT USED! 1258 ; 0 = Port Injection 1259 ; 1 = Throttle Body 1260 ; Bit 4-7 = Number of Cylinders 1261 ; 0000 = 1 cylinder 1262 ; 0001 = 2 cylinders 1263 ; 0010 = 3 cylinders 1264 ; 0011 = 4 cylinders 1265 ; 0100 = 5 cylinder 1266 ; 0101 = 6 cylinders 1267 ; 0110 = 7 cylinders 1268 ; 0111 = 8 cylinders 1269 ; 1000 = 9 cylinders 1270 ; 1001 = 10 cylinders 1271 ; 1010 = 11 cylinders 1272 ; 1011 = 12 cylinders 01D7 1273 M_TwoStroke: equ 4 1274 01D7 1275 CONFIG12_r rmb 1 ; Configuration for PC Configurator 1276 ; Bit 0-1 = COOL Sensor Type 1277 ; 00 = GM 1278 ; 01 = User-defined 1279 ; 10 = User-defined 1280 ; 11 = User-Defined 1281 ; Bit 2-3 = MAT Sensor Type 1282 ; 00 = GM 1283 ; 01 = Undefined 1284 ; 10 = Undefined 1285 ; 11 = Undefined 1286 ; Bit 4-7 = Number of Injectors 1287 ; 0000 = 1 Injector 1288 ; 0001 = 2 Injectors 1289 ; 0010 = 3 Injectors 1290 ; 0011 = 4 Injectors 1291 ; 0100 = 5 Injectors 1292 ; 0101 = 6 Injectors 1293 ; 0110 = 7 Injectors 1294 ; 0111 = 8 Injectors 1295 ; 1000 = 9 Injectors 1296 ; 1001 = 10 Injectors 1297 ; 1010 = 11 Injectors 1298 ; 1011 = 12 Injectors 01D8 1299 CONFIG13_r rmb 1 ; Configuration for PC Configurator 1300 ; Bit 0 = Odd-fire averaging 1301 ; 0 = Normal 1302 ; 1 = Odd-Fire 1303 ; Bit 1 = O2 Sensor Type 1304 ; 0 = Narrow-band (single wire 14.7 stoch) 1305 ; 1 = DIY-WB (Stoch = 2.5V, reverse slope) 1306 ; Bit 2 = Control Stategy 1307 ; 0 = Speed-Density 1308 ; 1 = Alpha-N 1309 ; Bit 3 = Barometer Correction 1310 ; 0 = Enrichment Off (set to 100%) 1311 ; 1 = Enrichment On 1312 ;PRIMEP_r rmb 1 ; Priming pulses (0.1 millisec units) 01D9 1313 RPMOXLIMIT_r rmb 1 ; Minimum RPM where O2 Closed Loop is Active 01DA 1314 FASTIDLE_r rmb 1 ; Fast idle if enabled 01DB 1315 VOLTOXTARGET_r rmb 1 ; O2 sensor flip target value 1316 ;ACMULT_r rmb 1 ; Acceleration cold multiplication factor (percent/100) 1317 ;BLANK rmb 4 ; Extra Slots to make up 64 bytes total 1318 1319 ;Page 0 variables 1320 ;These are flash ONLY so no need to read them from RAM 1321 1322 ;Page 3 spark variables that get used from RAM 01DC 1323 ST_r equ ms_rf_start ; spark timing table 01DC 1324 RPMRANGEST_r equ {ms_rf_start + $90} ; Spark timing RPM bins for 2-D interpolation msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 24 MC68HC908GP32 User Bootloader 01DC 1325 KPARANGEST_r equ {ms_rf_start + $9c} ; Spark timing MAP pressure bins for 2-D interpolation 1326 01DC 1327 TriggAngle_r equ {ms_rf_start + $a8} ; Trigger angle BTDC 01DC 1328 FixedAngle_r equ {ms_rf_start + $a9} ; Fixed angle, 0 = not in used 01DC 1329 TrimAngle_r equ {ms_rf_start + $aa} ; Trim angle, positive and negative 01DC 1330 CrankAngle_r equ {ms_rf_start + $ab} ; Cranking angle 1331 1332 ; Increased to 200 as according to the 'List' file thats the size of ms_fr since 12x12 ? 01DC 1333 org {ms_rf_start + 200T} ; reserve 200 bytes for paging use in RAM 1334 ms_rf_end: 1335 1336 ;------------------------------------------------------------------------------- 01DC 1337 ms_ram_size equ {ms_ram_end-ms_ram_start} 01DC 1338 ms_rf_size equ {ms_rf_end-ms_rf_start} 01DC 1339 ms_total_ram_size equ {ms_rf_end-ms_ram_start} 1340 ;------------------------------------------------------------------------------- 1341 ;new equates so burner ram_exec area can be used as temp storage WITHIN int handlers 01DC 1342 int_ram equ $01ED ; same as ram_exec, space used by burner 1343 01DC 1344 itmp00 equ {int_ram + $00 } 01DC 1345 itmp01 equ {int_ram + $01 } 01DC 1346 itmp02 equ {int_ram + $02 } 01DC 1347 itmp03 equ {int_ram + $03 } 01DC 1348 itmp04 equ {int_ram + $04 } 01DC 1349 itmp05 equ {int_ram + $05 } 01DC 1350 itmp06 equ {int_ram + $06 } 01DC 1351 itmp07 equ {int_ram + $07 } 01DC 1352 itmp08 equ {int_ram + $08 } 01DC 1353 itmp09 equ {int_ram + $09 } 01DC 1354 itmp0a equ {int_ram + $0a } 01DC 1355 itmp0b equ {int_ram + $0b } 01DC 1356 itmp0c equ {int_ram + $0c } 01DC 1357 itmp0d equ {int_ram + $0d } 01DC 1358 itmp0e equ {int_ram + $0e } 01DC 1359 itmp0f equ {int_ram + $0f } 1360 01DC 1361 itmp10 equ {int_ram + $10 } 01DC 1362 itmp11 equ {int_ram + $11 } 01DC 1363 itmp12 equ {int_ram + $12 } 01DC 1364 itmp13 equ {int_ram + $13 } 01DC 1365 itmp14 equ {int_ram + $14 } 01DC 1366 itmp15 equ {int_ram + $15 } 01DC 1367 itmp16 equ {int_ram + $16 } 01DC 1368 itmp17 equ {int_ram + $17 } 01DC 1369 itmp18 equ {int_ram + $18 } 01DC 1370 itmp19 equ {int_ram + $19 } 01DC 1371 itmp1a equ {int_ram + $1a } 01DC 1372 itmp1b equ {int_ram + $1b } 01DC 1373 itmp1c equ {int_ram + $1c } 01DC 1374 itmp1d equ {int_ram + $1d } 01DC 1375 itmp1e equ {int_ram + $1e } 01DC 1376 itmp1f equ {int_ram + $1f } 1377 01DC 1378 itmpcomm equ {int_ram + $20 } ; $32 (50) bytes for SCI comm data packet 1379 1380 ;sph copied from HR code 1381 ;************************************************************************** 1382 ; Defines for Hi-resolution Mode 1383 ; 01DC 1384 TimerstopHR equ %00110011 ;Stop timer, reset of timer counter, prescale for 1 usec 01DC 1385 TimerstopnrHR equ %00100011 ;Stop timer, no reset of timer counter, prescale for 1 usec 01DC 1386 TimergoHR equ %00000011 ;Enable timer, prescale of 8 for 1 usec increment 01DC 1387 SetOCstateHR equ %00010000 ;Makes the timer pin a logic low (injector on) - for T1sc0/T1sc1 01DC 1388 SetOCgoHR equ %00011100 ;Turn on OC mode 01DC 1389 SetOCgoHRI equ %01011100 ;Turn on OC mode with interrupt - SPH 1390 01DC 1391 ClrOCstateHR equ %00000000 ;Makes the timer pin a logic high (injector off) - for T1sc0/T1sc1 1392 1393 *************************************************************************** 1394 ; Argument list for LinInterp, used throughout. 1395 ; 1396 ; If you move these down to LinInterp, the assembler can't use direct 1397 ; addressing for some arguments, so the code is bigger. 1398 01DC 1399 liX1 equ tmp1 01DC 1400 liX2 equ tmp2 01DC 1401 liY1 equ tmp3 01DC 1402 liY2 equ tmp4 01DC 1403 liX equ tmp5 01DC 1404 liY equ tmp6 ; Function output. 1405 1406 ;udvd32 uses some memory space, use tmp instead 01DC 1407 INTACC1 equ tmp1 ; and 2,3,4 01DC 1408 INTACC2 equ tmp5 ; and 6,7,8 1409 ; tmp9,10,11 used within udvd32 1410 ; udvd32 is only used within Calcrpm, ought to rewrite a simpler routine 1411 1412 ;misc_spark uses these 01DC 1413 dwelltmpX equ tmp2 01DC 1414 dwelltmpH equ tmp3 01DC 1415 dwelltmpL equ tmp4 01DC 1416 dwelltmpXp equ tmp12 01DC 1417 dwelltmpHp equ tmp13 01DC 1418 dwelltmpLp equ tmp14 01DC 1419 dwelltmpXac equ tmp20 ; use these so they don't get trashed by lookup 01DC 1420 dwelltmpHac equ tmp21 01DC 1421 dwelltmpLac equ tmp22 01DC 1422 dwelltmpXop equ tmp5 ; these are the us result 01DC 1423 dwelltmpHop equ tmp6 01DC 1424 dwelltmpLop equ tmp7 01DC 1425 dwelltmpXms equ tmp8 ; these are the 0.1ms result before transferring to dwelldelay1,2,3,4 01DC 1426 dwelltmpHms equ tmp9 01DC 1427 dwelltmpLms equ tmp10 1428 01DC 1429 SparkdltX equ tmp2 ; not used at same time as dwelltmpX etc. 01DC 1430 SparkdltH equ tmp3 01DC 1431 SparkdltL equ tmp4 1432 1433 *************************************************************************** 1434 *some paging macros. (Were subroutines but consume yet more stack) 1435 *************************************************************************** 1436 ; NOTE! page stores which table is paged into RAM. 1437 1438 ; VE TABLE 1 01DC 1439 $MACRO ve1x ; gets a VE byte from page1 or RAM. 1440 ; On entry X contains index. 1441 ; Returns byte in A 1442 lda page 1443 cmp #01T 1444 bne ve1xf 1445 lda VE_r,x 1446 bra ve1xc 1447 ve1xf: lda VE_f1,x 1448 ve1xc: 01DC 1449 $MACROEND 1450 1451 ; VE TABLE 2 01DC 1452 $MACRO ve2x ; gets a VE byte from page2 or RAM. 1453 ; On entry X contains index. 1454 ; Returns byte in A 1455 lda page 1456 cmp #02T 1457 bne ve2xf 1458 lda VE_r,x 1459 bra ve2xc 1460 ve2xf: lda VE_f2,x msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 25 MC68HC908GP32 User Bootloader 1461 ve2xc: 01DC 1462 $MACROEND 1463 1464 ; SPARK TABLE 1 01DC 1465 $MACRO ve3x ; gets a ST byte from page3 or RAM. 1466 ; On entry X contains index. 1467 ; Returns byte in A 1468 lda page 1469 cmp #03T 1470 bne ve3xf 1471 lda VE_r,x 1472 bra ve3xc 1473 ve3xf: lda ST_f1,x 1474 ve3xc: 01DC 1475 $MACROEND 1476 1477 ; SPARK TABLE 2 01DC 1478 $MACRO ve4x ; gets a ST byte from page4 or RAM. 1479 ; On entry X contains index. 1480 ; Returns byte in A 1481 lda page 1482 cmp #04T 1483 bne ve4xf 1484 lda VE_r,x 1485 bra ve4xc 1486 ve4xf: lda ST_f2,x 1487 ve4xc: 01DC 1488 $MACROEND 1489 1490 ; VE TABLE 3 01DC 1491 $MACRO ve5x ; gets a VE byte from page5 or RAM. 1492 ; On entry X contains index. 1493 ; Returns byte in A 1494 lda page 1495 cmp #05T 1496 bne ve5xf 1497 lda VE_r,x 1498 bra ve5xc 1499 ve5xf: lda VE_f3,x 1500 ve5xc: 01DC 1501 $MACROEND 1502 1503 ; AFR TABLE 1 for VE1 01DC 1504 $MACRO AFR1X ; gets an AFR byte from page6 or RAM. 1505 ; On entry X contains index. 1506 ; Returns byte in A 1507 lda page 1508 cmp #06T 1509 bne ve6xf 1510 lda VE_r,x 1511 bra ve6xc 1512 ve6xf: lda AFR_f1,x 1513 ve6xc: 01DC 1514 $MACROEND 1515 1516 ; AFR TABLE 2 for VE3 01DC 1517 $MACRO AFR2X ; gets an AFR byte from page7 or RAM. 1518 ; On entry X contains index. 1519 ; Returns byte in A 1520 lda page 1521 cmp #07T 1522 bne ve7xf 1523 lda VE_r,x 1524 bra ve7xc 1525 ve7xf: lda AFR_f2,x 1526 ve7xc: 01DC 1527 $MACROEND 1528 1529 1530 *************************************************************************** 1531 ** 1532 ** Main Routine Here - Initialization and main loop 1533 ** 1534 ** Note: Org down 128 bytes below the "rom_start" point 1535 ** because of erase bug in bootloader routine 1536 ** All MS HC908 continue to be shipped with the bug to preserve backward 1537 ** compatability (BB posted on this on www.msefi.com) 1538 ** Do not mess with this offset or your chip won't boot! 1539 ** 1540 ** Note: Items commented out after the Start entry point are 1541 ** taken care of in the Boot_R12.asm code 1542 *************************************************************************** 8128 1543 org {rom_start + 128} 1544 Start: 8128 4501ED 1545 ldhx #init_stack+1 ; Set the stack Pointer 812B 94 1546 txs ; Move before burner to avoid conflict 1547 1548 ; Clock now 8MHz - DJLH 812C 1936 1549 bclr BCS,pctl ; Select external Clock Reference 812E 1B36 1550 bclr PLLON,pctl ; Turn Off PLL 8130 6E0236 1551 mov #$02,pctl ; Set P and E Bits 8133 6ED03A 1552 mov #$D0,pmrs ; Set L 8136 6E0338 1553 mov #$03,pmsh ; Set N (MSB) 8139 6ED139 1554 mov #$D1,pmsl ; Set N (LSB) 813C 1E37 1555 bset AUTO,pbwc 813E 1A36 1556 bset PLLON,pctl ; Turn back on PLL 1557 ;PLLwait: 8140 0D37FD 1558 brclr LOCK,pbwc,* 8143 1836 1559 bset BCS,pctl 1560 1561 1562 ; 1563 ; Set all RAM to known value - for code runaway protection. 1564 ; If there is ever a code runaway, and processor tries 1565 ; executing this as an opcode ($32) then a reset will occur. 1566 ; 8145 450040 1567 ldhx #ram_start ; Point to start of RAM 1568 ClearRAM: 8148 A632 1569 lda #$32 ; This is an illegal op-code - 1570 ; cause reset if executed 814A F7 1571 sta ,x ; Set RAM location 814B AF01 1572 aix #1 ; advance pointer 814D 650240 1573 cphx #ram_last+1 ; done ? 8150 26F6 1574 bne ClearRAM ; loop back if not 1575 1576 1577 ; Set up the port data-direction registers 1578 8152 A600 1579 lda #%00000000 8154 B705 1580 sta ddrb ; Set as inputs (ADC will select 1581 ; which channel later) 8156 A630 1582 lda #%00110000 ; Turn off injectors (inverted output) 8158 B703 1583 sta portd 815A 160F 1584 bset launch,ptdpue 815C 120F 1585 bset NosIn,ptdpue ; Set all the inputs internal 1586 ; pull ups On 1587 815E C6E074 1588 lda feature8_f ; using spark F ? 8161 A510 1589 bit #spkfopb 8163 2704 1590 beq no_spk_f 8165 A6F5 1591 lda #%11110101 ; make pin an output 8167 2004 1592 bra store_ddrd 1593 no_spk_f: 8169 140F 1594 bset KnockIn,ptdpue 816B A6F1 1595 lda #%11110001 ; Changed to 0 is an output 1596 store_ddrd: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 26 MC68HC908GP32 User Bootloader 816D B707 1597 sta ddrd ; Outputs for injector 1598 816F 3F00 1599 clr porta 8171 A6FF 1600 lda #%11111111 8173 B704 1601 sta ddra ; Outputs for Fp and Spark 8175 A600 1602 lda #$00 8177 B702 1603 sta portc 1604 ;is PTC4 an input? - see also 'B' code section 8179 C6E00B 1605 lda feature1_f ; we haven't copied to RAM yet 817C A501 1606 bit #wd_2trigb 817E 2704 1607 beq norm_op_ddrc 8180 A60F 1608 lda #%00001111 ; make PTC4 an input for second trigger 8182 2002 1609 bra op_ddrc 1610 norm_op_ddrc: 8184 A61F 1611 lda #%00011111 ; ** Was 11111111 1612 op_ddrc: 8186 B706 1613 sta ddrc ; Outputs for LED 1614 ; als addion - if ALS is uesd, you cannot use spark E or shift light 8188 C6E87F 1615 lda ALS_CONFIG ; Making pin10 (ptc3) an input for anti lag, shiflight and Spark E cannot 818B A501 1616 bit #%00000001 818D 2706 1617 beq al_io_done 818F 160E 1618 bset ALSIn,ptcpue ; And enable pullup although strictly not needed, 1619 ; there's a resistor in place already. 8191 A607 1620 lda #%00000111 8193 B706 1621 sta ddrc 1622 al_io_done: 8195 A601 1623 lda #%00000001 ; Serial Comm Port 8197 B70C 1624 sta ddre 1625 1626 ; Set up the Real-time clock Timer (TIM2) 8199 6E332B 1627 MOV #%00110011,t2sc ; Stop Timer so it can be set up 1628 ; No overflow interrupt, stop, 1629 ; reset, div / 8 1630 819C 6EFF2E 1631 mov #$FF,T2MODH ; Free running timer 819F 6EFF2F 1632 mov #$FF,T2MODL 1633 81A2 6E0031 1634 mov #0T,T2CH0H ; Channel 0 high, 0 1635 ; mov #92T,T2CH0L ; Channel 0 low, 92 = 0.1 ms 81A5 6E6432 1636 mov #100T,T2CH0L ; Channel 0 low, 100 = 0.1 ms 1637 ; @ 8.0MHz - DJLH 81A8 6E5430 1638 mov #%01010100,T2SC0 ; Output compare, interrupt enabled 1639 81AB 6E0034 1640 mov #$00,T2CH1H ; Channel 1 high, to be used 1641 ; for spark control 81AE 6E0035 1642 mov #$00,T2CH1L ; Channel 1 low, 0 81B1 6E5433 1643 mov #%01010100,T2SC1 ; Channel 1 Output compare, 1644 ; interrupt enabled 1645 ; edis? mov #%01010000,T2SC1 ; Channel 1 Output compare, 1646 ; interrupt enabled 81B4 1F33 1647 bclr TOF,T2SC1 ; clear any pending interrupt 81B6 1D33 1648 bclr TOIE,T2SC1 ; Disable timer interrupt until 1649 ; we are ready 1650 1651 1652 ;; mov #%00010011,T2SC ; Start timer, no overflow int, div / 8 81B8 6E532B 1653 mov #%01010011,T2SC ; Start timer, overflow int, div / 8 1654 1655 ; Set up the PWM for the Injector (for current limit mode) 1656 ; MOV #T1Timerstop,t1sc ; Stop Timer so it can be set up 1657 ; mov #$00,T1MODH 1658 ; mov #$64,T1MODL ; set timer modulus register to 100 1659 ; decimal 1660 ; mov #T1SCX_NO_PWM,T1SC0 ; make this normal port output 1661 ; (PWM MODE is #$5E) 1662 ; mov #T1SCX_NO_PWM,T1SC1 ; make this normal port output 1663 ; (PWM MODE is #$5E) 1664 ; mov #$00,T1CH0H 1665 ; lda INJPWM_f1 1666 ; sta T1CH0L 1667 ; mov #$00,T1CH1H 1668 ; lda dtmode_f 1669 ; bit #alt_i2t2 1670 ; beq setpwmsingle 1671 ; lda INJPWM_f2 1672 ; bra store_pwm 1673 ;setpwmsingle: 1674 ; lda INJPWM_f1 1675 ;store_pwm: 1676 ; sta T1CH1L 1677 ; MOV #Timergo_NO_INT,T1SC ; No interrupts for this 1678 1679 ; sph copied from HR code 1680 ; Set up the PWM for the Injector (for Hires mode) 81BB 6E3320 1681 mov #TimerstopHR,t1sc ; Stop Timer so it can be set up 81BE 6EFF23 1682 mov #$FF,T1MODH 81C1 6EFF24 1683 mov #$FF,T1MODL ; set timer modulus register to 100 decimal 81C4 6E0025 1684 mov #ClrOCstateHR,T1SC0 ; make this normal port output initialized to logic 1 81C7 6E0028 1685 mov #ClrOCstateHR,T1SC1 ; make this normal port output initialized to logic 1 81CA 6E0026 1686 mov #$00,T1CH0H 81CD 6E0127 1687 mov #$01,T1CH0L ; put in something here - overwrite with PW later 81D0 6E0029 1688 mov #$00,T1CH1H 81D3 6E012A 1689 mov #$01,T1CH1L 1690 1691 ; Set up SCI port 81D6 A630 1692 lda #$30 ; This is 9615 baud w/ the osc 1693 ; frequency 8.0M - DJLH 81D8 B719 1694 sta scbr 81DA 1C13 1695 bset ensci,scc1 ; Enable SCI 81DC 1414 1696 bset RE,SCC2 ; Enable receiver 81DE 1A14 1697 bset SCRIE,SCC2 ; Enable Receive interrupt 81E0 B616 1698 lda SCS1 ; Clear SCI transmitter Empty Bit 81E2 3F88 1699 clr txcnt 81E4 3F89 1700 clr txgoal 1701 1702 ; Set up Interrupts 81E6 6E041D 1703 mov #%00000100,INTSCR ;Enable IRQ 1704 1705 ;clear water outputs 81E9 1B00 1706 bclr water,porta ;water injection 81EB 1900 1707 bclr water2,porta ;2nd water injection output 81ED 086602 1708 brset out3sparkd,feature2,w_no3 81F0 1103 1709 bclr Output3,portd 1710 w_no3: 1711 ; 1712 ; Load the constants (VE Table, etc) from Flash to RAM - the program 1713 ; uses the RAM values. 1714 ; Changed! 1715 ; For multi table work we always operate from flash unless directed to 1716 ; copy the data into RAM for tuning. Even then only the VE tables will 1717 ; use the RAM version. Extra coding could change this, but the initial 1718 ; release will use all other variables from flash ONLY - so be sure to 1719 ; "send" the data after changes. 1720 ; 81F2 A6FF 1721 lda #$ff 81F4 C70102 1722 sta page ; select invalid page to make 1723 ;sure we run from flash 1724 ; Set up RAM Variable - also when burning page0 search for "burning page0" 81F7 C6E00B 1725 lda feature1_f 81FA B765 1726 sta feature1 81FC C6E00C 1727 lda feature2_f 81FF B766 1728 sta feature2 1729 ; lda feature3_f - flash only 1730 ; sta feature3 1731 ; lda feature4_f - flash only 1732 ; sta feature4 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 27 MC68HC908GP32 User Bootloader 1733 ; lda feature5_f - flash only 1734 ; sta feature5 1735 ; lda feature6_f - flash only 1736 ; sta feature6 8201 C6E06D 1737 lda feature7_f 8204 B767 1738 sta feature7 1739 ; lda feature8_f - flash only 1740 ; sta feature8 8206 C6E001 1741 lda outputpins_f 8209 B764 1742 sta outputpins 820B C6E000 1743 lda personality_f 820E B763 1744 sta personality ;move from flash to ram 1745 8210 3F7B 1746 clr mms 8212 3F7C 1747 clr ms 8214 3F7D 1748 clr tenth 8216 3F40 1749 clr secl 8218 3F7E 1750 clr sech 821A 3F41 1751 clr squirt 821C 3F42 1752 clr engine 821E 3F6E 1753 clr rpmph 8220 3F6F 1754 clr rpmpl 8222 3F70 1755 clr rpmch 8224 3F71 1756 clr rpmcl 8226 3F4D 1757 clr rpm 8228 3F74 1758 clr flocker 822A A600 1759 lda #$00 822C B7FC 1760 sta splitdelH ; initial value for rotary split 822E B7FD 1761 sta splitdelL 8230 B7F9 1762 sta iTimepX 8232 B7FA 1763 sta iTimepH 8234 B7FB 1764 sta iTimepL 8236 B7FF 1765 sta KnockAngleRet 8238 B7D7 1766 sta KnockAdv 823A B7D6 1767 sta KnockTimLft 823C B75F 1768 sta KnockAngle 823E B7DE 1769 sta TCAngle 8240 B7FE 1770 sta KnockBoost 8242 B75E 1771 sta CltIatAngle 8244 B7DD 1772 sta TCAccel 8246 3F4E 1773 clr pwcalch ;sph for HR code 8248 3F4F 1774 clr pwcalcl 824A 3F54 1775 clr pwcalc2h ;sph for HR code 824C 3F55 1776 clr pwcalc2l 1777 ; sta pwcalc1 1778 ; sta pwcalc2 1779 ; sta pw1 1780 ; sta pw2 1781 ; clr pwrun1 1782 ; clr pwrun2 824E A6FF 1783 lda #$FF 8250 B7CE 1784 sta TPSlast 8252 C70100 1785 sta rpmlast 8255 3F80 1786 clr egocount 8257 C70109 1787 sta N2Olaunchdel 1788 825A 450000 1789 ldhx #0 825D 35E4 1790 sthx dwelldelay1 825F 35E6 1791 sthx dwelldelay2 8261 35E8 1792 sthx dwelldelay3 8263 35EA 1793 sthx dwelldelay4 8265 35EC 1794 sthx dwelldelay5 8267 35EE 1795 sthx dwelldelay6 1796 8269 A6BB 1797 lda #$BB 826B B743 1798 sta baro 826D B744 1799 sta map 826F B745 1800 sta mat 8271 B746 1801 sta clt 8273 B747 1802 sta tps 8275 B748 1803 sta batt 1804 8277 A664 1805 lda #$64 8279 B74B 1806 sta aircor 827B B753 1807 sta vecurr 827D B751 1808 sta barocor 827F B74C 1809 sta warmcor 8281 B74A 1810 sta egocorr 8283 B760 1811 sta EgoCorr2 8285 B787 1812 sta tpsfuelcut 8287 3F52 1813 clr gammae 1814 ; lda #$46 - why ? just stored $BB above 1815 ; sta map 1816 ; lda #$65 1817 ; sta baro 8289 3F50 1818 clr tpsaccel 828B 3F86 1819 clr Decay_Accel 828D 3F82 1820 clr igncount1 828F 3F83 1821 clr igncount2 8291 3F57 1822 clr idleDC ; set fully closed 8293 3FCB 1823 clr idlelastdc ; PWM idle kg 8295 1F42 1824 bclr idleon,engine ; PWM idle kg 8297 1D6D 1825 bclr idashbit,EnhancedBits6 ; PWM idle kg 8299 1F6D 1826 bclr istartbit,EnhancedBits6 ; PWM idle kg 829B 1B69 1827 bclr over_Run_Set,EnhancedBits2 ; Make sure this is cleared fo ALS... 829D C6E057 1828 lda Spark2Delay_f 82A0 B7DB 1829 sta ST2Timer ; Set delay timer for ST2 82A2 C6E05D 1830 lda VE3Delay_f 82A5 B7DC 1831 sta VE3Timer ; Set Delay timer for VE 3 82A7 4F 1832 clra 82A8 C7010F 1833 sta idledelayclock ; PWM idle kg 82AB B7DF 1834 sta TCSparkCut 82AD B7C2 1835 sta SRevLimTimeLeft 82AF C70105 1836 sta NitrousAngle ; Clear the NOS Angle 82B2 C70106 1837 sta NosPW ; Clear the Nos PW 82B5 B7D5 1838 sta SparkCutCnt ; Spark Cut counter - Enhanced 82B7 C70107 1839 sta pw_stagedh 82BA C70108 1840 sta pw_stagedl ; Reset the Staged PW 82BD C7010B 1841 sta pw_staged2h 82C0 C7010C 1842 sta pw_staged2l 82C3 C7010D 1843 sta stgTransitionCnt 82C6 C7010E 1844 sta idlAdvHld 82C9 C70110 1845 sta engineLoad 82CC 3F61 1846 clr SparkBits 82CE 3FB1 1847 clr Sparkonleftah 82D0 3FB2 1848 clr Sparkonleftal 82D2 3FB3 1849 clr Sparkonleftbh 82D4 3FB4 1850 clr Sparkonleftbl 82D6 3FB5 1851 clr Sparkonleftch 82D8 3FB6 1852 clr Sparkonleftcl 82DA 3FB7 1853 clr Sparkonleftdh 82DC 3FB8 1854 clr Sparkonleftdl 82DE 3FB9 1855 clr Sparkonlefteh 82E0 3FBA 1856 clr Sparkonleftel 82E2 3FBB 1857 clr Sparkonleftfh 82E4 3FBC 1858 clr Sparkonleftfl 82E6 3FF2 1859 clr lowresH ; low res (0.1ms) timer 82E8 3FF3 1860 clr lowresL ; 82EA C6E06E 1861 lda dwellcrank_f 82ED B7F4 1862 sta dwelldms ; initial dwell period 82EF 6E10F5 1863 mov #$10,dwellush ; } high speed dwell delay, 1864 ; default of 4.1ms 82F2 3FF6 1865 clr dwellusl ; } until calc in main loop 82F4 1461 1866 bset SparkLSpeed,SparkBits ; At boot turn on low speed ignition 82F6 3F62 1867 clr RevLimBits 82F8 3F68 1868 clr EnhancedBits msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 28 MC68HC908GP32 User Bootloader 82FA 3F69 1869 clr EnhancedBits2 82FC 3F6B 1870 clr EnhancedBits4 82FE 3F6C 1871 clr EnhancedBits5 8300 3F6D 1872 clr EnhancedBits6 8302 3F6A 1873 clr coilsel 8304 106A 1874 bset coilabit,coilsel 8306 1862 1875 bset coilerr,RevLimBits ; set "error" bit so first coil found is used 8308 3FD4 1876 clr OverRunTime ; kg do not know of this is important, but trial 1877 1878 ;possible that this calc could go wrong if a large "addition" was used but then a small 1879 ;real angle. Shouldn't happen if angles set correctly. 830A C6E3A8 1880 lda TriggAngle_f 830D A139 1881 cmp #57T ; check for next cyl mode 830F 2202 1882 bhi init_crang ; trigger angle > 20, continue 8311 1A6B 1883 bset nextcyl,EnhancedBits4 1884 init_crang: 8313 C6E3AB 1885 lda CrankAngle_f 8316 B75A 1886 sta SparkAngle 8318 086310 1887 brset EDIS,personality,init_edis 1888 1889 ;this won't work for next-cyl but will be ignored at low rpm anyway 831B C6E3A8 1890 lda TriggAngle_f 831E C0E3AB 1891 sub CrankAngle_f 8321 AB1C 1892 add #28T ; - - 10deg 8323 C70103 1893 sta DelayAngle 8326 C6E3AC 1894 lda SparkHoldCyc_f 8329 200E 1895 bra init_cont 1896 1897 init_edis: 832B C6E3A8 1898 lda TriggAngle_f 832E C70103 1899 sta DelayAngle 8331 A605 1900 lda #$05 ; set initial SAW to 10 degrees 8333 B7F0 1901 sta sawh 8335 A600 1902 lda #$00 8337 B7F1 1903 sta sawl 1904 1905 init_cont: 8339 B7E3 1906 sta wheelcount ; (HoldSpark) 833B 026305 1907 brset MSNEON,personality,init_wheel 833E 046302 1908 brset WHEEL,personality,init_wheel 8341 201D 1909 bra init_no_hold 1910 init_wheel: 8343 6EC3E3 1911 mov #WHEELINIT,wheelcount ; holdoff for Neon/Wheel 8346 136D 1912 bclr wsync,EnhancedBits6 8348 146D 1913 bset whold,EnhancedBits6 834A A600 1914 lda #0 834C B7F0 1915 sta avgtoothh 834E B7F1 1916 sta avgtoothl 1917 ;if 2nd trig rising and falling then store existing value of pin to monitor state 8350 C6E021 1918 lda dtmode_f 8353 A502 1919 bit #trig2risefallb 8355 2709 1920 beq init_no_hold 8357 090204 1921 brclr pin11,portc,iw_rf2 835A 1861 1922 bset rise,sparkbits 835C 2002 1923 bra init_no_hold 1924 iw_rf2: 835E 1961 1925 bclr rise,sparkbits 1926 1927 init_no_hold: 1928 8360 A6FF 1929 lda #$FF 8362 B7AD 1930 sta iTimeH 8364 B7AE 1931 sta iTimeL 8366 B7AC 1932 sta iTimeX 1933 1934 ;see if inverted or non-inv output and use a quick bit 8368 C6E3AD 1935 lda SparkConfig1_f ; check if noninv or inv spark 836B A508 1936 bit #M_SC1InvSpark 836D 2604 1937 bne inspk_inv 836F 1D6B 1938 bclr invspk,EnhancedBits4 ; set non-inverted 8371 2002 1939 bra inspk_done 1940 inspk_inv: 8373 1C6B 1941 bset invspk,EnhancedBits4 ; set inverted 1942 inspk_done: 1943 8375 C6E86F 1944 lda p8feat1_f 8378 A501 1945 bit #rotary2b 837A 2706 1946 beq not_init_rot 837C 106C 1947 bset rotary2,EnhancedBits5 ; set rotary quick bit 837E 176B 1948 bclr wspk,EnhancedBits4 ; set that we are NOT doing normal wasted spark 8380 2002 1949 bra done_rot 1950 not_init_rot: 8382 116C 1951 bclr rotary2,EnhancedBits5 ; clr rotary quick bit 1952 1953 done_rot: 1954 1955 ;decide if we are doing multiple wasted spark outputs 8384 026305 1956 brset MSNEON,personality,wsp_init 8387 046302 1957 brset WHEEL,personality,wsp_init 838A 2008 1958 bra mv_init ; not wasted spark so skip 1959 wsp_init: 838C 096405 1960 brclr REUSE_LED19,outputpins,mv_init 838F 006C02 1961 brset rotary2,EnhancedBits5,mv_init 8392 166B 1962 bset wspk,EnhancedBits4 ; set that we are doing wasted spark 1963 mv_init: 1964 ; set MegaView mode to block enhanced comms, S,P,R,X commands reset 1965 ; it to allow normal ops 8394 1C69 1966 bset mv_mode,EnhancedBits2 1967 1968 ;If HEI set bypass to 0v 8396 0F6302 1969 brclr HEI7,personality,not_hei7_init 8399 1202 1970 bset aled,portc 1971 not_hei7_init: 1972 839B 0B6302 1973 brclr DUALEDIS,personality,chk_out 839E 1863 1974 bset EDIS,personality ; DUALEDIS implies EDIS 1975 1976 chk_out: 1977 **** add in some sanity checks for outputs vs. code base **** 83A0 B663 1978 lda personality 83A2 260A 1979 bne check_out_config 1980 ; lda outputpins ; assumes if personality zero 1981 ; ; then any outputs are error 1982 ; beq b_dc ; no personality, no outputs 1983 ;wrong! This prevents "Fuel only", just check for conflicts 83A4 202C 1984 bra check3 1985 1986 ;set_error: 83A6 6E0195 1987 mov #1,tmp4 83A9 1E66 1988 bset config_error,feature2 83AB CC84DC 1989 jmp done_checks 1990 1991 check_out_config: 83AE 036405 1992 brclr REUSE_LED17,outputpins,block_neon 83B1 096402 1993 brclr REUSE_LED19,outputpins,block_neon 83B4 200B 1994 bra check_msns 1995 block_neon: 83B6 036308 1996 brclr MSNEON,personality,check_msns 83B9 6E0295 1997 mov #2,tmp4 83BC 1E66 1998 bset config_error,feature2 ; if MSNEON but haven't 1999 ; reused led17&19 then error 83BE CC84DC 2000 jmp done_checks 2001 2002 check_msns: 83C1 01630E 2003 brclr MSNS,personality,check3 83C4 00640B 2004 brset REUSE_FIDLE,outputpins,check3 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 29 MC68HC908GP32 User Bootloader 83C7 026408 2005 brset REUSE_LED17,outputpins,check3 83CA 6E0395 2006 mov #3,tmp4 83CD 1E66 2007 bset config_error,feature2 ; if MSNS and haven't reused 2008 ; FIDLE or LED17 then error 83CF CC84DC 2009 jmp done_checks 2010 2011 check3: ; check for idle conflict 2012 ; brclr PWMidle,feature2,check4 83D2 C6E810 2013 lda feature13_f 83D5 A501 2014 bit #pwmidleb 83D7 270B 2015 beq check4 83D9 016408 2016 brclr REUSE_FIDLE,outputpins,check4 83DC 6E0495 2017 mov #4,tmp4 83DF 1E66 2018 bset config_error,feature2 ; trying to use PWM idle and spark 2019 ; on FIDLE 83E1 CC84DC 2020 jmp done_checks 2021 2022 check4: ; check we don't have Water and Fan control as both use X2 83E4 C6E02E 2023 lda feature3_f 83E7 A508 2024 bit #WaterInjb 83E9 270B 2025 beq check5 2026 ; brclr WaterInj,feature3,check5 83EB 0B6408 2027 brclr X2_FAN,outputpins,check5 83EE 6E0595 2028 mov #5,tmp4 83F1 1E66 2029 bset config_error,feature2 ; X2 in conflict 2030 b_dc: 83F3 CC84DC 2031 jmp done_checks 2032 check5: 83F6 0F650F 2033 brclr Nitrous,feature1,check6 83F9 C6E02E 2034 lda feature3_f 83FC A508 2035 bit #WaterInjb 83FE 2708 2036 beq check6 2037 ; brclr WaterInj,feature3,check6 8400 6E0695 2038 mov #6,tmp4 8403 1E66 2039 bset config_error,feature2 ; X4 water/nitrous pin in conflict 8405 CC84DC 2040 jmp done_checks 2041 2042 check6: ;7pin HEI must have spark output B (LED19) defined. For bypass output 8408 0F630B 2043 brclr HEI7,personality,check7 840B 086408 2044 brset REUSE_LED19,outputpins,check7 840E 6E0795 2045 mov #7,tmp4 8411 1E66 2046 bset config_error,feature2 8413 CC84DC 2047 jmp done_checks 2048 2049 check7: ; do some checks on wasted spark outputs 8416 006C62 2050 brset rotary2,EnhancedBits5,check8a 2051 ; coilc is the pain - set if LED18=1 and LED18_2=1 8419 076B5D 2052 brclr wspk,EnhancedBits4,check8 ; don't bother if we 2053 ; aren't doing multiple outputs 841C 05635A 2054 brclr WHEEL,personality,check8 841F 086608 2055 brset out3sparkd,feature2,ck74 ; 4th output 8422 056418 2056 brclr REUSE_LED18,outputpins,ck72 ; not 3rd output 8425 076415 2057 brclr REUSE_LED18_2,outputpins,ck72 ; not 3rd output 8428 200B 2058 bra ck73 ; LED18=1 & LED18_2=1 2059 ck74: 842A C6E01C 2060 lda trig4_f 842D 271D 2061 beq ck7err 842F 05641A 2062 brclr REUSE_LED18,outputpins,ck7err 8432 076417 2063 brclr REUSE_LED18_2,outputpins,ck7err 2064 ck73: 8435 C6E01B 2065 lda trig3_f 8438 2712 2066 beq ck7err 843A 09640F 2067 brclr REUSE_LED19,outputpins,ck7err 2068 ck72: 843D C6E01A 2069 lda trig2_f 8440 270A 2070 beq ck7err 2071 ck72b: 8442 036407 2072 brclr REUSE_LED17,outputpins,ck7err 2073 ck71: 8445 C6E019 2074 lda trig1_f 8448 2702 2075 beq ck7err 844A 2008 2076 bra check7b ; passed all checks 2077 ck7err: 844C 6E0895 2078 mov #8,tmp4 844F 1E66 2079 bset config_error,feature2 8451 CC84DC 2080 jmp done_checks 2081 check7b: ; can't use FIDLE for spark if doing wasted spark 8454 016408 2082 brclr REUSE_FIDLE,outputpins,check7c 8457 6E0995 2083 mov #9,tmp4 845A 1E66 2084 bset config_error,feature2 845C CC84DC 2085 jmp done_checks 2086 2087 check7c: 2088 ;now check other way around 2089 ;first check for dual dizzy feature 845F C6E05C 2090 lda feature6_f 8462 A510 2091 bit #dualdizzyb 8464 2613 2092 bne check8 ; if dual dizzy then only 2 outputs anyway 2093 8466 C6E01C 2094 lda trig4_f ; if trig4 pt set must have 2095 ; spark o/p d 8469 2703 2096 beq ck7c3 846B 0966DE 2097 brclr out3sparkd,feature2,ck7err ; 4th output 2098 ck7c3: 846E C6E01B 2099 lda trig3_f ; if trig3 pt set must 2100 ; have spark o/p c 8471 2706 2101 beq check8 8473 0564D6 2102 brclr REUSE_LED18,outputpins,ck7err 8476 0764D3 2103 brclr REUSE_LED18_2,outputpins,ck7err 2104 2105 check8: 8479 2030 2106 bra check9 2107 check8a: 2108 ; do rotary2 output checks, must have led17,18,19 set to spark and two 2109 ; wheel triggers 847B 056418 2110 brclr REUSE_LED18,outputpins,ck8aerr 847E 076415 2111 brclr REUSE_LED18_2,outputpins,ck8aerr 8481 096412 2112 brclr REUSE_LED19,outputpins,ck8aerr 8484 03640F 2113 brclr REUSE_LED17,outputpins,ck8aerr 2114 ;now check wheel decoder is setup 8487 05631A 2115 brclr WHEEL,personality,ck8cerr 2116 ;check for two triggers 848A C6E01A 2117 lda trig2_f 848D 270E 2118 beq ck8berr 848F C6E019 2119 lda trig1_f 8492 2709 2120 beq ck8berr 8494 2015 2121 bra check9 2122 2123 ck8aerr: 8496 6E0A95 2124 mov #10T,tmp4 8499 1E66 2125 bset config_error,feature2 849B 203F 2126 bra done_checks 2127 ck8berr: 849D 6E0B95 2128 mov #11T,tmp4 84A0 1E66 2129 bset config_error,feature2 84A2 2038 2130 bra done_checks 2131 ck8cerr: 84A4 6E0C95 2132 mov #12T,tmp4 84A7 1E66 2133 bset config_error,feature2 84A9 2031 2134 bra done_checks 2135 2136 check9: 84AB 01640A 2137 brclr REUSE_FIDLE,outputpins,check10 84AE 036407 2138 brclr REUSE_LED17,outputpins,check10 84B1 6E0D95 2139 mov #13T,tmp4 84B4 1E66 2140 bset config_error,feature2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 30 MC68HC908GP32 User Bootloader 84B6 2024 2141 bra done_checks 2142 check10: 2143 ; count how many ignition types and if more than one give an error 84B8 4F 2144 clra 84B9 016301 2145 brclr MSNS,personality,check10a 84BC 4C 2146 inca 2147 check10a: 84BD 036301 2148 brclr MSNEON,personality,check10b 84C0 4C 2149 inca 2150 check10b: 84C1 056301 2151 brclr WHEEL,personality,check10c 84C4 4C 2152 inca 2153 check10c: 84C5 096301 2154 brclr EDIS,personality,check10d 84C8 4C 2155 inca 2156 check10d: 84C9 0D6301 2157 brclr TFI,personality,check10e 84CC 4C 2158 inca 2159 check10e: 84CD 0F6301 2160 brclr HEI7,personality,check10f 84D0 4C 2161 inca 2162 check10f: 84D1 A101 2163 cmp #1 84D3 2307 2164 bls check11 84D5 6E0E95 2165 mov #14T,tmp4 84D8 1E66 2166 bset config_error,feature2 84DA 2000 2167 bra done_checks 2168 2169 check11: 2170 done_checks: 2171 ;make sure all spark outputs are inactive as soon as poss 2172 84DC CDA390 2173 jsr turnallsparkoff ; subroutine 2174 2175 start_adc: 2176 ; Fire up the ADC, and perform three conversions to get the baro value, IAT 2177 ; and the clt temp 2178 84DF A670 2179 lda #%01110000 ; Set up divide 8 and internal bus clock source 84E1 B73E 2180 sta adclk 84E3 A600 2181 lda #%00000000 ; Select one conversion, no interrupt, AD0 84E5 B73C 2182 sta adscr 84E7 0F3CFD 2183 brclr coco,adscr,* ; wait until conversion is finished 2184 84EA B63D 2185 lda adr 84EC B743 2186 sta baro ; Store value in Barometer 2187 84EE A602 2188 lda #%00000010 ; Select second conversion, no interrupt, AD2 84F0 B73C 2189 sta adscr 84F2 0F3CFD 2190 brclr coco,adscr,* ; wait until conversion is finished 2191 84F5 BE3D 2192 ldx adr 84F7 D6F500 2193 lda THERMFACTOR,x 84FA B7CA 2194 sta coolant ; Coolant temperature in degrees F + 40 2195 84FC A603 2196 lda #%00000011 ; Select third conversion, no interrupt, AD3 84FE B73C 2197 sta adscr 8500 0F3CFD 2198 brclr coco,adscr,* ; wait until conversion is finished 2199 8503 BE3D 2200 ldx adr 8505 D6F700 2201 lda MATFACTOR,x 8508 C70104 2202 sta airTemp 850B 3F8C 2203 clr adsel ; Clear the channel selector 2204 TURN_ON_INTS: 850D 9A 2205 cli ; Turn on all interrupts now 2206 2207 *************************************************************************** 2208 ** Check for config error 2209 *************************************************************************** 850E 0E6675 2210 brset config_error,feature2,config_er1JMP 2211 2212 *************************************************************************** 2213 ** 2214 ** Prime Pulse - Shoot out one priming pulse of length PRIMEP now or 2215 ** after 2 seconds 2216 ** Also added the facility for 2 priming pulses P Ringwood 2217 ** 2218 *************************************************************************** 8511 1F68 2219 bclr Primed,EnhancedBits ; Clear the primed bit 8513 C6E82A 2220 lda feature11_f4 8516 A504 2221 bit #PrimeTwiceb 8518 2602 2222 bne Two_Primes 2223 ; brset PrimeTwice,feature6,Two_Primes ; Are we firing priming 2224 ; pulses twice? 851A 3CDF 2225 inc TCSparkCut ; Add 1 to prime counter 2226 ; so it only does it once 2227 Two_Primes: ; using spark cut byte to 2228 ; cut down bytes 851C C6E82A 2229 lda feature11_f4 851F A502 2230 bit #PrimeLateb 8521 2639 2231 bne PrimeLater 2232 ; brset PrimeLate,feature6,PrimeLater ; Are we going to prime late? 2233 2234 PrimeNow: 8523 3CDF 2235 inc TCSparkCut ; Increase Prime Pulse Counter 8525 B6DF 2236 lda TCSparkCut 2237 8527 A102 2238 cmp #02T ; Have we reached prime 2239 ; pulse count limit? 8529 2506 2240 blo Prime_Not_Done 852B 1E68 2241 bset Primed,EnhancedBits ; Set Primed bit high if 2242 ; we've done all pulses 852D A600 2243 lda #00T 852F B7DF 2244 sta TCSparkCut ; Clear this for use later 2245 2246 Prime_Not_Done: 8531 C6E82A 2247 lda feature11_f4 ; Priming pulse table or box? 8534 A508 2248 bit #NoPrimePb 8536 2714 2249 beq PrimeTable_P ; Prime table 2250 8538 C6E82D 2251 lda primePulse_f ; Prime pulse 853B 2702 2252 beq Prime_NoPrime ; if zero are we priming pump? 853D 2025 2253 bra prime ; Go do prime 2254 Prime_NoPrime: 853F C6E82A 2255 lda feature11_f4 ; zero pulse so are we priming pump? 8542 A501 2256 bit #AlwaysPrimeb 8544 2749 2257 beq CalcRunJMP ; zero and not fing pump 8546 1E68 2258 bset Primed,EnhancedBits ; We have primed now 8548 A600 2259 lda #00T ; firing pump, put 00 back in acc 854A 2018 2260 bra prime 2261 2262 PrimeTable_P: 2263 ; Interpolate from CLT, same curve as cranking PW. 2264 854C CD9F96 2265 jsr crankingModePrime 854F B697 2266 lda tmp6 8551 2011 2267 bra prime 2268 2269 NotPrimed: ; If were here we must 2270 ; be priming late 8553 B640 2271 lda secl 8555 A102 2272 cmp #02T ; Have we been powered up 2273 ; for 2 secs? 8557 24CA 2274 bhs PrimeNow ; Yes so fire prime pulse now 8559 CC9F25 2275 jmp Prime_Checked ; No so go back to main loop 2276 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 31 MC68HC908GP32 User Bootloader 2277 PrimeLater: 855C 1042 2278 bset running,engine 855E 1242 2279 bset crank,engine 8560 1000 2280 bset fuelp,porta ; Start the pump running 8562 207C 2281 bra CalcRunningParameters ; Don't pulse the injectors yet 2282 2283 prime: 2284 8564 1042 2285 bset running,engine 8566 1000 2286 bset fuelp,porta 8568 1666 2287 bset primebit,feature2 ;sph set prime bit, used in inj sched section 856A 97 2288 tax ;kg 856B A664 2289 lda #$64 ;kg 856D 42 2290 mul ;kg 856E BF4E 2291 stx pwcalch ;kg 8570 B74F 2292 sta pwcalcl ;kg 2293 ; sta pw1 2294 ; clr pwrun1 8572 1441 2295 bset sched1,squirt 8574 1041 2296 bset inj1,squirt 2297 8576 0D6508 2298 brclr CrankingPW2,feature1,doPrimeNow ;skip PW on 2nd channel 8579 BF54 2299 stx pwcalc2h ;kg 857B B755 2300 sta pwcalc2l ;kg 2301 ; sta pw2 2302 ; clr pwrun2 857D 1841 2303 bset sched2,squirt 857F 1241 2304 bset inj2,squirt 2305 2306 doPrimeNow: 8581 CDCF68 2307 jsr squirtCheck1 ;injection scheduling is now in IRQ section 2308 ;need to jump there and return, otherwise 2309 ;priming PW never happens without an IRQ event 8584 205A 2310 bra CalcRunningParameters 2311 2312 config_er1JMP: 8586 CC8591 2313 jmp config_error1 ; Config Error jump 2314 2315 PumpPrime: 8589 1242 2316 bset crank,engine 858B 1042 2317 bset running,engine 858D 1000 2318 bset fuelp,porta ; prime the pump 2319 CalcRunJMP: 858F 204F 2320 bra CalcRunningParameters ; Go start the main loop 2321 2322 ******** Config error dead end ********** 2323 ** Toggle these ports as a visual and audible indicator 2324 *************************************************************************** 2325 config_error1: 8591 121D 2326 bset IMASK,INTSCR ; disable interrupts for 2327 ; IRQ (the ignition i/p) 8593 1142 2328 bclr running,engine 8595 1000 2329 bset fuelp,porta 2330 ; bclr wled,portc 2331 2332 dead_end: 8597 1000 2333 bset fuelp,porta 2334 8599 B695 2335 lda tmp4 859B 2719 2336 beq skip_err_msg ; if zero then don't try 2337 ; to send 2338 2339 ;find start address or error message 859D B695 2340 lda tmp4 859F 48 2341 asla 85A0 97 2342 tax 85A1 8C 2343 clrh 85A2 D6DA0C 2344 lda error_vector,x 85A5 B796 2345 sta tmp5 85A7 5C 2346 incx 85A8 D6DA0C 2347 lda error_vector,x 85AB B797 2348 sta tmp6 2349 85AD 6E0D8A 2350 mov #$0D,txmode 85B0 1614 2351 bset TE,SCC2 ; Enable Transmit 85B2 1E14 2352 bset SCTIE,SCC2 ; Enable transmit interrupt 85B4 3F95 2353 clr tmp4 ; wipe error code so we 2354 ; only send it once 2355 ;if we keep sending it then it gets in the way of tuning software trying to 2356 ;read and write data to put the error right. e.g. you send 'R' but the code 2357 ;is in the middle of sending a message 2358 skip_err_msg: 2359 85B6 6E1092 2360 mov #10,tmp1 2361 dead_loop1 85B9 3F93 2362 clr tmp2 2363 dead_loop2: 85BB 3F94 2364 clr tmp3 2365 dead_loop3: 85BD 3A94 2366 dec tmp3 85BF 26FC 2367 bne dead_loop3 85C1 3A93 2368 dec tmp2 85C3 26F6 2369 bne dead_loop2 85C5 3A92 2370 dec tmp1 85C7 26F0 2371 bne dead_loop1 2372 85C9 1100 2373 bclr fuelp,porta 2374 85CB 6E1092 2375 mov #10,tmp1 2376 dead_loop4 85CE 3F93 2377 clr tmp2 2378 dead_loop5: 85D0 3F94 2379 clr tmp3 2380 dead_loop6: 85D2 3A94 2381 dec tmp3 85D4 26FC 2382 bne dead_loop6 85D6 3A93 2383 dec tmp2 85D8 26F6 2384 bne dead_loop5 85DA 3A92 2385 dec tmp1 85DC 26F0 2386 bne dead_loop4 2387 85DE 20B7 2388 bra dead_end 2389 2390 ***************************************************************************** 2391 ***************************************************************************** 2392 ** 2393 ** Correction Factor Lookup Table Access 2394 ** 2395 ** Perform table lookup for barometer and air density correction factors, 2396 ** and performs coolant temperature conversion from counts to degrees F. 2397 ** 2398 ** All tables are pre-computed for all 256 different values 2399 ** and stored in FLASH. 2400 ** 2401 ** Note: Coolant temperature is in degrees F plus 40 - this allows 2402 ** unsigned numbers for full temperature range of -40 to 215. 2403 ** 2404 *************************************************************************** 2405 CalcRunningParameters: 2406 2407 ******************************* 85E0 8C 2408 clrh 85E1 0E6922 2409 brset OneShotBaro,EnhancedBits2,bEnd_of_Baro ; Only do this once 2410 ; as we may change the baro value 85E4 C6E1B8 2411 lda config13_f1 ; Are we doing baro at all? 85E7 A508 2412 bit #c13_bc msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 32 MC68HC908GP32 User Bootloader 85E9 271E 2413 beq non_baro 2414 85EB C6E0B8 2415 lda feature9_f 85EE A580 2416 bit #ConsBarCorb ; Are we doing constant Bar Corr using map on X7 ?? 85F0 262C 2417 bne ConsBar 2418 85F2 C6E1B8 2419 lda config13_f1 85F5 A504 2420 bit #c13_cs ; Are we doing Alpha_n? 85F7 2721 2421 beq OneShot_Bar ; No so one shot baro only! 2422 85F9 C6E0B8 2423 lda feature9_f ; Are we doing constant baro correction using 85FC A508 2424 bit #BaroCorConstb ; the on board map in Alpha_n mode? 85FE 271A 2425 beq OneShot_Bar 8600 B644 2426 lda map 8602 B743 2427 sta baro ; Store the map in the baro variable 8604 201C 2428 bra DoBaroCorr 2429 2430 bEnd_of_Baro: 8606 CC8667 2431 jmp End_of_Baro ; extend branch below 2432 2433 non_baro: 8609 1E69 2434 bset OneShotBaro,EnhancedBits2 ; only do this once 2435 2436 ; not doing any baro, so use fixed Pambient and 100% baro correction 860B C6E0B9 2437 lda Pambient_f ; load in flash data. Let the user choose the setpoint 860E A114 2438 cmp #20T 8610 2202 2439 bhi st_pamb 8612 A664 2440 lda #100T ; if a silly low (or zero) value is set then use default 2441 st_pamb: 8614 B7C8 2442 sta Pambient ;decide which hardcoded limit to use for starting boost control 8616 A664 2443 lda #100T 8618 204B 2444 bra DoneBaroCorr 2445 2446 OneShot_Bar: 861A 1E69 2447 bset OneShotBaro,EnhancedBits2 861C 2004 2448 bra DoBaroCorr 2449 2450 ConsBar: ; MAP connected to X7, so using constant BARO COR 861E B65C 2451 lda o2_fpadc 8620 B743 2452 sta baro 2453 2454 DoBaroCorr: 8622 BE43 2455 ldx baro 2456 ;check if within sensible range 8624 C3E052 2457 cpx BaroHi_f 8627 2505 2458 blo Baro_Lo_Check 8629 CEE052 2459 ldx BaroHi_f 862C 2008 2460 bra Do_Baro 2461 Baro_Lo_Check: 862E C3E053 2462 cpx BaroLow_f 8631 2203 2463 bhi Do_Baro 8633 CEE053 2464 ldx BaroLow_f 2465 Do_Baro: 8636 BF43 2466 stx baro ; re-store whatever it ended up as 8638 C6E1B6 2467 lda config11_f1 863B A403 2468 and #$03 ; What MAP sensor? 863D 271E 2469 beq do_baro4115 863F 41020D 2470 cbeqa #2T,do_baro_6300 8642 410311 2471 cbeqa #3T,do_baro_6400 2472 2473 ;do_baro_4250: 8645 D6F400 2474 lda KPAFACTOR4250,x 8648 B7C8 2475 sta Pambient 864A D6F200 2476 lda BAROFAC4250,x 864D 2016 2477 bra DoneBaroCorr 2478 2479 do_baro_6300: 864F BFC8 2480 stx Pambient ; use raw ADC 8651 D6F000 2481 lda BAROFAC300k,x 8654 200F 2482 bra DoneBaroCorr 2483 2484 do_baro_6400: 8656 BFC8 2485 stx Pambient ; use raw ADC 8658 D6F800 2486 lda BAROFAC400k,x 865B 2008 2487 bra DoneBaroCorr 2488 2489 do_baro4115: 865D D6F300 2490 lda KPAFACTOR4115,x 8660 B7C8 2491 sta Pambient 8662 D6F100 2492 lda BAROFAC4115,x 2493 DoneBaroCorr: 8665 B751 2494 sta barocor ; Barometer Correction Gamma 2495 End_of_Baro: 2496 2497 ;now convert map ADC count into internal kpa 8667 BE44 2498 ldx map 8669 C6E1B6 2499 lda config11_f1 866C A403 2500 and #$03 866E 410108 2501 cbeqa #1T,do_kpa4250 8671 41020F 2502 cbeqa #2T,do_kpa6300 8674 410311 2503 cbeqa #3T,do_kpa6400 8677 2005 2504 bra do_kpa4115 2505 2506 2507 do_kpa4250: 8679 D6F400 2508 lda KPAFACTOR4250,x 867C 200E 2509 bra Donekpa 2510 2511 do_kpa4115: 867E D6F300 2512 lda KPAFACTOR4115,x 8681 2009 2513 bra Donekpa 2514 2515 do_kpa6300: 8683 B644 2516 lda map ; Use Raw ADC value + offset if 300/400 KPa 8685 4C 2517 inca ; instead of KPAFACTOR 8686 2004 2518 bra Donekpa 2519 2520 do_kpa6400: 8688 B644 2521 lda map ; Use Raw ADC value + offset if 300/400 KPa 868A 4C 2522 inca 868B 4C 2523 inca ; instead of KPAFACTOR 2524 2525 Donekpa: 868C B7C9 2526 sta kpa 2527 2528 ; determine if we are running % baro or straight SD 868E C6E074 2529 lda feature8_f 8691 A501 2530 bit #perbarob ; Are we doing % baro load lookup 8693 2604 2531 bne perbaro_load ; if yes, calc load besed on map/baro*100 8695 B6C9 2532 lda kpa ; otherwise load KPA into the Load variable 8697 2032 2533 bra Done_load_c 2534 perbaro_load: 2535 ; calculate load value map/baro*100 kg 8699 C6E1B6 2536 lda config11_f1 869C A403 2537 and #$03 869E 410108 2538 cbeqa #1T,Load_4250 86A1 41021D 2539 cbeqa #2T,Load_6300 86A4 41031A 2540 cbeqa #3T,Load_6300 ; since it is raw calcs, this is irrelevant for the calcs here 86A7 200C 2541 bra load_4115 2542 2543 Load_4250: ; for standard sensor, we have calibrated values 86A9 B6C9 2544 lda kpa ; calibrated value 4250 86AB AE64 2545 ldx #100T 86AD 42 2546 mul ; (result in x:a) 86AE 89 2547 pshx 86AF 8A 2548 pulh msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 33 MC68HC908GP32 User Bootloader 86B0 BEC8 2549 ldx Pambient ; calibrated value 86B2 52 2550 div ; (h:a / x -> a rem h) 86B3 2016 2551 bra Done_load_c 2552 2553 Load_4115: ; ditto the 4115 86B5 B6C9 2554 lda kpa ; calibrated value 4115 86B7 AE64 2555 ldx #100T 86B9 42 2556 mul ; (result in x:a) 86BA 89 2557 pshx 86BB 8A 2558 pulh 86BC BEC8 2559 ldx Pambient ; calibrated value 86BE 52 2560 div ; (h:a / x -> a rem h) 86BF 200A 2561 bra Done_load_c 2562 2563 Load_6300: ; 3 and 4 bar have to be scaled, kpa already has done, we need to use unscaled values to get % 86C1 B644 2564 lda map ; ADC value of MAP sensor 86C3 AE64 2565 ldx #100T 86C5 42 2566 mul ; (result in x:a) 86C6 89 2567 pshx 86C7 8A 2568 pulh 86C8 BE43 2569 ldx baro ; ADC value of barometer 86CA 52 2570 div ; (h:a / x -> a rem h)lda map ; Use Raw ADC value + offset if 300/400 KPa 2571 2572 Done_load_c: 86CB 8C 2573 clrh ; without this, PWs go all wonky - KG 86CC C70110 2574 sta engineLoad ; Load value in % for % baro calculations. Will need to be resolved into sensor cals for VE lookup in the loop 2575 86CF BE46 2576 ldx clt 86D1 D6F500 2577 lda THERMFACTOR,x 86D4 B7CA 2578 sta coolant ; Coolant temperature in degrees F + 40 2579 86D6 BE45 2580 ldx mat 86D8 D6F700 2581 lda MATFACTOR,x 86DB C70104 2582 sta airTemp ; Added for enhanced stuff Air Temp in F + 40 2583 86DE C6E0B8 2584 lda feature9_f ; Are we using a MAF? 86E1 A520 2585 bit #MassAirFlwb 86E3 270C 2586 beq Do_AirDens 86E5 C6E0B8 2587 lda feature9_f ; Using MAF, so do we still do Air Cor? 86E8 A540 2588 bit #NoAirFactorb 86EA 2705 2589 beq Do_AirDens 86EC A664 2590 lda #100T ; No Air Cor so set it to 100% 86EE CC8772 2591 jmp Store_AirCor 2592 2593 Do_AirDens: ; Not using a Air correction within a MAF 2594 2595 ;******** CHECK IF CORRECTING AIR DENSITY ***************** 86F1 C6E810 2596 lda feature13_f 86F4 A508 2597 bit #cltMAPb ; Are we correcting the air density factor? 86F6 2775 2598 beq NormAirDen ; If no then do normal air density 2599 2600 ; If we get here we are doing correction to air density 2601 ; Air Density = IAT Air Density * (Correction * Reduction based on RPM %) 2602 86F8 45E838 2603 ldhx #CltMATRange ; Temps for table 86FB 3592 2604 sthx tmp1 86FD A606 2605 lda #$06 ; 7 bytes big 86FF B794 2606 sta tmp3 2607 8701 C6E810 2608 lda feature13_f 8704 A510 2609 bit #CltMATCheckb 8706 2705 2610 beq CoolantRel ; Are we using Coolant or IAT for correction? 8708 C60104 2611 lda airTemp ; MAT based correction 870B 2002 2612 bra MATRel 2613 2614 CoolantRel: 870D B6CA 2615 lda coolant ; Coolant based correction 2616 MATRel: 870F B795 2617 sta tmp4 8711 CDD503 2618 jsr tableLookup ; Find the lookup place for coolant 2619 ; corr in table 8714 8C 2620 clrh 8715 BE96 2621 ldx tmp5 8717 D6E82F 2622 lda cltMATcorr_f,x ; From correction table to correct Density 871A B795 2623 sta liY2 871C 5A 2624 decx 871D D6E82F 2625 lda cltMATcorr_f,x 8720 B794 2626 sta liY1 2627 8722 C6E810 2628 lda feature13_f 8725 A510 2629 bit #CltMATCheckb 8727 2705 2630 beq CoolantTabl ; Are we using Coolant or IAT for correction? 8729 C60104 2631 lda airTemp 872C 2002 2632 bra StoreCoret 2633 2634 CoolantTabl: 872E B6CA 2635 lda coolant 2636 StoreCoret: 8730 B796 2637 sta liX 8732 CDD51E 2638 jsr LinInterp 8735 4E97D9 2639 mov tmp6,tmp31 ; Tmp31 now contains correction percentage 2640 2641 ; So now we have the correction for Air Den, now interpolate the RPM to reduce this if needed due to engine speed 2642 ; We do this by having 2 RPM set points, below Lowest is all of calculated coolant correction, above it is interpolated. 2643 8738 B64D 2644 lda rpm 873A C1E836 2645 cmp RPMReduLo_f ; Are we below the min reduction value? 873D 251C 2646 blo Do_Cal_Red1 ; YES so no reduction on correction factor 873F B64D 2647 lda rpm 8741 B796 2648 sta liX ; Store current value to see where we are 8743 C6E837 2649 lda RPMReduHi_f 8746 B793 2650 sta liX2 ; Highest point to stop all correction 8748 C6E836 2651 lda RPMReduLo_f 874B B792 2652 sta liX1 ; Lowest point to start to remove correction 874D B6D9 2653 lda tmp31 ; This is the coolant correction value 874F B794 2654 sta liY1 8751 A664 2655 lda #100T 8753 B795 2656 sta liY2 ; 100% correction when at this setpoint (No correction) 8755 CDD51E 2657 jsr LinInterp ; Find How much we want to reduce by. 8758 4E97D9 2658 mov tmp6,tmp31 ; tmp31 now contains coolant correction * 0-100% reduction depending on RPM 2659 2660 Do_Cal_Red1: 875B 8C 2661 clrh 875C BE45 2662 ldx mat 875E D6F600 2663 lda AIRDENFACTOR,x ; Find normal Air Density 2664 ; sta tmp10 2665 ; clr tmp11 2666 ; lda tmp31 2667 ; sta tmp12 2668 ; clr tmp13 2669 ; jsr Supernorm ; Multiply Norm AirDen with correction 2670 ; mov tmp10,AirCor ; Now we have amount of correction based on correction * RPM reduction% 2671 ;why use SuperNorm when remainder is zero and we discard output remainder? 2672 ;want to do airdenfactor * tmp31 / 100 8761 BED9 2673 ldx tmp31 8763 42 2674 mul ; (result in x:a) 8764 89 2675 pshx 8765 8A 2676 pulh 8766 AE64 2677 ldx #100T 8768 52 2678 div ; (h:a / x -> a rem h) 8769 B74B 2679 sta AirCor 876B 2007 2680 bra Do_Mat_Fact ; jump past normal Air Density 2681 2682 ;******** NORMAL AIR DENSITY ************************************** 2683 NormAirDen: 876D BE45 2684 ldx mat msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 34 MC68HC908GP32 User Bootloader 876F D6F600 2685 lda AIRDENFACTOR,x 2686 Store_AirCor: 8772 B74B 2687 sta AirCor ; Air Density Correction Factor 2688 2689 Do_Mat_Fact: 2690 2691 *************************************************************************** 2692 ** 2693 ** Computation of RPM 2694 ** 2695 ** Result left in accumulator. 2696 ** 2697 ** rpmk:rpmk+1 2698 ** ----------- = rpm 2699 ** rpmph:rpmpl 2700 ** 2701 ** rpmk:rpmK+1 = RPM constant = (6,000 * (stroke/2))/ncyl 2702 ** rpmph:rpmpl = period count between IRQ pulsed lines, in 0.1 ms resolution 2703 ** 2704 **************************************************************************** 2705 2706 CalcRPM: 2707 ; 50% re-written in 026i with aim of better odd-fire averaging 2708 8774 004207 2709 brset running,engine,dorpmCalc 8777 556E 2710 ldhx rpmph 8779 2603 2711 bne dorpmCalc ; If zero then jump over calculation 2712 ; - prevent divide by zero 877B CC880D 2713 jmp rpmCalcZero ; previous branches out of range 2714 2715 dorpmCalc: 2716 ;tmp12,13,14 used to hold average iTime or avg iTime 877E 9B 2717 sei ; must block ints for this little period 877F 4EAC9D 2718 mov iTimeX,tmp12 8782 4EAD9E 2719 mov iTimeH,tmp13 8785 4EAE9F 2720 mov iTimeL,tmp14 2721 8788 4EF9A0 2722 mov iTimepX,tmp15 878B 4EFAA1 2723 mov iTimepH,tmp16 878E 4EFBA2 2724 mov iTimepL,tmp17 8791 9A 2725 cli 2726 2727 ; If odd-fire is set (bit zero of Config13), then average RPM values 8792 C6E1B8 2728 lda config13_f1 8795 A401 2729 and #$01 8797 2717 2730 beq NO_ODD_FIRE 2731 2732 YES_ODD_FIRE: 2733 ;average previous period with previous previous 8799 B6A2 2734 lda tmp17 ; add together 879B BB9F 2735 add tmp14 879D B79F 2736 sta tmp14 879F B6A1 2737 lda tmp16 87A1 B99E 2738 adc tmp13 87A3 B79E 2739 sta tmp13 87A5 B6A0 2740 lda tmp15 87A7 B99D 2741 adc tmp12 87A9 44 2742 lsra ; divide by 2 87AA B79D 2743 sta tmp12 87AC 369E 2744 ror tmp13 87AE 369F 2745 ror tmp14 2746 2747 NO_ODD_FIRE: 87B0 B69D 2748 lda tmp12 87B2 2731 2749 beq rpmCalcFast ; If we have only 8-bit denominator, 2750 ; then use native divide 2751 2752 ;note, udvd32 re-written so that it uses 2753 ;tmp1,2,3,4 as intacc1 2754 ;tmp5,6,7,8 as intacc2 2755 ;tmp9,10,11 as temp storage instead of extra stack 2756 2757 rpmCalcSlow: 2758 ;need to divide period (tmp12,13,14) by 100 to obtain period time in 0.1ms 87B4 AE64 2759 ldx #100T 87B6 8C 2760 clrh 87B7 B69D 2761 lda tmp12 87B9 52 2762 div ; A rem H = (H:A) / X 87BA B79D 2763 sta tmp12 87BC B69E 2764 lda tmp13 87BE 52 2765 div ; A rem H = (H:A) / X 87BF B79E 2766 sta tmp13 87C1 B69F 2767 lda tmp14 87C3 52 2768 div ; A rem H = (H:A) / X 87C4 B79F 2769 sta tmp14 2770 87C6 B69D 2771 lda tmp12 87C8 2643 2772 bne rpmCalcZero ; if tmp12>0 then very slow indeed (<100rpm) 2773 2774 87CA 3F92 2775 clr intacc1 87CC 3F93 2776 clr intacc1+1 2777 87CE 4E9E96 2778 mov tmp13,intacc2 87D1 4E9F97 2779 mov tmp14,intacc2+1 2780 87D4 C6E19C 2781 lda rpmk_f1 87D7 B794 2782 sta intacc1+2 87D9 C6E19D 2783 lda rpmk_f1+1 87DC B795 2784 sta intacc1+3 2785 87DE CDD59B 2786 jsr udvd32 ; 32 / 16 divide 2787 87E1 B695 2788 lda intacc1+3 ; get 8-bit RPM result 87E3 2029 2789 bra rpmCalcDone 2790 2791 rpmCalcFast: 2792 ;This (new) slower code takes the time between IRQs in 1us accuracy to calc the rpm 2793 ;this should eliminate the jumpiness at high rpm where one 0.1ms step > 100rpm 2794 ; 2795 ;Multiply rpmk x 100 then do 32/16 divide using 1us time 87E5 A664 2796 lda #100T 87E7 CEE19D 2797 ldx rpmk_f1+1 ; LSB of multiplicand. 87EA 42 2798 mul 87EB B795 2799 sta intacc1+3 ; LSB of result stored. 87ED BF94 2800 stx intacc1+2 ; Carry on stack. 87EF A664 2801 lda #100T 87F1 CEE19C 2802 ldx rpmk_f1 ; MSB of multiplicand. 87F4 42 2803 mul 87F5 BB94 2804 add intacc1+2 ; Add in carry from LSB. 87F7 B794 2805 sta intacc1+2 ; MSB of result. 87F9 2401 2806 bcc nox_of 87FB 5C 2807 incx 2808 nox_of: 87FC BF93 2809 stx intacc1+1 87FE 3F92 2810 clr intacc1 2811 ;rpmk x 100 now dividend 2812 ;make iTime the divisor 8800 4E9E96 2813 mov tmp13,intacc2 8803 4E9F97 2814 mov tmp14,intacc2+1 8806 CDD59B 2815 jsr udvd32 ; 32/16 divide 2816 8809 B695 2817 lda intacc1+3 ; get 8-bit RPM result 880B 2001 2818 bra rpmCalcDone 2819 2820 rpmCalcZero: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 35 MC68HC908GP32 User Bootloader 880D 4F 2821 clra 2822 2823 rpmCalcDone: 880E B74D 2824 sta rpm 2825 2826 *************************************************************************** 2827 ** First, check RPM value to determine if we are cranking or running, 2828 ** then calculate the appropriate pulse width. 2829 *************************************************************************** 2830 CalcPWs: 8810 B64D 2831 lda rpm 8812 C1E82B 2832 cmp crankRPM_f ; Check if we are cranking, 8815 2209 2833 bhi runIt 8817 066906 2834 brset cant_crank,EnhancedBits2,runIt ; don't allow reentry 2835 ; to crank mode while 2836 ; running 2837 crankIt: 881A CD9F93 2838 jsr crankingMode 881D CC924D 2839 jmp checkRPMsettings 2840 runIt: 2841 2842 ;-------------------------------------------------------------------------- 2843 ; Approximate ranges of the various terms of the equation: 2844 ; 2845 ; gammae 90-150, highest when cold, but really of no consequence. 2846 ; vecurr 10-200, biggest range with blown motors. 2847 ; kPa 20-250, biggest range with blown motors. 2848 ; reqFuel 50-150, lowest values with big injectors, blown motors again. 2849 ; battcorr ~100, assume it's constant. 2850 ; 2851 ; So calc VEcurr * reqFuel before * kPa to minimize overflow. 2852 2853 ; calc 'PW1' from table 1 8820 156B 2854 bclr page2,EnhancedBits4 ; set table 1 2855 8822 0D6803 2856 brclr UseVE3,EnhancedBits,Do_VE1_4_Now ; Jump if aren't using VE table 3 8825 CC88DC 2857 jmp VE3_Table 2858 Do_VE1_4_Now: 2859 2860 *************************************************************************** 2861 *************************************************************************** 2862 ** uses tmp1 - tmp19 2863 ** VE 3-D Table Lookup 2864 ** 2865 ** This is used to determine value of VE based on RPM and MAP 2866 ** The table looks like: 2867 ** 2868 ** 105 +....+....+....+....+....+....+....+ 2869 ** .................................... 2870 ** 100 +....+....+....+....+....+....+....+ 2871 ** ... 2872 ** KPA ... 2873 ** ... 2874 ** 35 +....+....+....+....+....+....+....+ 2875 ** 5 15 25 35 45 55 65 75 RPM/100 2876 ** 2877 ** 2878 ** Steps: 2879 ** 1) Find the bracketing KPA positions via tableLookup, put index in 2880 ** tmp8 and bounding values in tmp9(kpa1) and tmp10(kpa2) 2881 ** 2) Find the bracketing RPM positions via tableLookup, store index 2882 ** in tmp11 and bounding values in tmp13(rpm1) and tmp14(rpm2) 2883 ** 3) Using the VE table, find the table VE values for tmp15=VE(kpa1,rpm1), 2884 ** tmp16=VE(kpa1,rpm2), tmp17 = VE(kpa2,rpm1), and tmp18 = VE(kpa2,rpm2) 2885 ** 4) Find the interpolated VE value at the lower KPA range : 2886 ** x1=rpm1, x2=rpm2, y1=VE(kpa1,rpm1), y2=VE(kpa1,rpm2) - put in tmp19 2887 ** 5) Find the interpolated VE value at the upper KPA range : 2888 ** x1=rpm1, x2=rpm2, y1=VE(kpa2,rpm1), y2=VE(kpa2,rpm2) - put in tmp11 2889 ** 6) Find the final VE value using the two interpolated VE values: 2890 ** x1=kpa1, x2=kpa2, y1=VE_FROM_STEP_4, y2=VE_FROM_STEP_5 2891 ** 2892 *************************************************************************** 2893 2894 *************************************************************************** 2895 ** JSM changed it to just be one routine per page. Maybe Eric will kill 2896 ** me, but we've plenty of flash and I'm obviously a bit lazy. 2897 *************************************************************************** 2898 2899 VE1_LOOKUP: ; ALWAYS page 1 8828 8C 2900 clrh 8829 5F 2901 clrx 2902 882A C6E0B8 2903 lda feature9_f 882D A520 2904 bit #MassAirFlwb 882F 2704 2905 beq VE1_LOOKUP_PW1 ; Are we using a MAF on pin X7? 8831 B65C 2906 lda o2_fpadc ; Using MAF thats on pin X7 8833 200E 2907 bra VE1_STEP_1 2908 2909 VE1_LOOKUP_PW1: 8835 C6E1B8 2910 lda config13_f1 8838 A504 2911 bit #c13_cs 883A 2605 2912 bne VE1_AN ; Using Alpha_n? 883C C60110 2913 lda engineLoad ; SD, so use kpa for load 883F 2002 2914 bra VE1_STEP_1 2915 2916 VE1_AN: 8841 B647 2917 lda tps ; Alpha_n 2918 2919 VE1_STEP_1: 8843 B7D8 2920 sta kpa_n 8845 45E1AA 2921 ldhx #KPARANGEVE_f1 8848 3592 2922 sthx tmp1 884A A60B 2923 lda #$0b ; 12x12 884C B794 2924 sta tmp3 884E B6D8 2925 lda kpa_n 8850 B795 2926 sta tmp4 8852 CDD503 2927 jsr tableLookup 8855 B692 2928 lda tmp1 8857 B693 2929 lda tmp2 8859 4E9699 2930 mov tmp5,tmp8 ; Index 885C 4E929A 2931 mov tmp1,tmp9 ; X1 885F 4E939B 2932 mov tmp2,tmp10 ; X2 2933 2934 VE1_STEP_2: 8862 45E19E 2935 ldhx #RPMRANGEVE_f1 8865 3592 2936 sthx tmp1 8867 6E0B94 2937 mov #$0b,tmp3 ; 12x12 886A 4E4D95 2938 mov rpm,tmp4 886D CDD503 2939 jsr tableLookup 8870 4E969C 2940 mov tmp5,tmp11 ; Index 8873 4E929E 2941 mov tmp1,tmp13 ; X1 8876 4E939F 2942 mov tmp2,tmp14 ; X2 2943 2944 VE1_STEP_3: 8879 8C 2945 clrh 887A AE0C 2946 ldx #$0c ; 12x12 887C B699 2947 lda tmp8 887E 4A 2948 deca 887F 42 2949 mul 8880 BB9C 2950 add tmp11 8882 4A 2951 deca 8883 97 2952 tax 8884 macro 2953 VE1X 8884 C60102 2954 LDA PAGE 8887 A101 2955 CMP #01T 8889 2605 2956 BNE VE1XF msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 36 MC68HC908GP32 User Bootloader 888B D60114 2957 LDA VE_R,X 888E 2003 2958 BRA VE1XC 8890 D6E100 2959 VE1XF: LDA VE_F1,X 2960 VE1XC: 8893 B7A0 2961 sta tmp15 8895 5C 2962 incx 8896 macro 2963 VE1X 8896 C60102 2964 LDA PAGE 8899 A101 2965 CMP #01T 889B 2605 2966 BNE VE1XF 889D D60114 2967 LDA VE_R,X 88A0 2003 2968 BRA VE1XC 88A2 D6E100 2969 VE1XF: LDA VE_F1,X 2970 VE1XC: 88A5 B7A1 2971 sta tmp16 88A7 AE0C 2972 ldx #$0c ; 12x12 88A9 B699 2973 lda tmp8 88AB 42 2974 mul 88AC BB9C 2975 add tmp11 88AE 4A 2976 deca 88AF 97 2977 tax 88B0 macro 2978 VE1X 88B0 C60102 2979 LDA PAGE 88B3 A101 2980 CMP #01T 88B5 2605 2981 BNE VE1XF 88B7 D60114 2982 LDA VE_R,X 88BA 2003 2983 BRA VE1XC 88BC D6E100 2984 VE1XF: LDA VE_F1,X 2985 VE1XC: 88BF B7A2 2986 sta tmp17 88C1 5C 2987 incx 88C2 macro 2988 VE1X 88C2 C60102 2989 LDA PAGE 88C5 A101 2990 CMP #01T 88C7 2605 2991 BNE VE1XF 88C9 D60114 2992 LDA VE_R,X 88CC 2003 2993 BRA VE1XC 88CE D6E100 2994 VE1XF: LDA VE_F1,X 2995 VE1XC: 88D1 B7A3 2996 sta tmp18 2997 88D3 CDA17A 2998 jsr VE_STEP_4 88D6 4E9753 2999 mov tmp6,vecurr 3000 88D9 CC8994 3001 jmp No_VE3 3002 3003 VE3_Table: 88DC B6DC 3004 lda VE3Timer 88DE 2703 3005 beq VE3_LOOKUP 88E0 CC8828 3006 jmp Do_VE1_4_Now 3007 *************************************************************************** 3008 *** VE Table 3 Look up 3009 *************************************************************************** 3010 ** uses tmp1 - tmp19 3011 VE3_LOOKUP: ; ALWAYS page 3 88E3 8C 3012 clrh 88E4 5F 3013 clrx 3014 88E5 C6E0B8 3015 lda feature9_f 88E8 A520 3016 bit #MassAirFlwb 88EA 2704 3017 beq VE3_LOOKUP_PW1 ; Are we using a MAF on pin X7? 3018 88EC B65C 3019 lda o2_fpadc ; Using MAF thats on pin X7 88EE 200E 3020 bra VE3_STEP_1 3021 3022 VE3_LOOKUP_PW1: 88F0 C6E1B8 3023 lda config13_f1 88F3 A504 3024 bit #c13_cs 88F5 2605 3025 bne VE3_AN ; if alpha-n 3026 88F7 C60110 3027 lda engineLoad ; SD, so use kpa for load 88FA 2002 3028 bra VE3_STEP_1 3029 3030 VE3_AN: 88FC B647 3031 lda tps 3032 3033 VE3_STEP_1: 88FE B7D8 3034 sta kpa_n 8900 45E59C 3035 ldhx #KPARANGEVE_f3 8903 3592 3036 sthx tmp1 8905 A60B 3037 lda #$0b ; 12x12 8907 B794 3038 sta tmp3 8909 B6D8 3039 lda kpa_n 890B B795 3040 sta tmp4 890D CDD503 3041 jsr tableLookup 8910 B692 3042 lda tmp1 8912 B693 3043 lda tmp2 8914 4E9699 3044 mov tmp5,tmp8 ; Index 8917 4E929A 3045 mov tmp1,tmp9 ; X1 891A 4E939B 3046 mov tmp2,tmp10 ; X2 3047 3048 VE3_STEP_2: 891D 45E590 3049 ldhx #RPMRANGEVE_f3 8920 3592 3050 sthx tmp1 8922 6E0B94 3051 mov #$0b,tmp3 ; 12x12 8925 4E4D95 3052 mov rpm,tmp4 8928 CDD503 3053 jsr tableLookup 892B 4E969C 3054 mov tmp5,tmp11 ; Index 892E 4E929E 3055 mov tmp1,tmp13 ; X1 8931 4E939F 3056 mov tmp2,tmp14 ; X2 3057 3058 VE3_STEP_3: 3059 8934 8C 3060 clrh 8935 AE0C 3061 ldx #$0c ; 12x12 8937 B699 3062 lda tmp8 8939 4A 3063 deca 893A 42 3064 mul 893B BB9C 3065 add tmp11 893D 4A 3066 deca 893E 97 3067 tax 893F macro 3068 VE5X 893F C60102 3069 LDA PAGE 8942 A105 3070 CMP #05T 8944 2605 3071 BNE VE5XF 8946 D60114 3072 LDA VE_R,X 8949 2003 3073 BRA VE5XC 894B D6E500 3074 VE5XF: LDA VE_F3,X 3075 VE5XC: 894E B7A0 3076 sta tmp15 8950 5C 3077 incx 8951 macro 3078 VE5X 8951 C60102 3079 LDA PAGE 8954 A105 3080 CMP #05T 8956 2605 3081 BNE VE5XF 8958 D60114 3082 LDA VE_R,X 895B 2003 3083 BRA VE5XC 895D D6E500 3084 VE5XF: LDA VE_F3,X 3085 VE5XC: 8960 B7A1 3086 sta tmp16 8962 AE0C 3087 ldx #$0c ; 12x12 8964 B699 3088 lda tmp8 8966 42 3089 mul 8967 BB9C 3090 add tmp11 8969 4A 3091 deca 896A 97 3092 tax msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 37 MC68HC908GP32 User Bootloader 896B macro 3093 VE5X 896B C60102 3094 LDA PAGE 896E A105 3095 CMP #05T 8970 2605 3096 BNE VE5XF 8972 D60114 3097 LDA VE_R,X 8975 2003 3098 BRA VE5XC 8977 D6E500 3099 VE5XF: LDA VE_F3,X 3100 VE5XC: 897A B7A2 3101 sta tmp17 897C 5C 3102 incx 897D macro 3103 VE5X 897D C60102 3104 LDA PAGE 8980 A105 3105 CMP #05T 8982 2605 3106 BNE VE5XF 8984 D60114 3107 LDA VE_R,X 8987 2003 3108 BRA VE5XC 8989 D6E500 3109 VE5XF: LDA VE_F3,X 3110 VE5XC: 898C B7A3 3111 sta tmp18 3112 898E CDA17A 3113 jsr VE_STEP_4 8991 4E9753 3114 mov tmp6,vecurr 3115 3116 No_VE3: 3117 3118 CalcGammaE: 3119 3120 ; Now we do all the WUE, TAE and EGO in sequence rather than subroutines 3121 ; (ram saving?) 3122 3123 *************************************************************************** 3124 ** PW Correction Factor subroutines. 3125 *************************************************************************** 3126 *************************************************************************** 3127 ** uses tmp1 - tmp6 and uses tmp31 for result 3128 ** Warm-up and After-start Enrichment Section 3129 ** 3130 ** The Warm-up enrichment is a linear interpolated value from WWU (10 points) 3131 ** which are placed at different temperatures 3132 ** 3133 ** Method: 3134 ** 3135 ** 1) Perform ordered table search of WWU (using coolant variable) to determine 3136 ** which bin. 3137 ** 2) Perform linear interpolation to get interpolated warmup enrichment 3138 ** 3139 ** Also, the after-start enrichment value is calculated and applied here - it 3140 ** is an added percent value on top of the warmup enrichment, and it is applied 3141 ** for the number of ignition cycles specified in AWC. This enrichment starts 3142 ** at a value of AWEV at first, then it linearly interpolates down to zero 3143 ** after AWC cycles. 3144 ** 3145 ** 3) If (startw, engine is set) then: 3146 ** 4) compare if (awc < ASEcount) then: 3147 ** 5) x1=0, x2=AWC, y1=AWEV, y2=0, x=ASEcount, y=ASEenrichment 3148 ** 6) else clear startw bit in engine 3149 ** 3150 ** During calcs we use tmp31 for result then store at end 3151 *************************************************************************** 3152 WUE_CALC: 8994 03420E 3153 brclr crank,engine,WUE1 ; already out of crank mode 8997 1342 3154 bclr crank,engine 8999 3FE1 3155 clr TCCycles 899B 3FDD 3156 clr TCAccel 899D 1442 3157 bset startw,engine 899F 1642 3158 bset warmup,engine 89A1 1F6B 3159 bclr FxdASEDone,EnhancedBits4 ; not done yet 89A3 3F81 3160 clr ASEcount 3161 WUE1: 89A5 064206 3162 brset warmup,engine,WUE1a ; only run code if in warmup 89A8 6E64D9 3163 mov #100T,tmp31 ; ensure wue is 100% 89AB CC8A73 3164 jmp WUE_DONE 3165 WUE1a: 89AE B6CA 3166 lda coolant 89B0 A1CD 3167 cmp #205T 89B2 242A 3168 bhs Warm_Done_Now ; If coolant is >165F (greater than the max setting) 3169 3170 ;Warm_NotDone: 89B4 45DDF5 3171 ldhx #WWURANGE 89B7 3592 3172 sthx tmp1 89B9 6E0994 3173 mov #$09,tmp3 89BC B6CA 3174 lda coolant 89BE B795 3175 sta tmp4 89C0 CDD503 3176 jsr tableLookup 3177 89C3 8C 3178 clrh 89C4 BE96 3179 ldx tmp5 89C6 D6E816 3180 lda WWU_f1,x 89C9 B795 3181 sta liY2 89CB 5A 3182 decx 89CC D6E816 3183 lda WWU_f1,x 89CF B794 3184 sta liY1 89D1 B6CA 3185 lda coolant 89D3 B796 3186 sta liX 89D5 CDD51E 3187 jsr LinInterp 89D8 B697 3188 lda tmp6 89DA B7D9 3189 sta tmp31 ; save result 89DC 2014 3190 bra WUE2 ; only end warmup when reached temp 3191 ; cmp #100T 3192 ; bhi WUE2 3193 3194 ; Outside of warmup range - clear warmup enrichment mode (also ends any ASE) 3195 Warm_Done_Now: 89DE 6E64D9 3196 mov #100T,tmp31 89E1 1E6B 3197 bset FxdASEDone,EnhancedBits4 89E3 1542 3198 bclr startw,engine 89E5 1742 3199 bclr warmup,engine 89E7 046405 3200 brset REUSE_LED18,outputpins,jWUE_DONE 89EA 066402 3201 brset REUSE_LED18_2,outputpins,jWUE_DONE ; Using led as output 4 89ED 1502 3202 bclr wled,portc ; not when crank sim or if 3203 ; LED re-used as IRQ indicator 3204 jWUE_DONE: 89EF CC8A73 3205 jmp WUE_DONE 3206 WUE2: 89F2 046405 3207 brset REUSE_LED18,outputpins,WUE2_ledskip 89F5 066402 3208 brset REUSE_LED18_2,outputpins,WUE2_ledskip ; Using led as output 4 89F8 1402 3209 bset wled,portc 3210 WUE2_ledskip: 89FA 0542F2 3211 brclr startw,engine,jWUE_DONE 3212 3213 ; Added a fixed period of ASE rather than a decaying ASE, after fixed period it 3214 ; goes to the normal ASE decay type of ASE 3215 3216 89FD C6E5B3 3217 lda feature10_f5 8A00 A502 3218 bit #ASEHoldb ; Are we holding the ASE at a fixed percentage? 8A02 2719 3219 beq NormASE_Count 8A04 0E6B16 3220 brset FxdASEDone,EnhancedBits4,NormASE_Count ; If Fixed ASE done 3221 8A07 B6CA 3222 lda coolant ; We are in fixed Accel mode 8A09 C1E5B5 3223 cmp CltFixASE_f ; so are we below the temperature setpoint? 8A0C 2504 3224 blo Cont_FixASE 8A0E 1E6B 3225 bset FxdASEDone,EnhancedBits4 8A10 200B 3226 bra NormASE_Count 3227 Cont_FixASE: 8A12 B681 3228 lda ASEcount msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 38 MC68HC908GP32 User Bootloader 8A14 C1E5B4 3229 cmp TimFixASE_f 8A17 250B 3230 blo Table_ASEStuff ; Have we passed the Fixed timer yet? 3231 8A19 3F81 3232 clr ASEcount ; Reset ASE count so we do the norm ASE now ???? 8A1B 1E6B 3233 bset FxdASEDone,EnhancedBits4 3234 NormASE_Count: 8A1D B681 3235 lda ASEcount 8A1F C1E5B2 3236 cmp awc_f1 ; Check if ASE period has expired. 8A22 244D 3237 bhs WUE3 3238 ; bra Table_ASEStuff 3239 ; Table ASE stuff based on coolant temp - PR 3240 Table_ASEStuff: 8A24 4ECA95 3241 mov coolant,tmp4 8A27 45DDF5 3242 ldhx #WWURANGE 8A2A 3592 3243 sthx tmp1 8A2C 6E0994 3244 mov #$09,tmp3 ; 10 bits wide 8A2F CDD503 3245 jsr tableLookup ; This finds the bins when the 3246 ; temperatures are set 8A32 8C 3247 clrh 8A33 BE96 3248 ldx tmp5 3249 8A35 D6E5A8 3250 lda ASEVTbl_f,x 8A38 B795 3251 sta liY2 8A3A 5A 3252 decx 8A3B D6E5A8 3253 lda ASEVTbl_f,x ; This finds the values for the 3254 ; ase percentage for the temperature 8A3E B794 3255 sta liY1 8A40 4ECA96 3256 mov coolant,liX 8A43 CDD51E 3257 jsr LinInterp ; tmp6 contains amount of ase 3258 ; enrichment in percent for this 3259 ; temperature 3260 8A46 3F92 3261 clr liX1 8A48 C6E5B2 3262 lda AWC_f1 8A4B B793 3263 sta liX2 3264 8A4D B697 3265 lda tmp6 ; Use the value from the interpolated 3266 ; table rather than the normal value 8A4F B794 3267 sta liY1 8A51 3F95 3268 clr liY2 8A53 3F96 3269 clr liX 8A55 C6E5B3 3270 lda feature10_f5 8A58 A502 3271 bit #ASEHoldb 8A5A 2703 3272 beq NormASE_Interp 8A5C 0F6B03 3273 brclr FxdASEDone,EnhancedBits4,All_ASECount 3274 NormASE_Interp: 8A5F 4E8196 3275 mov ASEcount,liX 3276 All_ASECount: 8A62 CDD51E 3277 jsr LinInterp 8A65 B697 3278 lda tmp6 8A67 BBD9 3279 add tmp31 8A69 2402 3280 bcc aacok 8A6B A6FF 3281 lda #255T ; overflowed, rail at 255% 3282 aacok: 8A6D B7D9 3283 sta tmp31 8A6F 2002 3284 bra WUE_DONE 3285 3286 WUE3: 8A71 1542 3287 bclr startw,engine ; ASE period terminated, turn off bit. 3288 3289 WUE_DONE: 8A73 4ED94C 3290 mov tmp31,warmcor ; only store in warmcor after all calcs 3291 *************************************************************************** 3292 ** 3293 ** Throttle Position Acceleration Enrichment 3294 ** 3295 ** Method is the following: 3296 ** 3297 ** 3298 ** ACCELERATION ENRICHMENT: 3299 ** If (TPS < TPSlast) goto DECELERATION ENLEANMENT 3300 ** If (TPS - TPSlast) > TPSthresh and TPSAEN == 0 { 3301 ** Turn on acceleration enrichment. 3302 ** 1) Set acceleration mode. 3303 ** 2) Continuously determine rate-of-change of throttle, and 3304 ** perform interpolation of TPSAQ values to determine 3305 ** acceleration enrichment amount to apply. 3306 ** } 3307 ** If (TPSACLK > TPSACLKCMP) and TPSAEN is set { 3308 ** 1) Clear TPSAEN engine bit. 3309 ** 2) Set TPSACCEL to 0 ms. 3310 ** 3) Go to EGO Delta Step Check Section. 3311 ** } 3312 ** 3313 ** 3314 ** DECELERATION ENLEANMENT: 3315 ** If (TPSlast - TPS) > TPSthresh { 3316 ** If TPSAEN == 1 { 3317 ** 1) TPSACCEL = 0 ms (terminate AE early) 3318 ** 2) Clear TPSAEN bit in ENGINE 3319 ** 3) Go to EGO Delta Step 3320 ** } 3321 ** If RPM > 15 { 3322 ** Turn on deceleration fuel cut. 3323 ** 1) Set TPSACCEL value to TPSDQ 3324 ** 2) Set TPSDEN bit in ENGINE 3325 ** 3) Go to EGO Delta Step Check Section 3326 ** } 3327 ** } 3328 ** else { 3329 ** If TPSDEN == 1 { 3330 ** 1) Clear TPSDEN bit in ENGINE 3331 ** 2) TPSACCEL = 0 ms 3332 ** 3) Go to EGO Delta Step Check Section 3333 ** } 3334 ** } 3335 ** 3336 *************************************************************************** 3337 TAE_CALC: 8A76 C6E042 3338 lda feature4_f 8A79 A580 3339 bit #KpaDotSetb 8A7B 2728 3340 beq tps_dotty 3341 ; brclr KpaDotSet,feature4,tps_dotty ; If not in KPA dot mode 3342 ; jump past KPa settings 8A7D A510 3343 bit #KpaDotBoostb 8A7F 2706 3344 beq No_Boost_Chk 3345 ; brclr KpaDotBoost,feature4,No_Boost_Chk; Are we going to stop 3346 ; accel in boost? 8A81 B6C9 3347 lda kpa 8A83 A164 3348 cmp #100T 8A85 2238 3349 bhi TAE_CHK_JMP1 ; If KPa above 100 then no 3350 ; accel deccel enrichment 3351 No_Boost_Chk: 8A87 C6E0B8 3352 lda feature9_f 8A8A A504 3353 bit #NoAccelASEb ; Are we Acceling during ASE? 8A8C 2703 3354 beq NoASE_Check_Accel 8A8E 04422E 3355 brset startw,engine,TAE_CHK_JMP1 ; Is After Start Enrichment running? 3356 3357 NoASE_Check_Accel: 8A91 9B 3358 sei 8A92 4EC992 3359 mov kpa,tmp1 ; Load kpa into temp1 8A95 B6CE 3360 lda TPSlast 8A97 B793 3361 sta tmp2 8A99 9A 3362 cli 8A9A B692 3363 lda tmp1 8A9C B193 3364 cmp tmp2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 39 MC68HC908GP32 User Bootloader 8A9E 2222 3365 bhi AE_CHK 8AA0 2717 3366 beq Dec_Accel 8AA2 CC8CCC 3367 jmp TDE 3368 3369 tps_dotty: 8AA5 9B 3370 sei 8AA6 4E4792 3371 mov tps,tmp1 8AA9 B6CE 3372 lda TPSlast 8AAB B793 3373 sta tmp2 8AAD 9A 3374 cli 8AAE B692 3375 lda tmp1 8AB0 B193 3376 cmp tmp2 8AB2 220E 3377 bhi AE_CHK 8AB4 2703 3378 beq Dec_Accel 8AB6 CC8CCC 3379 jmp TDE 3380 3381 Dec_Accel: ; Throttle steady but lets check if we have just triggered decel 8AB9 0B4206 3382 brclr TPSDEN,ENGINE,AE_CHK ; If we are not decel then check accel threshold 8ABC CC8CCC 3383 jmp TDE ; We are deceling so check decel timers, etc 3384 3385 TAE_CHK_JMP1: 8ABF CC8C11 3386 jmp TAE_CHK_TIME 3387 3388 AE_CHK: 8AC2 1B42 3389 bclr TPSDEN,ENGINE 8AC4 6E64D3 3390 mov #100T,TPSfuelCorr 8AC7 B093 3391 sub tmp2 8AC9 B7D9 3392 sta tmp31 8ACB C6E042 3393 lda feature4_f ; Are we in TPS or KPA mode? 8ACE A580 3394 bit #KpaDotSetb 8AD0 270D 3395 beq tps_ThreshCheck 8AD2 B6D9 3396 lda tmp31 8AD4 C1E05B 3397 cmp MAPthresh_f ; Are we above the Accel 3398 ; threshold for MAP? 8AD7 2413 3399 bhs AE_SET 8AD9 094261 3400 brclr TPSAEN,ENGINE,acc_done_led ; If we are not in AE mode then jump to end 8ADC CC8C11 3401 jmp TAE_CHK_TIME ; in AE mode so check timer 3402 3403 tps_ThreshCheck: 8ADF B6D9 3404 lda tmp31 8AE1 C1E0B2 3405 cmp TPSthresh_f1 ; Are we above the Accel 3406 ; threshold for TPS? 8AE4 2406 3407 bhs AE_SET 3408 8AE6 094254 3409 brclr TPSAEN,ENGINE,acc_done_led ; If we are not in AE mode then jump to end 8AE9 CC8C11 3410 jmp TAE_CHK_TIME 3411 AE_SET: 8AEC 084254 3412 brset TPSAEN,ENGINE,AE_COMP_SHOOT_AMT 3413 3414 ; Add in accel enrichment 8AEF C6E0B8 3415 lda feature9_f 8AF2 A510 3416 bit #RpmAEBased ; This is a basic AE system that uses 8AF4 2729 3417 beq NormalBased_AE ; RPM rather than dot 8AF6 45E095 3418 ldhx #RPMbasedrate_f ; Lets find out the actual AE with respects to RPM 8AF9 3592 3419 sthx tmp1 8AFB 6E0394 3420 mov #$03,tmp3 8AFE B64D 3421 lda rpm 8B00 B795 3422 sta tmp4 8B02 B79B 3423 sta tmp10 8B04 CDD503 3424 jsr tableLookup ; Find the rpm bins we are going to use 8B07 8C 3425 clrh 8B08 BE96 3426 ldx tmp5 8B0A D6E099 3427 lda RPMAQ_f2,x 8B0D B795 3428 sta liY2 8B0F 5A 3429 decx 8B10 D6E099 3430 lda RPMAQ_f2,x 8B13 B794 3431 sta liY1 8B15 4E9B96 3432 mov tmp10,liX 8B18 CDD51E 3433 jsr LinInterp 8B1B B697 3434 lda tmp6 8B1D 200F 3435 bra Store_TEA1 3436 3437 NormalBased_AE: 8B1F C6E042 3438 lda feature4_f 8B22 A580 3439 bit #KpaDotSetb 8B24 2705 3440 beq tps_FirstElem 8B26 C6E0A9 3441 lda MAPAQ_f ; start out using first element 3442 ; - will determine actual next 3443 ; time around 8B29 2003 3444 bra Store_TEA1 3445 3446 tps_FirstElem: 8B2B C6E0AD 3447 lda TPSAQ_f1 ; start out using first element 3448 ; - will determine actual next 3449 ; time around 3450 3451 Store_TEA1: 8B2E B750 3452 sta TPSACCEL ; Acceleration percent amount 3453 ; - used in later calculations 8B30 B786 3454 sta Decay_Accel 3455 RPMBackAE: 8B32 3F7F 3456 clr TPSACLK 8B34 1842 3457 bset TPSAEN,ENGINE 8B36 1B42 3458 bclr TPSDEN,ENGINE 8B38 086402 3459 brset REUSE_LED19,outputpins,acc_done_led ; LED already used 3460 ; in NEON as coilb 8B3B 1202 3461 bset aled,portc 3462 acc_done_led: 8B3D CC8D3D 3463 jmp TAE_DONE 3464 TAE_CHK_JMP: 8B40 CC8C11 3465 jmp TAE_CHK_TIME 3466 3467 ; First, calculate cold temperature add-on enrichment value from coolant value, 3468 ; from -40 degrees to 165 degrees. 3469 ; 3470 ; Then determine cold temperature multiplier value ACCELMULT (in percent), 3471 ; from -40 degrees to 165 degrees. 3472 ; 3473 ; Next, calculate squirt amount (quantity) for acceleration enrichment 3474 ; Find bins (between) for corresponding TPSdot, and linear interpolate 3475 ; to find enrichment amount (from TPSAQ). This is continuously 3476 ; checked every time thru main loop while in acceleration mode, 3477 ; and the highest value is latched and used. 3478 ; 3479 ; The final acceleration applied is: 3480 ; AE = Alookup(TPSdot) * (ACCELMULT/100) + TPSACOLD 3481 3482 AE_COMP_SHOOT_AMT: 3483 ; First, the amount based on cold temperatures 8B43 B64C 3484 lda warmcor 8B45 A164 3485 cmp #100T ; And if Warm corr = 100? 8B47 2731 3486 beq Warmup_OverAE 8B49 3F92 3487 clr liX1 ; 0 -> - 40 degrees 8B4B 6ECD93 3488 mov #205T,liX2 ; 165 + 40 degrees (because of 3489 ; offset in lookup table) 8B4E C6E0B1 3490 lda TPSACOLD_f1 8B51 B794 3491 sta liY1 ; This is the amount at coldest 8B53 3F95 3492 clr liY2 ; no enrichment addon at warm 3493 ; temperature 8B55 B6CA 3494 lda coolant 8B57 B796 3495 sta liX 8B59 CDD51E 3496 jsr LinInterp 8B5C 4E979E 3497 mov liY,tmp13 ; result - save here temporarily 3498 3499 ; Second, find the multiplier (ACCELMULT) amount based on cold temperatures 8B5F 3F92 3500 clr liX1 ; 0 -> - 40 degrees msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 40 MC68HC908GP32 User Bootloader 8B61 6ECD93 3501 mov #205T,liX2 ; 165 + 40 degrees 8B64 3F93 3502 clr tmp2 8B66 C6E0B5 3503 lda ACMULT_f1 8B69 B794 3504 sta liY1 ; This is the amount at coldest 8B6B 6E6495 3505 mov #100T,liY2 ; 1.00 multiplier at 165 degrees 8B6E B6CA 3506 lda coolant 8B70 B796 3507 sta liX 8B72 CDD51E 3508 jsr lininterp 8B75 4E979F 3509 mov liY,tmp14 ; result - save here temporarily 8B78 2008 3510 bra AECarry_OnAE 3511 3512 Warmup_OverAE: 8B7A A600 3513 lda #00T ; If we get here then the warmup = 100 so no need to 8B7C B79E 3514 sta tmp13 ; Add any cold stuff so bypass it 8B7E A664 3515 lda #100T 8B80 B79F 3516 sta tmp14 3517 AECarry_OnAE: 8B82 C6E0B8 3518 lda feature9_f 8B85 A510 3519 bit #RpmAEBased ; This is a basic AE system that uses 8B87 271F 3520 beq NotRPMBased ; engine rpm instead of rate of change of tps 8B89 45E095 3521 ldhx #RPMbasedrate_f ; or map. Amount added is rpm based. 8B8C 3592 3522 sthx tmp1 8B8E 6E0394 3523 mov #$03,tmp3 8B91 B64D 3524 lda rpm 8B93 B795 3525 sta tmp4 8B95 B79B 3526 sta tmp10 8B97 CDD503 3527 jsr tableLookup ; Find the rpm bins we are going to use 8B9A 8C 3528 clrh 8B9B BE96 3529 ldx tmp5 8B9D D6E099 3530 lda RPMAQ_f2,x 8BA0 B795 3531 sta liY2 8BA2 5A 3532 decx 8BA3 D6E099 3533 lda RPMAQ_f2,x 8BA6 204D 3534 bra Carry_On_TEA 3535 3536 NotRPMBased: 8BA8 C6E042 3537 lda feature4_f 8BAB A580 3538 bit #KpaDotSetb 8BAD 2715 3539 beq tps_doty 3540 3541 ; Now the amount based on MAPdot 8BAF 45E0A5 3542 ldhx #MAPdotrate_f 8BB2 3592 3543 sthx tmp1 8BB4 6E0394 3544 mov #$03,tmp3 8BB7 B6C9 3545 lda kpa ; If not store KPa into last_tps 8BB9 B0CE 3546 sub TPSlast ; 8BBB B795 3547 sta tmp4 ; TPSDOT 8BBD B79B 3548 sta tmp10 ; Save away for later use below 8BBF CDD503 3549 jsr tableLookup 8BC2 2013 3550 bra miss_tps ; Jump past the tps checks 3551 3552 ; Now the amount based on TPSdot 3553 tps_doty: 8BC4 45E0A1 3554 ldhx #TPSdotrate 8BC7 3592 3555 sthx tmp1 8BC9 6E0394 3556 mov #$03,tmp3 8BCC B647 3557 lda tps 8BCE B0CE 3558 sub TPSlast 8BD0 B795 3559 sta tmp4 ; TPSdot 8BD2 B79B 3560 sta tmp10 ; Save away for later use below 8BD4 CDD503 3561 jsr tableLookup 3562 miss_tps: 8BD7 8C 3563 clrh 8BD8 BE96 3564 ldx tmp5 3565 8BDA C6E042 3566 lda feature4_f 8BDD A580 3567 bit #KpaDotSetb 8BDF 270B 3568 beq TPS_Accel_AE 3569 8BE1 D6E0A9 3570 lda MAPAQ_f,x ;MAP Based DOT 8BE4 B795 3571 sta liY2 8BE6 5A 3572 decx 8BE7 D6E0A9 3573 lda MAPAQ_f,x 8BEA 2009 3574 bra Carry_On_TEA 3575 3576 TPS_Accel_AE: 8BEC D6E0AD 3577 lda TPSAQ_f1,x ; TPS Based dot 8BEF B795 3578 sta liY2 8BF1 5A 3579 decx 8BF2 D6E0AD 3580 lda TPSAQ_f1,x 3581 3582 Carry_On_TEA: 8BF5 B794 3583 sta liY1 8BF7 4E9B96 3584 mov tmp10,liX 8BFA CDD51E 3585 jsr LinInterp 3586 3587 ; Apply the cold multiplier 8BFD 4E979C 3588 mov tmp6,tmp11 8C00 3F9D 3589 clr tmp12 8C02 B69F 3590 lda tmp14 8C04 CDD570 3591 jsr uMulAndDiv 8C07 B69C 3592 lda tmp11 8C09 BB9E 3593 add tmp13 ; Add on the amount computed in 3594 ; cold temperature enrich above 8C0B B797 3595 sta tmp6 8C0D B150 3596 cmp TPSACCEL 8C0F 2244 3597 bhi Higher_AcJMP 3598 3599 ; Check if acceleration done 3600 TAE_CHK_TIME: 8C11 0A4243 3601 brset TPSDEN,ENGINE,RST_ACCJMP 8C14 B67F 3602 lda TPSaclk 8C16 C1E0B3 3603 cmp TPSASYNC_f1 8C19 243C 3604 bhs RST_ACCJMP 3605 3606 ; MAP or TPS rate stable now so have we selected to interpolate the 3607 ; accel enrichments? 8C1B C6E074 3608 lda feature8_f 8C1E A540 3609 bit #InterpAcelb 8C20 2637 3610 bne Decay_AE_Aw 3611 8C22 C6E0B8 3612 lda feature9_f ; We are not decaying AE but are we doing RPM based? 8C25 A510 3613 bit #RpmAEBased ; If we are in rpm AE mode then check 8C27 2729 3614 beq TAE_DONEJ ; rpm AE value as it may be lower than the 8C29 45E095 3615 ldhx #RPMbasedrate_f ; earlier calculated stuff if rpm has increased. 8C2C 3592 3616 sthx tmp1 8C2E 6E0394 3617 mov #$03,tmp3 8C31 B64D 3618 lda rpm 8C33 B795 3619 sta tmp4 8C35 B79B 3620 sta tmp10 8C37 CDD503 3621 jsr tableLookup ; Find the rpm bins we are going to use 8C3A 8C 3622 clrh 8C3B BE96 3623 ldx tmp5 8C3D D6E099 3624 lda RPMAQ_f2,x 8C40 B795 3625 sta liY2 8C42 5A 3626 decx 8C43 D6E099 3627 lda RPMAQ_f2,x 8C46 B794 3628 sta liY1 8C48 4E9B96 3629 mov tmp10,liX 8C4B CDD51E 3630 jsr LinInterp 8C4E B697 3631 lda tmp6 8C50 B750 3632 sta TPSACCEL ; Store new AE enrichment 3633 TAE_DONEJ: 8C52 CC8D3D 3634 jmp TAE_DONE 3635 3636 Higher_AcJMP: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 41 MC68HC908GP32 User Bootloader 8C55 205A 3637 bra Higher_Accel 3638 3639 RST_ACCJMP: 8C57 2061 3640 bra RST_ACCEL 3641 3642 ; Decay the Accel enrichment away to a setpoint in the time period set - Phil 3643 Decay_AE_Aw: 8C59 C6E0B7 3644 lda AccelDecay_f 8C5C B150 3645 cmp TPSACCEL ; Only do interpolated Decay if 3646 ; Accel is higher than target point 8C5E 244E 3647 bhs TAE_DONEJMP 8C60 B795 3648 sta liY2 ; Load in the Decay PW value in mS 3649 ; at the end of the timer 8C62 3F92 3650 clr lix1 ; Acceltimer Start point for 3651 ; linear interpolater. 8C64 C6E0B3 3652 lda TPSASYNC_f1 8C67 B793 3653 sta lix2 ; Stick the max time in lix2 for 3654 ; linear interpolater. 8C69 B686 3655 lda Decay_Accel 8C6B B794 3656 sta liY1 ; Load in the actual maximum PW we 3657 ; calculated fo the Accel to 3658 ; interpolate from 8C6D B67F 3659 lda TPSaclk 8C6F B796 3660 sta lix ; Actual timer point 8C71 CDD51E 3661 jsr lininterp ; Go and work out the value 8C74 B697 3662 lda tmp6 8C76 B7D9 3663 sta tmp31 ; Save true result for a moment 3664 8C78 C6E0B8 3665 lda feature9_f 8C7B A510 3666 bit #RpmAEBased ; If we are in rpm AE mode then check 8C7D 272B 3667 beq NormAEMode ; rpm AE value as it may be lower than the 8C7F 45E095 3668 ldhx #RPMbasedrate_f ; Decay value. 8C82 3592 3669 sthx tmp1 8C84 6E0394 3670 mov #$03,tmp3 8C87 B64D 3671 lda rpm 8C89 B795 3672 sta tmp4 8C8B B79B 3673 sta tmp10 8C8D CDD503 3674 jsr tableLookup ; Find the rpm bins we are going to use 8C90 8C 3675 clrh 8C91 BE96 3676 ldx tmp5 8C93 D6E099 3677 lda RPMAQ_f2,x 8C96 B795 3678 sta liY2 8C98 5A 3679 decx 8C99 D6E099 3680 lda RPMAQ_f2,x 8C9C B794 3681 sta liY1 8C9E 4E9B96 3682 mov tmp10,liX 8CA1 CDD51E 3683 jsr LinInterp 8CA4 B697 3684 lda tmp6 8CA6 B1D9 3685 cmp tmp31 ; Is the RPM value lower than the 8CA8 2502 3686 blo StoreTPSACCEL ; AE value? tmp6 < tmp31 ? 3687 3688 NormAEMode: 8CAA B6D9 3689 lda tmp31 3690 3691 StoreTPSACCEL: 8CAC B750 3692 sta TPSACCEL ; Save decaying accel value 3693 TAE_DONEJMP: 8CAE CC8D3D 3694 jmp TAE_DONE 3695 3696 Higher_Accel: 8CB1 B697 3697 lda tmp6 ; Replace with this higher value 8CB3 B750 3698 sta TPSACCEL 8CB5 B786 3699 sta Decay_Accel ; Decaying Accel value 8CB7 CC8D3D 3700 jmp TAE_DONE 3701 3702 RST_ACCEL: 8CBA 6E64D3 3703 mov #100T,TPSfuelCorr 8CBD 3F50 3704 clr TPSACCEL 8CBF 3F86 3705 clr Decay_Accel 8CC1 1942 3706 bclr TPSAEN,ENGINE 8CC3 1B42 3707 bclr TPSDEN,ENGINE 8CC5 086475 3708 brset REUSE_LED19,outputpins,TAE_DONE 8CC8 1302 3709 bclr aled,portc ; not in Neon 8CCA 2071 3710 bra TAE_DONE 3711 3712 ; deaccel 3713 TDE: 8CCC C6E05C 3714 lda feature6_f 8CCF A580 3715 bit #NoDecelBoostb ; Have we selected to use Decel 3716 ; all the time? 8CD1 2707 3717 beq NormDecel 8CD3 B6C9 3718 lda kpa 8CD5 C1E081 3719 cmp DecelKpa_f 8CD8 2263 3720 bhi TAE_DONE ; If KPa above user defined amount 3721 ; then no decel enrichment 3722 3723 NormDecel: 8CDA 0A4241 3724 brset TPSDEN,ENGINE,CheckDecelT ; If we are already decelin then carry on with it 8CDD B693 3725 lda tmp2 8CDF B092 3726 sub tmp1 8CE1 B7D9 3727 sta tmp31 8CE3 C6E042 3728 lda feature4_f ; Are we in TPS or KPA mode? 8CE6 A580 3729 bit #KpaDotSetb 8CE8 270C 3730 beq tps_Decell 8CEA B6D9 3731 lda tmp31 8CEC C1E05B 3732 cmp MAPthresh_f 8CEF 2540 3733 blo TDE_CHK_DONE 8CF1 09421E 3734 brclr TPSAEN,ENGINE,TDE_CHK_FUEL_CUT 8CF4 200A 3735 bra Clear_Decel 3736 3737 tps_Decell: 8CF6 B6D9 3738 lda tmp31 8CF8 C1E0B2 3739 cmp TPSthresh_f1 8CFB 2534 3740 blo TDE_CHK_DONE 8CFD 094212 3741 brclr TPSAEN,ENGINE,TDE_CHK_FUEL_CUT 3742 3743 Clear_Decel: 8D00 6E64D3 3744 mov #100T,TPSfuelCorr 8D03 3F50 3745 clr TPSACCEL 8D05 3F86 3746 clr Decay_Accel 8D07 1942 3747 bclr TPSAEN,ENGINE 8D09 1B42 3748 bclr TPSDEN,ENGINE 8D0B 08642F 3749 brset REUSE_LED19,outputpins,TAE_DONE 8D0E 1302 3750 bclr aled,portc ; not in Neon 8D10 202B 3751 bra TAE_DONE 3752 3753 TDE_CHK_FUEL_CUT: 8D12 B64D 3754 lda rpm 8D14 A10F 3755 cmp #15T ; Only active above 1500 8D16 2525 3756 blo TAE_DONE 8D18 1A42 3757 bset TPSDEN,ENGINE 8D1A 1942 3758 bclr TPSAEN,ENGINE 8D1C 3F7F 3759 clr TPSaclk 3760 3761 CheckDecelT: ; New decel timer 8D1E C6E0B4 3762 lda TPSDQ_f1 8D21 B7D3 3763 sta TPSfuelCorr 8D23 B67F 3764 lda TPSaclk ; Use accel timer for decel timer 8D25 C1E0B3 3765 cmp TPSASYNC_f1 3766 ; cmp #2T ; Have we deceled for 200mSec? 8D28 24D6 3767 bhs Clear_Decel 3768 8D2A 086410 3769 brset REUSE_LED19,outputpins,TAE_DONE 8D2D 1302 3770 bclr aled,portc ; not in Neon 8D2F 200C 3771 bra TAE_DONE 3772 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 42 MC68HC908GP32 User Bootloader 3773 TDE_CHK_DONE: 8D31 0B4209 3774 brclr TPSDEN,ENGINE,TAE_DONE 8D34 1B42 3775 bclr TPSDEN,ENGINE 8D36 6E64D3 3776 mov #100T,TPSfuelCorr 8D39 3F50 3777 clr TPSACCEL 8D3B 3F86 3778 clr Decay_Accel 3779 3780 TAE_DONE: 3781 ;als Begin 3782 ***** Only for people who own stock in Garrett :-) ***** 3783 ; ALS added by kg 6/22/08 variables not verified... 3784 ; Trigger ALS if we meet the requirements 8D3D C6E87F 3785 lda ALS_CONFIG ; If Anti lag disabled, let's not mess with 8D40 A501 3786 bit #%00000001 ; the bit borrowed from overrun fuel cut. 8D42 2720 3787 beq antilag_done 8D44 06021D 3788 brset ALSIn,portc,antilag_done ; If not pulled low (bit cleared), leave the overrun_time for ORFC 8D47 C6E875 3789 lda ALS_RPM 8D4A B14D 3790 cmp rpm 8D4C 2212 3791 bhi no_antilag_here 8D4E C6E87D 3792 lda ALS_TPS 8D51 B147 3793 cmp tps 8D53 250B 3794 blo no_antilag_here 8D55 C6E881 3795 lda ALS_TIMEOUT 8D58 B1D4 3796 cmp OverRunTime ; Another byte borrowed, thanks overrunfuelcut 8D5A 2306 3797 bls antilag_timed_out 8D5C 1A69 3798 bset over_Run_Set,EnhancedBits2 ; we are using Over_Run_set as over_Run_Set 8D5E 2004 3799 bra antilag_done 3800 3801 no_antilag_here: 8D60 3FD4 3802 clr OverRunTime 3803 antilag_timed_out: 8D62 1B69 3804 bclr over_Run_Set,EnhancedBits2 3805 antilag_done: 3806 ; ALS end 3807 *************************************************************************** 3808 ** 3809 ** Exhaust Gas Oxygen Sensor Measurement Section 3810 ** 3811 ** Steps are the following: 3812 ** 3813 ** If EGOdelta = 0 then skipo2 3814 ** If KPA > 100 then skipo2 3815 ** If RPM < ego_rpm then skipo2 3816 ** If TPSAEN in ENGINE or TPSDEN in ENGINE are set then skipo2 3817 ** If coolant < EGOtemp then skipo2 3818 ** If sech = 0 and secl < 30 seconds then skipo2 3819 ** (skip first 30 seconds) 3820 ** If TPS > 3.5 volts then skipo2 3821 ** 3822 ** If EGOcount > EGOcountcmp { 3823 ** EGOcount = 0 3824 ** If EGO > 26 (counts, or 0.5 Volts) then (rich) { 3825 ** tpm = EGOcurr - EGOdelta 3826 ** if tpm >= EGOlimit then EGOcorr = tpm 3827 ** return 3828 ** } 3829 ** else (lean) { 3830 ** tpm = EGOcorr + EGOdelta 3831 ** if tpm > EGOlimit then EGOcorr = tpm 3832 ** return 3833 ** } 3834 ** } 3835 ** 3836 ** skipo2: 3837 ** EGOcorr = 100% 3838 ** 3839 *************************************************************************** 3840 3841 EGO_CALC: 3842 ; this was present in 025p_als but commented out 3843 ; lda feature6_f 3844 ; bit #AntiLagSystemb 3845 ; beq no_ego_als_chk 3846 ; brset over_Run_Set,EnhancedBits2,ANTILAG_CORR 3847 3848 ;no_ego_als_chk: 8D64 C6E02E 3849 lda feature3_f 8D67 A508 3850 bit #WaterInjb 8D69 2703 3851 beq no_ego_w_chk 3852 ; brclr WaterInj,feature3,no_ego_w_chk 8D6B 0A002B 3853 brset water,porta,SKIP_ALL_O2 ; if water injection on 3854 ; skip both O2 checks 3855 no_ego_w_chk: 8D6E 026828 3856 brset NosSysOn,EnhancedBits,SKIP_ALL_O2; If NOS running then no 3857 ;O2 checks 8D71 046825 3858 brset OverRun,EnhancedBits,SKIP_ALL_O2; Skip O2 if in Overrun mode 8D74 C6E192 3859 lda EGOdelta_f ; No delta means open loop. 8D77 271E 3860 beq SkipO2JMP 3861 8D79 C6E02E 3862 lda feature3_f 8D7C A501 3863 bit #KPaTpsOpenb 8D7E 270C 3864 beq throttle_check 3865 ; brclr KPaTpsOpen,feature3,throttle_check ; 0 = throttle do 3866 ; throttle check 1 = KPa 8D80 C6E040 3867 lda kpaO2_f ; In KPa mode so is it higher 3868 ; than setpoint? 8D83 271D 3869 beq SETAFR_UP ; If its zero dont check it as 3870 ; no open loop 8D85 C10110 3871 cmp engineLoad ; was kpa 8D88 250F 3872 blo SKIP_ALL_O2 ; If it is dont check O2 3873 No_KPA_Check: 8D8A 2016 3874 bra SETAFR_UP 3875 3876 throttle_check: 8D8C C6E041 3877 lda tpsO2_f ; Throttle position setpoint 3878 ; check for open loop 8D8F 2711 3879 beq SETAFR_UP ; If its zero dont check it 3880 ; as no open loop 8D91 B147 3881 cmp tps ; Load in TPS 8D93 2504 3882 blo SKIP_ALL_O2 8D95 200B 3883 bra SETAFR_UP 3884 3885 SkipO2JMP: 8D97 207B 3886 bra SKIPO2A 3887 3888 SKIP_ALL_O2: ; Skip both O2 checks 8D99 A664 3889 lda #100T 8D9B B74A 3890 sta EGOCorr 8D9D B760 3891 sta EgoCorr2 8D9F CC8E60 3892 jmp EGOALL_DONE 3893 ;Pulled from 025p. All commentred out in 025p 3894 ;ANTILAG_CORR: 3895 ; ldhx #ALS_RPM ; Load memory address of RPM range. 3896 ; sthx tmp1 ; Put it in tmp1 3897 ; mov #$03,tmp3 ; 4 byte table 3898 ; mov rpm,tmp4 ; Table axis is RPM 3899 ; jsr tablelookup 3900 ; clrh 3901 ; ldx tmp5 ; Put the field into tmp5 3902 ; lda ALS_FUEL,x 3903 ; sta liY2 3904 ; decx 3905 ; lda ALS_FUEL,x 3906 ; sta liY1 3907 ; mov rpm,lix ; RPM is the table axis 3908 ; jsr lininterp msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 43 MC68HC908GP32 User Bootloader 3909 ; lda tmp6 ; Result from linear interpolation 3910 ; sta EGOCorr 3911 ; sta EgoCorr2 3912 ; jmp EGOALL_DONE 3913 3914 SETAFR_UP: 8DA2 C6E02E 3915 lda feature3_f 8DA5 A580 3916 bit #TargetAFRb 8DA7 260A 3917 bne CheckVE1 3918 ; brset TargetAFR,feature3,CheckVE1 ; Target AFR? 3919 3920 Re_CheckTarg: 8DA9 C6E05C 3921 lda feature6_f 8DAC A502 3922 bit #TargetAFR3b 8DAE 2608 3923 bne CheckVE3 3924 ; brset TargetAFR3,feature6,CheckVE3 8DB0 CC8DBB 3925 jmp SETAFRNORMAL 3926 3927 CheckVE1: 8DB3 0C68F3 3928 brset useVE3,EnhancedBits,Re_CheckTarg; Are we are using VE3 3929 ; at present if so check 3930 ; if targets needed? 8DB6 2008 3931 bra SETAFRTABLE 3932 3933 CheckVE3: 8DB8 0C6805 3934 brset useVE3,EnhancedBits,SETAFRTABLE ; If were not running in 3935 ; VE3 then no targets 3936 3937 SETAFRNORMAL: ; Normal setting for AFR 8DBB C6E1BB 3938 lda O2targetV_f 8DBE B75B 3939 sta afrTarget 3940 3941 SETAFRTABLE: ; AFR Table value is already in 3942 ; afrTarget 8DC0 B649 3943 lda ego 8DC2 B7DA 3944 sta tmp32 ; Make tmp32 = the ego raw adc 3945 ; in narrow band or non AFR target mode 3946 3947 AFTERAFRSET: 8DC4 0842D2 3948 brset TPSAEN,ENGINE,Skip_ALL_O2 8DC7 0A42CF 3949 brset TPSDEN,ENGINE,Skip_ALL_O2 8DCA 0069CC 3950 brset Traction,EnhancedBits2,Skip_ALL_O2 3951 8DCD B67E 3952 lda sech 8DCF 2606 3953 bne chk_o2_lag ; if high seconds set then we 3954 ; can check o2 8DD1 B640 3955 lda secl 8DD3 A11E 3956 cmp #30T ; 30 seconds threshold 8DD5 25C2 3957 blo Skip_ALL_O2 3958 3959 CHK_O2_LAG: 3960 ; Check if exceeded lag time - if so then we can modify EGOcorr 8DD7 B680 3961 lda EGOcount 8DD9 C1E191 3962 cmp EGOcountcmp_f 8DDC 2509 3963 blo EGOALL_DONEJMP 3964 ; Check if we are over the O2 operating temp 8DDE B6CA 3965 lda coolant 8DE0 C1E190 3966 cmp EGOtemp_f 8DE3 252F 3967 blo SkipO2A 8DE5 2002 3968 bra Do_The_Ego 3969 3970 EGOALL_DONEJMP: 8DE7 2077 3971 bra EGOALL_DONE 3972 3973 Do_The_Ego: 8DE9 B64D 3974 lda rpm ; Over EGOrpm we go closed loop. 8DEB C1E1B9 3975 cmp EGOrpm_f 8DEE 2524 3976 blo SkipO2A 3977 3978 ; Check if rich/lean 8DF0 3F80 3979 clr EGOcount 8DF2 B6C9 3980 lda kpa ; See if we need to load in a 3981 ; new Ego Limit 8DF4 C1E027 3982 cmp EgoLimitKPa_f 8DF7 2207 3983 bhi New_EgoLim 8DF9 C6E193 3984 lda EGOlimit_f ; Original Ego Limit 8DFC B7D9 3985 sta tmp31 8DFE 2005 3986 bra EgoLim_Done 3987 New_EgoLim: 8E00 C6E028 3988 lda EgoLim2_f ; New Ego Limit 8E03 B7D9 3989 sta tmp31 3990 EgoLim_Done: 3991 8E05 C6E1B8 3992 lda config13_f1 ; Check if Narrow-band (bit=0) 3993 ; or DIY-WB (bit=1) 8E08 A502 3994 bit #c13_o2 ; Use BIT instead of brset 3995 ; because outside of zero-page 8E0A 260A 3996 bne WBO2TYPE ; Branch if the bit is set 3997 NBO2TYPE: 8E0C B6DA 3998 lda tmp32 ; EGO 8E0E B15B 3999 cmp afrTarget 8E10 2521 4000 blo O2_IS_LEAN 8E12 2008 4001 bra O2_IS_RICH 4002 4003 SkipO2A: ; Jmp for Skip O2 8E14 2034 4004 bra SkipO2 4005 4006 WBO2TYPE: 8E16 B6DA 4007 lda tmp32 8E18 B15B 4008 cmp afrTarget 8E1A 2217 4009 bhi O2_IS_LEAN 4010 4011 ; rich o2 - lean out EGOcorr 4012 O2_IS_RICH: 8E1C A664 4013 lda #100T 8E1E B0D9 4014 sub tmp31 ; Generate the lower limit rail point 8E20 B793 4015 sta tmp2 8E22 B64A 4016 lda EGOcorr 8E24 C0E192 4017 sub EGOdelta_f ; remove the amount required per step. 8E27 B792 4018 sta tmp1 8E29 B193 4019 cmp tmp2 8E2B 2521 4020 blo EGO_DONE ; railed at EGOlimit value 8E2D B692 4021 lda tmp1 8E2F B74A 4022 sta EGOcorr 8E31 201B 4023 bra EGO_DONE 4024 4025 ; lean o2 - richen EGOcorr 4026 O2_IS_LEAN: 8E33 A664 4027 lda #100T 8E35 BBD9 4028 add tmp31 ; Generate the upper limit rail point 8E37 B793 4029 sta tmp2 4030 8E39 B64A 4031 lda EGOcorr 8E3B CBE192 4032 add EGOdelta_f 8E3E B792 4033 sta tmp1 8E40 B193 4034 cmp tmp2 8E42 220A 4035 bhi EGO_DONE ; railed at EGOlimit value 8E44 B692 4036 lda tmp1 8E46 B74A 4037 sta EGOcorr 8E48 2004 4038 bra EGO_DONE 4039 4040 ; reset EGOcorr to 100% 4041 SkipO2: 8E4A A664 4042 lda #100T 8E4C B74A 4043 sta EGOcorr 4044 EGO_DONE: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 44 MC68HC908GP32 User Bootloader 8E4E C6E021 4045 lda DTmode_f ; check if DT in use 8E51 A510 4046 bit #alt_i2t2 8E53 2707 4047 beq No_DT_SecondO2 8E55 C6E2BC 4048 lda feature12_f2 8E58 A501 4049 bit #SecondO2b 8E5A 2607 4050 bne DO_Second_Ego 4051 ; brset SecondO2,feature4,DO_Second_Ego ; Do we have a second 4052 ; O2 sensor? 4053 No_DT_SecondO2: 8E5C B64A 4054 lda Egocorr 8E5E B760 4055 sta Egocorr2 4056 EGOALL_DONE: 8E60 CC8EEF 4057 jmp EGO_2Done 4058 4059 ;Second O2 Sensor runs from Page2 Enrichments 4060 4061 DO_Second_Ego: 8E63 3F80 4062 clr EGOcount 4063 8E65 B64D 4064 lda rpm ; Over EGOrpm we go closed loop. 8E67 C1E2B9 4065 cmp EGOrpm_f2 8E6A 2568 4066 blo SkipO22 8E6C B6CA 4067 lda coolant 8E6E C1E290 4068 cmp EGOtemp_f2 8E71 2561 4069 blo SkipO22 4070 8E73 C6E02E 4071 lda feature3_f 8E76 A580 4072 bit #TargetAFRb 8E78 260A 4073 bne Check2VE1 4074 ; brset TargetAFR,feature3,Check2VE1 ; Target AFR? 4075 4076 Re_Check2Targ: 8E7A C6E05C 4077 lda feature6_f 8E7D A502 4078 bit #TargetAFR3b 8E7F 2608 4079 bne Check2VE3 4080 ; brset TargetAFR3,feature6,Check2VE3 8E81 CC8E8C 4081 jmp SETAFRNORMAL2 4082 4083 Check2VE1: 8E84 0C68F3 4084 brset useVE3,EnhancedBits,Re_Check2Targ ; Are we are using 4085 ; VE3 at present if 4086 ; so check if targets 4087 ; needed? 8E87 2008 4088 bra SETAFRTABLE2 4089 4090 Check2VE3: 8E89 0C6805 4091 brset useVE3,EnhancedBits,SETAFRTABLE2 ; If were not running 4092 ; in VE3 then no 4093 ; targets 4094 4095 SETAFRNORMAL2: ; Normal setting for AFR 8E8C C6E2BB 4096 lda O2targetV_f2 8E8F B75B 4097 sta afrTarget 4098 4099 SETAFRTABLE2: 8E91 B65C 4100 lda o2_fpadc 8E93 B7DA 4101 sta tmp32 4102 4103 AFTERAFRSET2: 8E95 B6C9 4104 lda kpa ; See if we need to load in a 4105 ; new Ego Limit 8E97 C1E027 4106 cmp EgoLimitKPa_f 8E9A 2207 4107 bhi EgoLim2_New 8E9C C6E293 4108 lda EGOlimit_f2 ; Original Ego Limit from page 2 8E9F B7D9 4109 sta tmp31 ; We can re-use this as its 4110 ; reset every time 8EA1 2005 4111 bra EgoLim2_Done 4112 4113 EgoLim2_New: 8EA3 C6E028 4114 lda EgoLim2_f ; New Ego Limit 8EA6 B7D9 4115 sta tmp31 4116 4117 EgoLim2_Done: 4118 8EA8 C6E2B8 4119 lda config13_f2 ; Check if Narrow-band (bit=0) 4120 ; or DIY-WB (bit=1) 8EAB A502 4121 bit #c13_o2 ; Use BIT instead of brset because 4122 ; outside of zero-page 8EAD 2608 4123 bne WBO2TYPE2 ; Branch if the bit is set 4124 NBO2TYPE2: 8EAF B6DA 4125 lda tmp32 ; ADC from Second O2 8EB1 B15B 4126 cmp afrTarget 8EB3 2525 4127 blo O2_IS_LEANER 8EB5 2006 4128 bra O2_IS_RICHER 4129 4130 WBO2TYPE2: 8EB7 B6DA 4131 lda tmp32 8EB9 B15B 4132 cmp afrTarget 8EBB 221D 4133 bhi O2_IS_LEANER 4134 4135 ; rich o2 - lean out EGOcorr2 4136 O2_IS_RICHER: 8EBD A664 4137 lda #100T 8EBF B0D9 4138 sub tmp31 ; Generate the lower limit rail point 8EC1 B793 4139 sta tmp2 8EC3 B660 4140 lda EgoCorr2 8EC5 C0E292 4141 sub EGOdelta_f2 8EC8 B792 4142 sta tmp1 8ECA B193 4143 cmp tmp2 8ECC 2521 4144 blo EGO_2Done ; railed at EGOlimit value 8ECE B692 4145 lda tmp1 8ED0 B760 4146 sta EgoCorr2 4147 EGO_2DoneJMP: 8ED2 201B 4148 bra EGO_2Done 4149 4150 SkipO22: 8ED4 A664 4151 lda #100T 8ED6 B760 4152 sta EgoCorr2 8ED8 2015 4153 bra EGO_2Done 4154 4155 ; lean o2 - richen EGOcorr2 4156 O2_IS_LEANER: 8EDA A664 4157 lda #100T 8EDC BBD9 4158 add tmp31 ; Generate the upper limit rail point 8EDE B793 4159 sta tmp2 8EE0 B660 4160 lda EgoCorr2 8EE2 CBE292 4161 add EGOdelta_f2 8EE5 B792 4162 sta tmp1 8EE7 B193 4163 cmp tmp2 8EE9 2204 4164 bhi EGO_2Done ; railed at EGOlimit value 8EEB B692 4165 lda tmp1 8EED B760 4166 sta EgoCorr2 4167 EGO_2Done: 4168 4169 *************************************************************************** 4170 *************************************************************************** 4171 *************************************************************************** 4172 ** 4173 ** Computation of Fuel Parameters 4174 ** 4175 ** Remainders are maintained for hi-resolution calculations - results 4176 ** converted back to 100 microsecond resolution at end. 4177 ** 4178 ** (Warm * Tpsfuelcut)/100 = R1 + rem1/100 4179 ** (Barcor * Aircor)/100 = R2 + rem2/100 4180 ** ((R1 + rem1/100) * (R2 + rem2/100)) / 100 = R3 + rem3/100 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 45 MC68HC908GP32 User Bootloader 4181 ** (EGO * MAP)/100 = R4 + rem4/100 4182 ** ((R3 + rem3/100) * (R4 + rem4/100)) /100 = R5 + rem5/100 4183 ** (VE * REQ_FUEL)/100 = R6 + rem6/100 4184 ** ((R5 + rem5/100) * (R6 + rem6/100)) = R7 4185 ** 4186 ** 4187 ** 4188 ** Note: that GAMMAE only includes Warm, Tpsfuelcut, Barocor, and Aircor 4189 ** (EGO no longer included) 4190 ** 4191 ** Calc GammaE first. Then Req_fuel, EGO, VE, KPA - Hi Res- carry all remainders 4192 ** and final calc can go to 65.5ms 4193 ** 4194 ** Rationle on ordering: to prevent calculation overflow for boosted 4195 ** operations, the variables have been ordered in specific "pairs" in 4196 ** the calculation: 4197 ** EGO * MAP - when at WOT, EGO is set to 100%, 4198 ** so MAP can run up to 255% without overflow 4199 ** VE * REQ_FUEL - for boosted applications, 4200 ** REQ_FUEL tends to be low (below 10 ms) due to the added fuel 4201 ** requirements (i.e. large injectors), so VE entries can be well 4202 ** above 100%. 4203 ** 4204 *************************************************************************** 4205 4206 WARMACCEL_COMP: 4207 8EEF 4E4C9B 4208 mov warmcor,tmp10 ; Warmup Correction in tmp10 8EF2 3F9C 4209 clr tmp11 ; tmp11 is zero 8EF4 4ED39D 4210 mov TPSfuelcorr,tmp12 ; tpsfuelcut in tmp12 8EF7 CDD6D6 4211 jsr Supernorm ; do the multiply and normalization 4212 8EFA 4E519D 4213 mov barocor,tmp12 ; tmp10 is barometer percent 8EFD CDD6D6 4214 jsr Supernorm ; do the multiply and normalization 4215 8F00 4E4B9D 4216 mov AirCor,tmp12 ; air temp correction % in tmp12 8F03 CDD6D6 4217 jsr Supernorm ; multiply and divide by 100 4218 8F06 C6E021 4219 lda DTmode_f ; Must check the INJ1 GammaE bit, 8F09 A520 4220 bit #alt_i1ge ; if 0 then set it to 100T to 4221 ; remove GammaE. 8F0B 260A 4222 bne ld_ve_1 8F0D 6E6452 4223 mov #100T,GammaE 8F10 6E649B 4224 mov #100T,tmp10 8F13 3F9C 4225 clr tmp11 8F15 2003 4226 bra ld_ve_1Done 4227 4228 ld_ve_1: 8F17 4E9B52 4229 mov tmp10,GammaE ; GammaE is now complete to be used later 4230 ld_ve_1Done: 4231 ; ALS begin fuel part 8F1A C6E87F 4232 lda ALS_CONFIG 8F1D A501 4233 bit #%00000001 8F1F 272B 4234 beq No_ALS_VE1 8F21 0B6928 4235 brclr over_Run_Set,EnhancedBits2,No_ALS_VE1 8F24 45E875 4236 ldhx #ALS_RPM ; Load memory address of RPM range. 8F27 3592 4237 sthx tmp1 ; Put it in tmp1 8F29 6E0394 4238 mov #$03,tmp3 ; 4 byte table 8F2C 4E4D95 4239 mov rpm,tmp4 ; Table axis is RPM 8F2F CDD503 4240 jsr tablelookup 8F32 8C 4241 clrh 8F33 BE96 4242 ldx tmp5 ; Put the field into tmp5 8F35 D6E879 4243 lda ALS_FUEL,x 8F38 B795 4244 sta liY2 8F3A 5A 4245 decx 8F3B D6E879 4246 lda ALS_FUEL,x 8F3E B794 4247 sta liY1 8F40 4E4D96 4248 mov rpm,lix ; RPM is the table axis 8F43 CDD51E 4249 jsr lininterp 8F46 4E979D 4250 mov tmp6,tmp12 ; move result from linear interpolation into tmp12 for SuperNorm 8F49 CDD6D6 4251 jsr Supernorm ; multiply and divide by 100 4252 No_ALS_VE1: 4253 ; ALS end kg 4254 8F4C C60102 4255 lda page ; Req Fuel is on P1 8F4F A101 4256 cmp #01T 8F51 2705 4257 beq rqfr1 8F53 C6E194 4258 lda REQ_FUEL_f1 8F56 2003 4259 bra rqfe1 4260 rqfr1: 8F58 C601A8 4261 lda REQ_FUEL_r 4262 rqfe1: 8F5B B79D 4263 sta tmp12 ; req-fuel into tmp12 8F5D CDD6D6 4264 jsr Supernorm ; do the multiply and divide 4265 ; ALS begin fuel bypass of EGO... 8F60 C6E87F 4266 lda ALS_CONFIG ; if ALS is off, always do EGO 8F63 A501 4267 bit #%00000001 ; only bypass it when the switch is on 8F65 2603 4268 bne norm_EGO ; prob is when ALS is off, pin is hi so it needs to be explicitly engaged 8F67 0A6906 4269 brset over_Run_Set,EnhancedBits2,ALS_noEGO 4270 norm_EGO: 8F6A 4E4A9D 4271 mov EGOcorr,tmp12 ; EGO correction percent into tmp12 8F6D CDD6D6 4272 jsr Supernorm ; do the multiply and divide 4273 ALS_noEGO: 8F70 4E539D 4274 mov vecurr,tmp12 ; VE into tmp12 8F73 CDD6D6 4275 jsr Supernorm ; do the multiply and divide 4276 8F76 0A6512 4277 brset hybridAlphaN,feature1,skip_loadcontcomp ; if hybrid then skip AN bypass 8F79 C6E1B8 4278 lda config13_f1 8F7C A504 4279 bit #c13_cs 8F7E 2702 4280 beq MAFCheck ; No Alpha but are we using MAF? 8F80 200F 4281 bra LoadContribDone 4282 4283 MAFCheck: 8F82 C6E0B8 4284 lda feature9_f 8F85 A520 4285 bit #MassAirFlwb 8F87 2702 4286 beq skip_loadcontcomp ; Are we using a MAF on pin X7? 8F89 2006 4287 bra LoadContribDone 4288 4289 skip_loadcontcomp: 8F8B 4EC99D 4290 mov kpa,tmp12 ; MAP into tmp12 8F8E CDD6D6 4291 jsr Supernorm ; do the multiply and divide 4292 4293 ; NORMAL KPA stuff now 4294 LoadContribDone: 4295 4296 ; mov tmp10,tmp11 ; tmp10 and 11 both now have whole result 4297 4298 ; jsr BATT_CORR_CALC ; result in tmp6 <- f(Vbatt) 4299 4300 4301 *************************************************************************** 4302 ** For V E T A B L E 1 and 3 4303 ** Calculation of Battery Voltage Correction for Injector Opening Time 4304 ** 4305 ** Leaves result in liY == tmp6. 4306 ** Mangles tmp1-tmp5. 4307 ** 4308 ** Injector open time is implemented as a linear function of 4309 ** battery voltage, from 7.2 volts (61 ADC counts) to 19.2 volts (164 counts), 4310 ** with 13.2 volts (113 counts) being the nominal operating voltage 4311 ** 4312 ** INJOPEN = injector open time at 13.2 volts in mms 4313 ** BATTFAC = injector open adjustment factor 6 volts from 13.2V in mms 4314 ** 4315 ** 4316 ** + (INJOPEN + BATTFAC) msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 46 MC68HC908GP32 User Bootloader 4317 ** + * 4318 ** + (INJOPEN) 4319 ** + * 4320 ** + (INJOPEN - BATTFAC) 4321 ** + * 4322 ** + 4323 ** ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4324 ** 7.2v 13.2v 19.2v 4325 ** 4326 ** made this a positive number from 12*BattFac to 0 4327 ** with max BF of 0.2, no overflow as max is 12 * 20 = 240 4328 *************************************************************************** 4329 4330 BATT_CORR_CALC: 8F91 8C 4331 clrh 4332 BATT_CORR_PW: 4333 ;batt corr and opening time in 0.01ms units: 100 = 1ms 8F92 6E3D92 4334 mov #061T,liX1 ; x1 7.2V 8F95 6EA493 4335 mov #164T,liX2 ; x2 19.2V 8F98 3F95 4336 clr liY2 ; y2 = 0 at max correction at 19.2V 8F9A C6E19B 4337 lda battfac_f1 8F9D AE0C 4338 ldx #12T ; 12 8F9F 42 4339 mul ; max value of 240, so only 8 bit 8FA0 B794 4340 sta liY1 ; y1 = 12 * battfac at 7.2V 8FA2 4E4896 4341 mov batt,liX ; xInterp 8FA5 CDD51E 4342 jsr LinInterp ; modified injector batt factor tmp6 8FA8 B697 4343 lda tmp6 ; battery factor 8FAA AE0A 4344 ldx #10T 8FAC 42 4345 mul 8FAD B795 4346 sta tmp4 ; low 8FAF BF94 4347 stx tmp3 ; high 4348 8FB1 C6E197 4349 lda InjOpen_f1 ; max of 200 8FB4 AE0A 4350 ldx #10T 8FB6 42 4351 mul ; 16 bit opening time 8FB7 BB95 4352 add tmp4 8FB9 B797 4353 sta tmp6 8FBB 9F 4354 txa 8FBC B994 4355 adc tmp3 8FBE B796 4356 sta tmp5 8FC0 98 4357 clc 4358 8FC1 C6E19B 4359 lda battfac_f1 8FC4 AE3C 4360 ldx #60T 8FC6 42 4361 mul ; 16 bit battery factor to be subtracted 8FC7 B795 4362 sta tmp4 8FC9 BF94 4363 stx tmp3 4364 8FCB B697 4365 lda tmp6 8FCD B095 4366 sub tmp4 8FCF B797 4367 sta tmp6 ; low byte 8FD1 B696 4368 lda tmp5 8FD3 B294 4369 sbc tmp3 8FD5 B796 4370 sta tmp5 ; hi byte 8FD7 98 4371 clc 4372 ; bat corr opening time in tmp5/6 (h:l) 4373 *************************************************************************** 4374 * Check if 300kpa or 400kpa map sensor 4375 *************************************************************************** 4376 8FD8 C6E1B6 4377 lda config11_f1 8FDB A403 4378 and #$03 8FDD A102 4379 cmp #$02 ; Are we using Turbo Map sensor? 8FDF 2528 4380 blo CALC_FINAL ; skip if 0 or 1 4381 4382 ; If we get here we are using non-standard map sensor 4383 ; so do kpa * compensation factor to work out larger kpa 4384 ; value then add it back to the normal kpa cals later 4385 8FE1 410204 4386 cbeqa #2T,mul300 8FE4 AEA7 4387 ldx #KPASCALE400 8FE6 2002 4388 bra lcd_cont 4389 mul300: 8FE8 AE42 4390 ldx #KPASCALE300 4391 lcd_cont: 4392 ; Hi Res version is an 8 bit x 16 mul with tmp13/14 8FEA 89 4393 pshx ; Put multiplier in accumulator 8FEB B69F 4394 lda tmp14 ; LSB of multiplicand. 8FED 42 4395 mul 4396 ; don't care about LSB result 8FEE BF9D 4397 stx tmp12 ; MSB stored in tmp12 8FF0 88 4398 pulx 8FF1 B69E 4399 lda tmp13 8FF3 42 4400 mul 8FF4 BB9D 4401 add tmp12 8FF6 B79D 4402 sta tmp12 8FF8 2401 4403 bcc lcdcnc1 8FFA 5C 4404 incx 4405 lcdcnc1: 8FFB BF9C 4406 stx tmp11 4407 ; tmp40:41 now contain the fractional part of the scaling 4408 ; then add on the original values (the 1. part) 8FFD B69F 4409 lda tmp14 8FFF BB9D 4410 add tmp12 9001 B79F 4411 sta tmp14 9003 B69E 4412 lda tmp13 9005 B99C 4413 adc tmp11 9007 B79E 4414 sta tmp13 4415 4416 ; lda tmp11 ; Low Res PW 4417 ; mul 4418 ; txa 4419 ; add tmp11 4420 ; bcc Store_Mod_KPa1 4421 ; lda #255T ; Limit 4422 ;Store_Mod_KPa1: 4423 ; sta tmp11 4424 4425 *************************************************************************** 4426 ** F O R V E T A B L E 1 and 3 4427 ** Calculation of Final Pulse Width 4428 ** 4429 ** The following equation is evaluated here: 4430 ** 4431 ** High Res Calculation 4432 ** PWCALC2H:L = (TPSACCEL * 100) + tmp5:tmp6 + tmp13:tmp14 4433 ** 4434 ** Note that InjOCFuel (injected fuel during injector open and 4435 ** close) is currently a constant - eventually it will be a function 4436 ** of battery voltage. 4437 ** 4438 *************************************************************************** 4439 CALC_FINAL: 4440 4441 ; lda tmp11 ; From required fuel, above. 4442 ; beq PW_Done ; If no calculated pulse, then 4443 ; don't open at all. 4444 4445 ;accel in 0.1ms units 100 = 10ms 9009 B650 4446 lda TPSACCEL 900B 97 4447 tax 900C A664 4448 lda #$64 ; accel is in 0.1ms units 900E 42 4449 mul 900F BB9F 4450 add tmp14 9011 B7A5 4451 sta tmp20 9013 9F 4452 txa msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 47 MC68HC908GP32 User Bootloader 9014 B99E 4453 adc tmp13 9016 B7A4 4454 sta tmp19 9018 98 4455 clc 4456 9019 B6A5 4457 lda tmp20 901B BB97 4458 add tmp6 901D B7A5 4459 sta tmp20 901F B696 4460 lda tmp5 9021 B9A4 4461 adc tmp19 9023 B7A4 4462 sta tmp19 4463 4464 PW_Done: 9025 C6E04C 4465 lda feature5_f 9028 A50C 4466 bit #stagedeither 902A 2706 4467 beq Calc_Final1Done 902C CDA04C 4468 jsr CALC_STAGED_PW ; Do the Staged PW calculations if set 902F CC9247 4469 jmp both_table1 ; jump past the dual table calcs as it messes up staged... kg 4470 ; probably to check rpm settings instead... kg 4471 Calc_Final1Done: 4472 **************************************************************************** 4473 4474 4475 ; mov tmp20,tmp1 ; store PW from table 1 4476 ; changed this to be tmp19/20 kg 8/1/06 9032 C6E021 4477 lda DTmode_f 9035 A510 4478 bit #alt_i2t2 9037 2603 4479 bne do_dt 9039 CC9247 4480 jmp both_table1 ; if (inj2=t2) =0 then single table 4481 4482 do_dt: 4483 ; calc 'PW2' from table 2 4484 ; mov tmp20,tmp22 ; storage for PW1 whilst doing DT 903C 4EA4A6 4485 mov tmp19,tmp21 903F 4EA5A7 4486 mov tmp20,tmp22 9042 146B 4487 bset page2,EnhancedBits4 ; set page2 4488 *************************************************************************** 4489 ** Maybe lazy, but we have lots of flash, so quicker to have one 4490 ** routine per page 4491 *************************************************************************** 4492 VE2_LOOKUP: ; ALWAYS page 2 9044 8C 4493 clrh 9045 5F 4494 clrx 4495 9046 C6E0B8 4496 lda feature9_f 9049 A520 4497 bit #MassAirFlwb 904B 2704 4498 beq VE2_LOOKUP_PW1 ; Are we using a MAF on pin X7? 904D B65C 4499 lda o2_fpadc ; Using MAF thats on pin X7 904F 200E 4500 bra VE2_STEP_1 4501 4502 VE2_LOOKUP_PW1: 9051 C6E2B8 4503 lda config13_f2 9054 A504 4504 bit #c13_cs 9056 2605 4505 bne VE2_AN ; if alpha-N 9058 C60110 4506 lda engineLoad ; SD, so use kpa for load 905B 2002 4507 bra VE2_STEP_1 4508 VE2_AN: 905D B647 4509 lda tps 4510 4511 VE2_STEP_1: 905F B7D8 4512 sta kpa_n 9061 45E2AA 4513 ldhx #KPARANGEVE_f2 9064 3592 4514 sthx tmp1 9066 A60B 4515 lda #$0b 9068 B794 4516 sta tmp3 906A B6D8 4517 lda kpa_n 906C B795 4518 sta tmp4 906E CDD503 4519 jsr tableLookup 9071 B692 4520 lda tmp1 9073 B693 4521 lda tmp2 9075 4E9699 4522 mov tmp5,tmp8 ; Index 9078 4E929A 4523 mov tmp1,tmp9 ; X1 907B 4E939B 4524 mov tmp2,tmp10 ; X2 4525 4526 VE2_STEP_2: 907E 45E29E 4527 ldhx #RPMRANGEVE_f2 9081 3592 4528 sthx tmp1 9083 6E0B94 4529 mov #$0b,tmp3 ; 12x12 9086 4E4D95 4530 mov rpm,tmp4 9089 CDD503 4531 jsr tableLookup 908C 4E969C 4532 mov tmp5,tmp11 ; Index 908F 4E929E 4533 mov tmp1,tmp13 ; X1 9092 4E939F 4534 mov tmp2,tmp14 ; X2 4535 4536 VE2_STEP_3: 4537 9095 8C 4538 clrh 9096 AE0C 4539 ldx #$0c ; 12x12 9098 B699 4540 lda tmp8 909A 4A 4541 deca 909B 42 4542 mul 909C BB9C 4543 add tmp11 909E 4A 4544 deca 909F 97 4545 tax 90A0 macro 4546 VE2X 90A0 C60102 4547 LDA PAGE 90A3 A102 4548 CMP #02T 90A5 2605 4549 BNE VE2XF 90A7 D60114 4550 LDA VE_R,X 90AA 2003 4551 BRA VE2XC 90AC D6E200 4552 VE2XF: LDA VE_F2,X 4553 VE2XC: 90AF B7A0 4554 sta tmp15 90B1 5C 4555 incx 90B2 macro 4556 VE2X 90B2 C60102 4557 LDA PAGE 90B5 A102 4558 CMP #02T 90B7 2605 4559 BNE VE2XF 90B9 D60114 4560 LDA VE_R,X 90BC 2003 4561 BRA VE2XC 90BE D6E200 4562 VE2XF: LDA VE_F2,X 4563 VE2XC: 90C1 B7A1 4564 sta tmp16 90C3 AE0C 4565 ldx #$0c ; 12x12 90C5 B699 4566 lda tmp8 90C7 42 4567 mul 90C8 BB9C 4568 add tmp11 90CA 4A 4569 deca 90CB 97 4570 tax 90CC macro 4571 VE2X 90CC C60102 4572 LDA PAGE 90CF A102 4573 CMP #02T 90D1 2605 4574 BNE VE2XF 90D3 D60114 4575 LDA VE_R,X 90D6 2003 4576 BRA VE2XC 90D8 D6E200 4577 VE2XF: LDA VE_F2,X 4578 VE2XC: 90DB B7A2 4579 sta tmp17 90DD 5C 4580 incx 90DE macro 4581 VE2X 90DE C60102 4582 LDA PAGE 90E1 A102 4583 CMP #02T 90E3 2605 4584 BNE VE2XF 90E5 D60114 4585 LDA VE_R,X 90E8 2003 4586 BRA VE2XC 90EA D6E200 4587 VE2XF: LDA VE_F2,X 4588 VE2XC: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 48 MC68HC908GP32 User Bootloader 90ED B7A3 4589 sta tmp18 4590 90EF CDA17A 4591 jsr VE_STEP_4 90F2 4E9756 4592 mov tmp6,vecurr2 4593 4594 ;*********** Dual Table CALCULATIONS*********************************** 4595 ; I think theres only need to do this bit as the rest would have been done in VE1? 4596 90F5 4E4C9B 4597 mov warmcor,tmp10 ; Warmup Correction in tmp10 90F8 3F9C 4598 clr tmp11 ; tmp11 is zero 90FA 4ED39D 4599 mov tpsfuelcorr,tmp12 ; tpsfuelcut in tmp12 90FD CDD6D6 4600 jsr Supernorm ; do the multiply and normalization 4601 9100 4E519D 4602 mov barocor,tmp12 ; tmp10 is barometer percent 9103 CDD6D6 4603 jsr Supernorm ; do the multiply and normalization 4604 9106 4E4B9D 4605 mov AirCor,tmp12 ; air temp correction % in tmp12 9109 CDD6D6 4606 jsr Supernorm ; do the multiply and normalization 4607 910C C6E021 4608 lda DTmode_f 910F A540 4609 bit #alt_i2ge 9111 260A 4610 bne ld_ve_2 ; Are we using gammae in Second PW? 9113 6E6452 4611 mov #100T,GammaE 9116 6E649B 4612 mov #100T,tmp10 9119 3F9C 4613 clr tmp11 911B 2003 4614 bra ld_ve2_Done 4615 4616 ld_ve_2: 911D 4E9B52 4617 mov tmp10,GammaE 4618 ld_ve2_Done: 4619 4620 ; ALS table 2 9120 C6E87F 4621 lda ALS_CONFIG 9123 A501 4622 bit #%00000001 9125 272B 4623 beq No_ALS_VE2 9127 0B6928 4624 brclr over_Run_Set,EnhancedBits2,No_ALS_VE2 912A 45E875 4625 ldhx #ALS_RPM ; Load memory address of RPM range. 912D 3592 4626 sthx tmp1 ; Put it in tmp1 912F 6E0394 4627 mov #$03,tmp3 ; 4 byte table 9132 4E4D95 4628 mov rpm,tmp4 ; Table axis is RPM 9135 CDD503 4629 jsr tablelookup 9138 8C 4630 clrh 9139 BE96 4631 ldx tmp5 ; Put the field into tmp5 913B D6E879 4632 lda ALS_FUEL,x 913E B795 4633 sta liY2 9140 5A 4634 decx 9141 D6E879 4635 lda ALS_FUEL,x 9144 B794 4636 sta liY1 9146 4E4D96 4637 mov rpm,lix ; RPM is the table axis 9149 CDD51E 4638 jsr lininterp 914C 4E979D 4639 mov tmp6,tmp12 ; Result from linear interpolation 914F CDD6D6 4640 jsr Supernorm 4641 No_ALS_VE2: 4642 ; ALS table 2 done 4643 9152 C60102 4644 lda page 9155 A102 4645 cmp #02T 9157 2705 4646 beq rqfr2 9159 C6E294 4647 lda REQ_FUEL_f2 915C 2003 4648 bra rqfe2 4649 rqfr2: 915E C601A8 4650 lda REQ_FUEL_r 4651 4652 rqfe2: 9161 B79D 4653 sta tmp12 ; req-fuel into tmp12 9163 CDD6D6 4654 jsr Supernorm ; do the multiply and divide 4655 ; ALS begin fuel bypass of EGO2... 9166 C6E87F 4656 lda ALS_CONFIG ; if ALS is off, always do EGO 9169 A501 4657 bit #%00000001 ; only bypass it when the switch is on 916B 2603 4658 bne norm_EGO2 ; prob is when ALS is off, pin is hi so it needs to be explicitly engaged 916D 0A6906 4659 brset over_Run_Set,EnhancedBits2,ALS_noEGO2 4660 norm_EGO2: 9170 4E4A9D 4661 mov EGOcorr,tmp12 ; EGO correction percent into tmp12 9173 CDD6D6 4662 jsr Supernorm ; do the multiply and divide 4663 4664 ALS_noEGO2: 9176 4E569D 4665 mov vecurr2,tmp12 ; VE into tmp10 9179 CDD6D6 4666 jsr Supernorm ; multiply/divide 4667 917C 0A650E 4668 brset hybridAlphaN,feature1,skip_loadccomp2 ; if hybrid then skip AN bypass 917F C6E2B8 4669 lda config13_f2 9182 A504 4670 bit #c13_cs 9184 2707 4671 beq skip_loadccomp2 ; Ignore if not alpha-N 4672 9186 C6E0B8 4673 lda feature9_f ; Using Alhpa-n so 9189 A508 4674 bit #BaroCorConstb ; are we adding the KPa factor? 918B 2706 4675 beq LoadContribDn2 4676 4677 skip_loadccomp2: 4678 918D 4EC99D 4679 mov kpa,tmp12 ; MAP into tmp12 9190 CDD6D6 4680 jsr Supernorm ; do the multiply and divide 4681 4682 ; NORMAL KPA stuff now 4683 LoadContribDn2: 4684 4685 ; mov tmp10,tmp11 4686 4687 End_DTCalcs: 4688 4689 ; jsr BATT_CORR_CALC ; result in tmp6 4690 9193 2000 4691 bra BATT_CORR_CALC2 4692 4693 4694 *************************************************************************** 4695 ** For V E T A B L E 2 4696 ** Calculation of Battery Voltage Correction for Injector Opening Time 4697 ** 4698 ** Leaves result in liY == tmp6. 4699 ** Mangles tmp1-tmp5. 4700 ** 4701 ** Injector open time is implemented as a linear function of 4702 ** battery voltage, from 7.2 volts (61 ADC counts) to 19.2 volts (164 counts), 4703 ** with 13.2 volts (113 counts) being the nominal operating voltage 4704 ** 4705 ** INJOPEN = injector open time at 13.2 volts in mms 4706 ** BATTFAC = injector open adjustment factor 6 volts from 13.2V in mms 4707 ** 4708 ** 4709 ** + (INJOPEN + BATTFAC) 4710 ** + * 4711 ** + (INJOPEN) 4712 ** + * 4713 ** + (INJOPEN - BATTFAC) 4714 ** + * 4715 ** + 4716 ** ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 4717 ** 7.2v 13.2v 19.2v 4718 ** 4719 ** made this a positive number from 12*BattFac to 0 4720 ** with max BF of 0.2, no overflow as max is 12 * 20 = 240 4721 *************************************************************************** 4722 4723 BATT_CORR_CALC2: 9195 8C 4724 clrh msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 49 MC68HC908GP32 User Bootloader 4725 ;batt corr and opening time in 0.01ms units: 100 = 1ms 9196 6E3D92 4726 mov #061T,liX1 ; x1 7.2V 9199 6EA493 4727 mov #164T,liX2 ; x2 19.2V 919C 3F95 4728 clr liY2 ; y2 = 0 at max correction at 19.2V 919E C6E19B 4729 lda battfac_f1 91A1 AE0C 4730 ldx #12T ; 12 91A3 42 4731 mul ; max value of 240, so only 8 bit 91A4 B794 4732 sta liY1 ; y1 = 12 * battfac at 7.2V 91A6 4E4896 4733 mov batt,liX ; xInterp 91A9 CDD51E 4734 jsr LinInterp ; modified injector batt factor tmp6 91AC B697 4735 lda tmp6 ; battery factor 91AE AE0A 4736 ldx #10T 91B0 42 4737 mul 91B1 B795 4738 sta tmp4 ; low 91B3 BF94 4739 stx tmp3 ; high 4740 91B5 C6E197 4741 lda InjOpen_f1 ; max of 200 91B8 AE0A 4742 ldx #10T 91BA 42 4743 mul ; 16 bit opening time 91BB BB95 4744 add tmp4 91BD B797 4745 sta tmp6 91BF 9F 4746 txa 91C0 B994 4747 adc tmp3 91C2 B796 4748 sta tmp5 91C4 98 4749 clc 4750 91C5 C6E19B 4751 lda battfac_f1 91C8 AE3C 4752 ldx #60T 91CA 42 4753 mul ; 16 bit battery factor to be subtracted 91CB B795 4754 sta tmp4 91CD BF94 4755 stx tmp3 4756 91CF B697 4757 lda tmp6 91D1 B095 4758 sub tmp4 91D3 B797 4759 sta tmp6 ; low byte 91D5 B696 4760 lda tmp5 91D7 B294 4761 sbc tmp3 91D9 B796 4762 sta tmp5 ; hi byte 91DB 98 4763 clc 4764 ; bat corr opening time in tmp5/6 (h:l) 4765 *************************************************************************** 4766 * Check if 300kpa or 400kpa map sensor 4767 *************************************************************************** 4768 91DC C6E1B6 4769 lda config11_f1 91DF A403 4770 and #$03 91E1 A102 4771 cmp #$02 ; Are we using Turbo Map sensor? 91E3 2528 4772 blo CALC_FINAL2 ; skip if 0 or 1 4773 4774 ; If we get here we are using non-standard map sensor 4775 ; so do kpa * compensation factor to work out larger kpa 4776 ; value then add it back to the normal kpa cals later 4777 91E5 410204 4778 cbeqa #2T,mul300_2 91E8 AEA7 4779 ldx #KPASCALE400 91EA 2002 4780 bra lcd_cont2 4781 mul300_2: 91EC AE42 4782 ldx #KPASCALE300 4783 lcd_cont2: 4784 ; Hi Res version is an 8 bit x 16 mul with tmp13/14 91EE 89 4785 pshx ; Put multiplier in accumulator 91EF B69F 4786 lda tmp14 ; LSB of multiplicand. 91F1 42 4787 mul 4788 ; don't care about LSB result 91F2 BF9D 4789 stx tmp12 ; MSB stored in tmp12 91F4 88 4790 pulx 91F5 B69E 4791 lda tmp13 91F7 42 4792 mul 91F8 BB9D 4793 add tmp12 91FA B79D 4794 sta tmp12 91FC 2401 4795 bcc lcdcnc2 91FE 5C 4796 incx 4797 lcdcnc2: 91FF BF9C 4798 stx tmp11 4799 ; tmp40:41 now contain the fractional part of the scaling 4800 ; then add on the original values (the 1. part) 9201 B69F 4801 lda tmp14 9203 BB9D 4802 add tmp12 9205 B79F 4803 sta tmp14 9207 B69E 4804 lda tmp13 9209 B99C 4805 adc tmp11 920B B79E 4806 sta tmp13 ; Clear the stack. 4807 4808 ; lda tmp11 ; tmp11 is Lo Res PW 4809 ; mul 4810 ; txa 4811 ; add tmp11 4812 ; bcc Store_Mod_KPa2 4813 ; lda #255T ; Limit 4814 ;Store_Mod_KPa2: 4815 ; sta tmp11 lda tmp11 4816 4817 4818 *************************************************************************** 4819 ** F O R V E T A B L E 2 4820 ** Calculation of Final Pulse Width 4821 ** 4822 ** The following equation is evaluated here: 4823 ** 4824 ** High Res Calculation 4825 ** PWCALC2H:L = (TMP6 + TPSACCEL) * 100 + tmp13:tmp14 4826 ** 4827 ** Note that InjOCFuel (injected fuel during injector open and 4828 ** close) is currently a constant - eventually it will be a function 4829 ** of battery voltage. 4830 ** 4831 *************************************************************************** 4832 4833 CALC_FINAL2: 4834 4835 ; lda tmp11 ; From required fuel, above. 4836 ; beq PW2_Done ; If no calculated pulse, then 4837 ; don't open at all. 4838 ;accel in 0.1ms units 100 = 10ms 920D 98 4839 clc 920E B650 4840 lda TPSACCEL 9210 97 4841 tax 9211 A664 4842 lda #$64 ; accel is in 0.1ms units 9213 42 4843 mul 9214 BB9F 4844 add tmp14 9216 B793 4845 sta tmp2 9218 9F 4846 txa 9219 B99E 4847 adc tmp13 921B B792 4848 sta tmp1 921D 98 4849 clc 4850 921E B693 4851 lda tmp2 9220 BB97 4852 add tmp6 9222 B793 4853 sta tmp2 9224 B696 4854 lda tmp5 9226 B992 4855 adc tmp1 9228 B792 4856 sta tmp1 4857 4858 PW2_Done: 4859 4860 Calc_Final2Done: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 50 MC68HC908GP32 User Bootloader 4861 **************************************************************************** 4862 4863 ; mov tmp22,tmp1 922A 4EA6A4 4864 mov tmp21,tmp19 ; When DT done put PW1 back into tmp19,20 922D 4EA7A5 4865 mov tmp22,tmp20 4866 PW2_calc: 4867 ; clr tmp2 9230 C6E021 4868 lda DTmode_f 9233 A510 4869 bit #alt_i2t2 ; if inj2 is not driven from 4870 ; table1 then skip 9235 2608 4871 bne pw2_table2 4872 ; mov tmp20,tmp2 ; 'PW' from table 1 in PW2 9237 4EA4A6 4873 mov tmp19,tmp21 923A 4EA5A7 4874 mov tmp20,tmp22 923D 200E 4875 bra checkRPMsettings 4876 pw2_table2: 4877 ; mov tmp21,tmp2 ; 'PW' from table 2 4878 ; for hires, tmp1/2 is where DT PW2 is stored now, put it in tmp21/22 923F 4E92A6 4879 mov tmp1,tmp21 9242 4E93A7 4880 mov tmp2,tmp22 9245 2006 4881 bra checkRPMsettings 4882 4883 both_table1: 4884 ; lda tmp20 ;kg not needed for hires 4885 ; sta tmp1 4886 ; sta tmp2 9247 4EA4A6 4887 mov tmp19,tmp21 ; both same high 924A 4EA5A7 4888 mov tmp20,tmp22 ; both same low 4889 4890 checkRPMsettings: 4891 ; Do all the rpm related stuff here. 4892 924D 03663C 4893 brclr ShiftLight,feature2,ShiftLightDone 9250 C6E074 4894 lda feature8_f ; if spark output E then no shift lights 9253 A508 4895 bit #spkeopb 9255 2635 4896 bne ShiftLightDone 4897 ; if rpm < shiftLo bclr p3_3, bclr p3_4 4898 ; shiftMd = (shiftLo+shiftHi)/2 4899 ; if rpm < shiftMd bset p3_3, bclr p3_4 4900 ; if rpm < shiftHi bclr p3_3, bset p3_4 4901 ; otherwise bset p3_3, bset p3_4 4902 ;if wheel decoder second input is enabled then lower limit only functions 4903 9257 C6E012 4904 lda shiftLo_f 925A B14D 4905 cmp rpm 925C 2309 4906 bls shiftLight1 925E 1702 4907 bclr 3,portc 9260 006529 4908 brset wd_2trig,feature1,shiftLightDone 9263 1902 4909 bclr 4,portc 9265 2025 4910 bra shiftLightDone 4911 shiftLight1: 9267 CBE013 4912 add shiftHi_f 926A 46 4913 rora 926B B14D 4914 cmp rpm 926D 2309 4915 bls shiftLight2 926F 1602 4916 bset 3,portc 9271 006518 4917 brset wd_2trig,feature1,shiftLightDone 9274 1902 4918 bclr 4,portc 9276 2014 4919 bra shiftLightDone 4920 shiftLight2: 9278 C6E013 4921 lda shiftHi_f 927B B14D 4922 cmp rpm 927D 2306 4923 bls shiftLight3 927F 1702 4924 bclr 3,portc 9281 1802 4925 bset 4,portc 9283 2007 4926 bra shiftLightDone 4927 shiftLight3: 9285 1602 4928 bset 3,portc 9287 006502 4929 brset wd_2trig,feature1,shiftLightDone 928A 1802 4930 bset 4,portc 4931 shiftLightDone: 4932 4933 ;Hard Cut Rev and Launch checks 928C 1B62 4934 bclr sparkCut,RevLimBits ; Reset spark cut bit 928E 05664A 4935 brclr LaunchControl,feature2,LaunchDone; Is Launch selected? 4936 ;Changes to launch system for 025y - JSM 9291 060331 4937 brset Launch,portd,Reset_VL ; Button not pressed so 4938 ; reset variable bit 9294 C60101 4939 lda VlaunchLimit 9297 A108 4940 cmp #08T ; If launch limit higher 9299 2232 4941 bhi chk_launch_lim ; than 800 then it has been set 4942 4943 ;if it is currently zero then we are arming the system. 4944 ;If in Vlaunch mode we grab current rpm and save that as the limit 4945 ;Else, if rpm > LC_flatsel then use flat shift limit 4946 ;else use fixed launch limit 929B C6E02E 4947 lda feature3_f 929E A502 4948 bit #VarLaunchb ; Is variable launch wanted, 92A0 2704 4949 beq No_V_Launch_On ; if not go to fixed section 4950 92A2 B64D 4951 lda rpm ; load rpm and set this as limit 92A4 2022 4952 bra str_launch ; 4953 4954 No_V_Launch_On: 92A6 B64D 4955 lda rpm ; higher or lower than launch/flat limit 92A8 C1E07C 4956 cmp LC_flatsel_f 92AB 250D 4957 blo set_launch ; lower, so launch 92AD C6E09E 4958 lda N2Odel_flat_f ; load flat shift delay 92B0 C70109 4959 sta N2Olaunchdel ; store into launch/nitrous delay timer 92B3 1A61 4960 bset lc_fs,SparkBits ; set flatshift mode on 92B5 C6E080 4961 lda LC_flatlim ; higher so use flat shift limit 92B8 200E 4962 bra str_launch 4963 4964 set_launch: 92BA C6E09D 4965 lda N2Odel_launch_f ; load launch delay 92BD C70109 4966 sta N2Olaunchdel ; store into launch/nitrous delay timer 92C0 C6E014 4967 lda Launchlimit_f ; use launch limit 92C3 2003 4968 bra str_launch 4969 4970 Reset_VL: 92C5 4F 4971 clra 92C6 1B61 4972 bclr lc_fs,SparkBits ; make sure flatshift mode off 4973 4974 str_launch: 92C8 C70101 4975 sta VlaunchLimit ; Reset Launch Limit var 92CB 200E 4976 bra LaunchDone ; Not in Launch mode so 4977 4978 chk_Launch_lim: 92CD B647 4979 lda tps ; Is throttle in right place? 92CF C1E029 4980 cmp LC_Throttle_f 92D2 2507 4981 blo LaunchDone ; No then no LC 4982 92D4 C60101 4983 lda Vlaunchlimit ; load up limit 92D7 B14D 4984 cmp rpm 92D9 256E 4985 blo Chk_Cuts ; We've hit the limiter... 4986 LaunchDone: 4987 4988 ; ***Over Boost Protection********************************** 4989 ; Changes made in 029y4 to deal appropriately with nonstandard maps broke this section. 4990 ; this is a re-write to deal with each case separately. kg 92DB C6E1B6 4991 lda config11_f1 92DE A403 4992 and #$03 92E0 410210 4993 cbeqa #2T,ob_on6300 92E3 41031A 4994 cbeqa #3T,ob_on6400 4995 ;ob_on4250: 92E6 C6E02C 4996 lda Over_B_P_f ; load in Over boost KPa value msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 51 MC68HC908GP32 User Bootloader 92E9 A165 4997 cmp #101T 92EB 2537 4998 blo BoostP_Done ; If set to less than 100KPa 4999 ; then no boost protection 92ED B1C9 5000 cmp kpa ; Is the kpa higher than the 5001 ; boost safety high limit? 92EF 2233 5002 bhi BoostP_Done 92F1 2018 5003 bra Done_ob_on 5004 ob_on6300: 92F3 C6E02C 5005 lda Over_B_P_f ; load in Over boost KPa value 92F6 A154 5006 cmp #84T 92F8 252A 5007 blo BoostP_Done ; If set to less than 100KPa 5008 ; then no boost protection 92FA B1C9 5009 cmp kpa ; Is the kpa higher than the 5010 ; boost safety high limit? 92FC 2226 5011 bhi BoostP_Done 92FE 200B 5012 bra Done_ob_on 5013 ob_on6400: 9300 C6E02C 5014 lda Over_B_P_f ; load in Over boost KPa value 9303 A141 5015 cmp #65T 9305 251D 5016 blo BoostP_Done ; If set to less than 100KPa 5017 ; then no boost protection 9307 B1C9 5018 cmp kpa ; Is the kpa higher than the 5019 ; boost safety high limit? 9309 2219 5020 bhi BoostP_Done 5021 Done_ob_on: 5022 ; if we get here, we are in overboost and the following deals with the different cases. kg 930B C6E04C 5023 lda feature5_f 930E A510 5024 bit #BoostCutb 9310 2709 5025 beq B_SparkFuel ; Spark Cut Mode? 5026 9312 B6D5 5027 lda SparkCutCnt 9314 C1E054 5028 cmp SparkCutBNum_f ; Have we sparked more than 5029 ; the user defined number? 9317 2202 5030 bhi B_SparkFuel ; Yes so dont cut any more sparks 9319 1A62 5031 bset sparkCut,RevLimBits ; No so cut next spark 5032 5033 B_SparkFuel: 931B C6E04C 5034 lda feature5_f 931E A520 5035 bit #BoostCut2b 9320 2640 5036 bne cutChannels 9322 2053 5037 bra checkRevsOk 5038 BoostP_Done: 5039 5040 ;implement fuel cut from rev limiter soft limiter 9324 026209 5041 brset RevLimHSoft,RevLimBits,Chk_Rev_Cuts 5042 5043 ; Hard-cut rev limiter, done here during pulse 5044 ; calcs to avoid timing issues if we set pw and 5045 ; then reset it a few instructions later. I was 5046 ; seeing "ghost" pulses when this was the case. 5047 checkHighLimit: 9327 C6E006 5048 lda revLimit_f 932A 274B 5049 beq checkRevsOk ; Zero means no limit 932C B14D 5050 cmp rpm 932E 2447 5051 bhs checkRevsOk ; We have not hit any 5052 ; Rev limits 5053 5054 ; IF we get here we are in rev limit hard cut mode so check for 5055 ; fuel or and spark cut 5056 Chk_Rev_Cuts: 9330 C6E02E 5057 lda feature3_f 9333 A510 5058 bit #Fuel_SparkHardb ; Spark cut mode? 9335 2709 5059 beq FuelCut_C 9337 B6D5 5060 lda SparkCutCnt ; We are in spark cut only 5061 ; mode so how many sparks 5062 ; are we at? 9339 C1E02D 5063 cmp SparkCutNum_f ; User defined spark number 933C 2202 5064 bhi Fuelcut_C ; If spark count higher than 5065 ; number dont set spark cut bit 933E 1A62 5066 bset sparkCut,RevLimBits ; Set sparkcut bit 5067 5068 ; HARD REV LIMITER FUEL CUT 5069 Fuelcut_C: 9340 C6E02E 5070 lda feature3_f 9343 A520 5071 bit #FuelSparkCutb ; Are we cutting fuel? 9345 261B 5072 bne cutChannels 9347 202E 5073 bra checkRevsOk 5074 5075 ;If we get here we are in Launch control 5076 ;so check whether spark and or fuel cuts 5077 Chk_Cuts: 9349 C6E04C 5078 lda feature5_f 934C A501 5079 bit #Fuel_SparkHLCb 934E 2709 5080 beq SparkFuel_LC ; Spark cut? 5081 9350 B6D5 5082 lda SparkCutCnt ; We are in spark cut 5083 ; mode so how many sparks 5084 ; are we at? 9352 C1E04D 5085 cmp SparkCutNLC_f ; User defined spark number 5086 ; for Launch 9355 2202 5087 bhi SparkFuel_LC ; If spark count higher than 5088 ; number dont set spark cut bit 9357 1A62 5089 bset sparkCut,RevLimBits ; Set sparkcut bit 5090 5091 SparkFuel_LC: 9359 C6E04C 5092 lda feature5_f ; Launch fuel cut? 935C A502 5093 bit #FuelSparkLCb 935E 2602 5094 bne cutChannels 9360 2015 5095 bra checkRevsOk 5096 5097 cutChannels: 5098 ; clr tmp1 5099 ; clr tmp2 9362 1568 5100 bclr OverRun,EnhancedBits ; Reset Over Run Fuel Cut 5101 ;sph for HR code 9364 3FA4 5102 clr tmp19 9366 3FA5 5103 clr tmp20 9368 3FA6 5104 clr tmp21 936A 3FA7 5105 clr tmp22 936C 3F4E 5106 clr pwcalch 936E 3F4F 5107 clr pwcalcl 9370 3F54 5108 clr pwcalc2h 9372 3F55 5109 clr pwcalc2l 5110 ; mov tmp1,pwcalc1 5111 ; mov tmp2,pwcalc2 9374 CC9468 5112 jmp spark_lookup ; In fuel cut mode so return 5113 ; with zeros 5114 checkRevsOk: 9377 01690A 5115 brclr Traction,EnhancedBits2,No_Traction_On 937A B6DF 5116 lda TCSparkCut 937C 2706 5117 beq No_Traction_On ; If zero then no spark cut 937E B1D5 5118 cmp SparkCutCnt ; In traction mode do we 5119 ; cut sparks 9380 2302 5120 bls No_Traction_On 9382 1A62 5121 bset sparkCut,RevLimBits ; Set sparkcut bit 5122 5123 No_Traction_On: 5124 5125 ; More ALS code 9384 C6E87F 5126 lda ALS_CONFIG 9387 A501 5127 bit #%00000001 9389 270C 5128 beq No_ALS_On 938B 0B6909 5129 brclr over_Run_Set,EnhancedBits2,No_ALS_On 938E B6D5 5130 lda SparkCutCnt 9390 C1E87E 5131 cmp ALS_SparkCut 9393 2202 5132 bhi No_ALS_On msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 52 MC68HC908GP32 User Bootloader 9395 1A62 5133 bset sparkCut,RevLimBits 5134 5135 No_ALS_On: 5136 ; more ALS code end 5137 9397 0468C8 5138 brset OverRun,EnhancedBits,cutChannels; If Over run fuel cut on 5139 ; cut fuel 5140 5141 ; Add in the NOS and Staged PW's here 939A C6E04C 5142 lda feature5_f 939D A50C 5143 bit #stagedeither 939F 2633 5144 bne Add_to_PWCALC 5145 ; brset staged,feature5,Add_to_PWCALC ; If in Staged mode Add 5146 ; to PW1+2 5147 ; brset stagedMode,feature5,Add_to_PWCALC; If in Staged mode 5148 ; Add to PW1+2 93A1 0E6530 5149 brset Nitrous,feature1,Add_to_PWCALC; If NOS System selected 5150 ; add to PW1+2 5151 93A4 02421E 5152 brset crank,engine,No_TCAccel 5153 5154 ; lda tmp1 5155 ; add TCAccel 5156 ; sta tmp1 5157 ; lda tmp2 5158 ; add TCAccel ; Add in the traction 5159 ; control enrichments 5160 ; sta tmp2 5161 5162 ;sph high res add 93A7 B6DD 5163 lda TCAccel 93A9 97 5164 tax 93AA A664 5165 lda #$64 93AC 42 5166 mul 93AD BBA5 5167 add tmp20 93AF B7A5 5168 sta tmp20 ; This is the lower part of final pw1 93B1 9F 5169 txa 93B2 B9A4 5170 adc tmp19 93B4 B7A4 5171 sta tmp19 ; This is the upper part of final pw1 5172 ;sph high res add 93B6 B6DD 5173 lda TCAccel 93B8 97 5174 tax 93B9 A664 5175 lda #$64 93BB 42 5176 mul 93BC BBA7 5177 add tmp22 93BE B7A7 5178 sta tmp22 ; This is the lower part of final pw2 93C0 9F 5179 txa 93C1 B9A6 5180 adc tmp21 93C3 B7A6 5181 sta tmp21 ; This is the upper part of final pw2 5182 5183 No_TCAccel: 5184 ; mov tmp1,pwcalc1 5185 ; mov tmp2,pwcalc2 5186 ; in hires they are tmp19/20 and tmp 21/22 93C5 4EA44E 5187 mov tmp19,pwcalch 93C8 4EA54F 5188 mov tmp20,pwcalcl 93CB 4EA654 5189 mov tmp21,pwcalc2h 93CE 4EA755 5190 mov tmp22,pwcalc2l 93D1 CC9468 5191 jmp spark_lookup 5192 Add_to_PWCALC: 93D4 C6E021 5193 lda DTmode_f ; check if DT in use 93D7 A510 5194 bit #alt_i2t2 93D9 2707 5195 beq Do_Nos_PW1 ; i2t2=1 5196 93DB C6E042 5197 lda feature4_f 93DE A520 5198 bit #DtNosb 93E0 2610 5199 bne Dont_Nos_PW1 5200 ; brset DtNos,feature4,Dont_Nos_PW1 5201 Do_Nos_PW1: 5202 ; lda tmp1 5203 ; add NosPW ; Add Nos PW to pw1 5204 ; sta tmp1 5205 ;sph high res add 93E2 C60106 5206 lda NosPW 93E5 97 5207 tax 93E6 A664 5208 lda #$64 93E8 42 5209 mul 93E9 BBA5 5210 add tmp20 93EB B7A5 5211 sta tmp20 ; This is the lower part of final pw1 93ED 9F 5212 txa 93EE B9A4 5213 adc tmp19 93F0 B7A4 5214 sta tmp19 ; This is the upper part of final pw1 5215 5216 Dont_Nos_PW1: 93F2 07680A 5217 brclr REStaging,EnhancedBits,No_Staging; Staging not running 5218 ; so dont add PW Staging 93F5 C60108 5219 lda pw_stagedl 93F8 B7A5 5220 sta tmp20 ; This is the lower part of final pw1 93FA C60107 5221 lda pw_stagedh 93FD B7A4 5222 sta tmp19 ; This is the upper part of final pw1 5223 No_Staging: ; Staging not running 93FF C6E04C 5224 lda feature5_f 9402 A50C 5225 bit #stagedeither 9404 2602 5226 bne Staging_2_PW ; If in Staged mode Go to NOS PW2 9406 2013 5227 bra Staging_Done_PW 5228 Staging_2_PW: 9408 07680C 5229 brclr REStaging,EnhancedBits,No_PW2_Staging ; Staging Mode not 5230 ; running so no PW2 5231 ; hires kg 940B C6010C 5232 lda pw_staged2l 940E B7A7 5233 sta tmp22 ; This is the lower part of final pw2 9410 C6010B 5234 lda pw_staged2h 9413 B7A6 5235 sta tmp21 ; This is the upper part of final pw2 9415 2004 5236 bra Staging_Done_PW 5237 No_PW2_Staging: 5238 ; clr tmp2 ; In Staging Mode but not running PW2 9417 3FA6 5239 clr tmp21 9419 3FA7 5240 clr tmp22 5241 5242 5243 Staging_Done_PW: 941B C6E021 5244 lda DTmode_f ; check if DT in use 941E A510 5245 bit #alt_i2t2 9420 2707 5246 beq Nos_PWCal2 ; i2t2=1 9422 C6E042 5247 lda feature4_f 9425 A520 5248 bit #DtNosb 9427 2710 5249 beq Calc_PWs_DONE ; In DT mode so do we add 5250 ; NosPW to PW2? 5251 Nos_PWCal2: 5252 ; lda tmp2 5253 ; add NosPW ; Add Nos PW to pwcalc2 5254 ; sta tmp2 5255 5256 ;sph high res add 9429 C60106 5257 lda NosPW 942C 97 5258 tax 942D A664 5259 lda #$64 942F 42 5260 mul 9430 BBA7 5261 add tmp22 9432 B7A7 5262 sta tmp22 ; This is the lower part of final pw2 9434 9F 5263 txa 9435 B9A6 5264 adc tmp21 9437 B7A6 5265 sta tmp21 ; This is the upper part of final pw2 5266 Calc_PWs_DONE: 9439 02421E 5267 brset crank,engine,No_TCAccel2 5268 ; lda tmp1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 53 MC68HC908GP32 User Bootloader 5269 ; add TCAccel 5270 ; sta tmp1 5271 ; lda tmp2 5272 ; add TCAccel ; Add in the traction 5273 ; control enrichments 5274 ; sta tmp2 5275 5276 ;sph high res add TC enrichment #1 943C B6DD 5277 lda TCAccel 943E 97 5278 tax 943F A664 5279 lda #$64 9441 42 5280 mul 9442 BBA5 5281 add tmp20 9444 B7A5 5282 sta tmp20 ; This is the lower part of final pw1 9446 9F 5283 txa 9447 B9A4 5284 adc tmp19 9449 B7A4 5285 sta tmp19 ; This is the upper part of final pw1 5286 ;sph high res add #2 944B B6DD 5287 lda TCAccel 944D 97 5288 tax 944E A664 5289 lda #$64 9450 42 5290 mul 9451 BBA7 5291 add tmp22 9453 B7A7 5292 sta tmp22 ; This is the lower part of final pw2 9455 9F 5293 txa 9456 B9A6 5294 adc tmp21 9458 B7A6 5295 sta tmp21 ; This is the upper part of final pw2 5296 5297 No_TCAccel2: 5298 ; mov tmp1,pwcalc1 5299 ; mov tmp2,pwcalc2 5300 ; in hires they are pw1 - tmp19/20 and pw2 - tmp21/22 945A 4EA44E 5301 mov tmp19,pwcalch 945D 4EA54F 5302 mov tmp20,pwcalcl 9460 4EA654 5303 mov tmp21,pwcalc2h 9463 4EA755 5304 mov tmp22,pwcalc2l 9466 2000 5305 bra spark_lookup 5306 5307 *************************************************************************** 5308 ** 5309 ** Check if fixed spark angle - only works if we are tuning this page 5310 ** 5311 *************************************************************************** 5312 spark_lookup: 9468 C6E000 5313 lda personality_f ; Are we using a spark mode? 946B 270C 5314 beq No_Personality 5315 946D C60102 5316 lda page 9470 A103 5317 cmp #3 9472 2608 5318 bne fixed_fl 9474 C601BD 5319 lda FixedAngle_r 9477 2006 5320 bra fxr_c 5321 No_Personality: 9479 CC9797 5322 jmp CheckSoftLimit ; No spark Stuff set, so only fuel 5323 947C C6E3A9 5324 fixed_fl: lda FixedAngle_f 5325 fxr_c: 947F A103 5326 cmp #$03 9481 2503 5327 blo NOT_FIXED ; Added this as earlier MT didnt 5328 ; send a perfect 00T for -10 (use map) 5329 ;; sta SparkAngle ; else use this fixed advance 9483 CC9738 5330 jmp CALC_DELAY 5331 NOT_FIXED: 9486 0D620F 5332 brclr LaunchOn,RevLimBits,Not_LC_in 9489 0A6106 5333 brset lc_fs,SparkBits,nf_flat 948C C6E02A 5334 lda LC_LimAngle_f ; Launch Retard spark Angle 5335 ;; sta SparkAngle 948F CC9738 5336 jmp CALC_DELAY 5337 nf_flat: 9492 C6E08D 5338 lda LC_f_limangle_f 5339 ;; sta SparkAngle 9495 CC9738 5340 jmp CALC_DELAY 5341 Not_LC_in: 9498 C6E3AE 5342 lda IdleAdvance_f 949B A103 5343 cmp #$03 949D 2531 5344 blo use_spark_table 5345 ; check if set too high. Users loading old MSQ will have $FF in this byte 949F A1F0 5346 cmp #$F0 94A1 222D 5347 bhi use_spark_table 5348 ; if there's an idle advance set, see if we want to use it 94A3 B6CA 5349 lda coolant 94A5 C1E3B1 5350 cmp IdleCLTThresh_f 94A8 2520 5351 blo idleadv_cond_false 5352 ; check the tps to see if it's ok to use idle advance 94AA B647 5353 lda tps 94AC C1E3AF 5354 cmp IdleTPSThresh_f 94AF 2219 5355 bhi idleadv_cond_false 5356 ; ok, tps is where it needs to be, what about rpm? 94B1 B64D 5357 lda rpm 94B3 C1E3B0 5358 cmp IdleRPMThresh_f 94B6 2212 5359 bhi idleadv_cond_false 5360 ; set a bit to say all conditions are met so the timer will start 94B8 186D 5361 bset IdleAdvTimeOK,EnhancedBits6 5362 ; check to see if the time is up 94BA C6010E 5363 lda idlAdvHld 94BD C1E3B2 5364 cmp IdleDelayTime_f 94C0 250E 5365 blo use_spark_table 5366 ; ok, rpm is also where it should be, so use IdleAdvance_f 5367 ; if we are here, we don't want the timer going up, so stop it 94C2 196D 5368 bclr IdleAdvTimeOK,EnhancedBits6 94C4 C6E3AE 5369 lda IdleAdvance_f 94C7 CC9738 5370 jmp CALC_DELAY 5371 idleadv_cond_false: 94CA 196D 5372 bclr IdleAdvTimeOK,EnhancedBits6 94CC 4F 5373 clra 94CD C7010E 5374 sta idlAdvHld 5375 use_spark_table: 94D0 016206 5376 brclr RevLimSoft,RevLimBits,STTABLELOOKUP 94D3 C6E003 5377 lda SRevLimAngle ; Retard spark 94D6 CC9738 5378 jmp CALC_DELAY 5379 *************************************************************************** 5380 ** 5381 ** ST 3-D Table Lookup 5382 ** 5383 ** This is used to determine value of SparkAngle ST based on RPM and MAP 5384 ** The table looks like: 5385 ** 5386 ** 105 +....+....+....+....+....+....+....+ 5387 ** .................................... 5388 ** 100 +....+....+....+....+....+....+....+ 5389 ** ... 5390 ** KPA ... 5391 ** ... 5392 ** 35 +....+....+....+....+....+....+....+ 5393 ** 5 15 25 35 45 55 65 75 RPM/100 5394 ** 5395 ** 5396 ** Steps: 5397 ** 1) Find the bracketing KPA positions via tableLookup, 5398 ** put index in tmp8 and bounding values in tmp9(kpa1) and tmp10(kpa2) 5399 ** 2) Find the bracketing RPM positions via tableLookup, store 5400 ** index in tmp11 and bounding values in tmp13(rpm1) and tmp14(rpm2) 5401 ** 3) Using the ST table, find the table ST values for tmp15=ST(kpa1,rpm1), 5402 ** tmp16=ST(kpa1,rpm2), tmp17 = ST(kpa2,rpm1), and tmp18 = ST(kpa2,rpm2) 5403 ** 4) Find the interpolated ST value at the lower KPA range : 5404 ** x1=rpm1, x2=rpm2, y1=ST(kpa1,rpm1), y2=ST(kpa1,rpm2) - put in tmp19 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 54 MC68HC908GP32 User Bootloader 5405 ** 5) Find the interpolated ST value at the upper KPA range : 5406 ** x1=rpm1, x2=rpm2, y1=ST(kpa2,rpm1), y2=ST(kpa2,rpm2) - put in tmp11 5407 ** 6) Find the final ST value using the two interpolated ST values: 5408 ** x1=kpa1, x2=kpa2, y1=ST_FROM_STEP_4, y2=ST_FROM_STEP_5 5409 ** 5410 *************************************************************************** 5411 STTABLELOOKUP: 5412 ; First, determine if in Speed-density or Alpha-N mode. If in Alpha-N 5413 ; mode, then replace the variable "kpa" with the contents of "tps". 5414 ; This will not break anything, since this check is performed again when 5415 ; multiplying MAP against the enrichments, and the SCI version of the 5416 ; variable is MAP, not kpa 5417 94D9 C6E0B8 5418 lda feature9_f 94DC A520 5419 bit #MassAirFlwb 94DE 2706 5420 beq SD_ALPHa_N ; Are we using a MAF on pin X7? 5421 94E0 B65C 5422 lda o2_fpadc ; Using MAF thats on pin X7 94E2 B7D8 5423 sta kpa_n 94E4 2011 5424 bra ST_STEP_1 5425 5426 SD_ALPHa_N: 94E6 C6E1B8 5427 lda config13_f1 ; Check if in speed-density or 5428 ; Aplha-N mode 94E9 A504 5429 bit #$04 ; Use BIT instead of brset because 5430 ; outside of zero-page 94EB 2706 5431 beq Kpa_n_Kpa ; Branch if the bit is clear 5432 94ED B647 5433 lda tps ; Alpha_N Mode 94EF B7D8 5434 sta kpa_n ; Added so as KPa can be used 5435 ; elsewhere in code 94F1 2004 5436 bra ST_STEP_1 5437 5438 Kpa_n_Kpa: ; Speed Den Mode 94F3 B6C9 5439 lda kpa 94F5 B7D8 5440 sta kpa_n ; Added so as KPa can be used 5441 5442 ST_STEP_1: ; else where in code 94F7 45E39C 5443 ldhx #KPARANGEST_f1 94FA 3592 5444 sthx tmp1 94FC A60B 5445 lda #$0b ;(12-1) 94FE B794 5446 sta tmp3 9500 B6D8 5447 lda kpa_n 9502 B795 5448 sta tmp4 9504 CDD503 5449 jsr tableLookup 9507 4E9699 5450 mov tmp5,tmp8 ;Index 950A 4E929A 5451 mov tmp1,tmp9 ;X1 950D 4E939B 5452 mov tmp2,tmp10 ;X2 5453 ST_STEP_2: 9510 45E390 5454 ldhx #RPMRANGEST_f1 9513 3592 5455 sthx tmp1 9515 A60B 5456 lda #$0b ;(12-1) 9517 B794 5457 sta tmp3 9519 B64D 5458 lda rpm 951B B795 5459 sta tmp4 951D CDD503 5460 jsr tableLookup 9520 4E969C 5461 mov tmp5,tmp11 ;Index 9523 4E929E 5462 mov tmp1,tmp13 ;X1 9526 4E939F 5463 mov tmp2,tmp14 ;X2 5464 ST_STEP_3: 5465 ;TABLEWALK: 9529 8C 5466 clrh 952A AE0C 5467 ldx #$0c ;(12) 952C B699 5468 lda tmp8 952E 4A 5469 deca 952F 42 5470 mul 9530 BB9C 5471 add tmp11 9532 4A 5472 deca 9533 97 5473 tax 9534 macro 5474 VE3X 9534 C60102 5475 LDA PAGE 9537 A103 5476 CMP #03T 9539 2605 5477 BNE VE3XF 953B D60114 5478 LDA VE_R,X 953E 2003 5479 BRA VE3XC 9540 D6E300 5480 VE3XF: LDA ST_F1,X 5481 VE3XC: 9543 B7A0 5482 sta tmp15 9545 5C 5483 incx 9546 macro 5484 VE3X 9546 C60102 5485 LDA PAGE 9549 A103 5486 CMP #03T 954B 2605 5487 BNE VE3XF 954D D60114 5488 LDA VE_R,X 9550 2003 5489 BRA VE3XC 9552 D6E300 5490 VE3XF: LDA ST_F1,X 5491 VE3XC: 9555 B7A1 5492 sta tmp16 9557 AE0C 5493 ldx #$0c ;(12) 9559 B699 5494 lda tmp8 955B 42 5495 mul 955C BB9C 5496 add tmp11 955E 4A 5497 deca 955F 97 5498 tax 9560 macro 5499 VE3X 9560 C60102 5500 LDA PAGE 9563 A103 5501 CMP #03T 9565 2605 5502 BNE VE3XF 9567 D60114 5503 LDA VE_R,X 956A 2003 5504 BRA VE3XC 956C D6E300 5505 VE3XF: LDA ST_F1,X 5506 VE3XC: 956F B7A2 5507 sta tmp17 9571 5C 5508 incx 9572 macro 5509 VE3X 9572 C60102 5510 LDA PAGE 9575 A103 5511 CMP #03T 9577 2605 5512 BNE VE3XF 9579 D60114 5513 LDA VE_R,X 957C 2003 5514 BRA VE3XC 957E D6E300 5515 VE3XF: LDA ST_F1,X 5516 VE3XC: 9581 B7A3 5517 sta tmp18 9583 CC9586 5518 jmp ST_STEP_4 5519 5520 ST_STEP_4: 9586 4E9E92 5521 mov tmp13,tmp1 9589 4E9F93 5522 mov tmp14,tmp2 958C 4EA094 5523 mov tmp15,tmp3 958F 4EA195 5524 mov tmp16,tmp4 9592 4E4D96 5525 mov rpm,tmp5 9595 CDD51E 5526 jsr lininterp 9598 4E97A4 5527 mov tmp6,tmp19 5528 5529 ST_STEP_5: 959B 4E9E92 5530 mov tmp13,tmp1 959E 4E9F93 5531 mov tmp14,tmp2 95A1 4EA294 5532 mov tmp17,tmp3 95A4 4EA395 5533 mov tmp18,tmp4 95A7 4E4D96 5534 mov rpm,tmp5 95AA CDD51E 5535 jsr lininterp 95AD 4E979C 5536 mov tmp6,tmp11 5537 5538 ST_STEP_6: 95B0 4E9A92 5539 mov tmp9,tmp1 95B3 4E9B93 5540 mov tmp10,tmp2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 55 MC68HC908GP32 User Bootloader 95B6 4EA494 5541 mov tmp19,tmp3 95B9 4E9C95 5542 mov tmp11,tmp4 95BC 4ED896 5543 mov kpa_n,tmp5 95BF CDD51E 5544 jsr lininterp 95C2 B697 5545 lda tmp6 95C4 B7D9 5546 sta tmp31 ; Store the result away 5547 5548 ; Spark Table 2 Lookup 5549 ST2_STEP_1: 95C6 C6E04C 5550 lda feature5_f ; Are we using SparkTable2? 95C9 A580 5551 bit #SparkTable2b 95CB 2726 5552 beq LookUp_Done 5553 ; 95CD 0F6503 5554 brclr Nitrous,feature1,No_NOS_STable2 ; Are we using NOS? 95D0 036820 5555 brclr NosSysOn,EnhancedBits,LookUp_Done ; NOS Mode not ready. 5556 No_NOS_STable2: 95D3 B6DB 5557 lda ST2Timer ; Spark table 2 delay timer 95D5 261C 5558 bne LookUp_Done ; If its not zero no ST2 95D7 45E49C 5559 ldhx #KPARANGEST_f2 95DA 3592 5560 sthx tmp1 95DC A60B 5561 lda #$0b ;(12-1) 95DE B794 5562 sta tmp3 95E0 B6D8 5563 lda kpa_n 95E2 B795 5564 sta tmp4 95E4 CDD503 5565 jsr tableLookup 95E7 4E9699 5566 mov tmp5,tmp8 ;Index 95EA 4E929A 5567 mov tmp1,tmp9 ;X1 95ED 4E939B 5568 mov tmp2,tmp10 ;X2 95F0 CC95F6 5569 jmp ST2_STEP_2 5570 5571 LookUp_Done: 95F3 CC96AB 5572 jmp LookUp_Finished 5573 5574 ST2_STEP_2: 95F6 45E490 5575 ldhx #RPMRANGEST_f2 95F9 3592 5576 sthx tmp1 95FB A60B 5577 lda #$0b ;(12-1) 95FD B794 5578 sta tmp3 95FF B64D 5579 lda rpm 9601 B795 5580 sta tmp4 9603 CDD503 5581 jsr tableLookup 9606 4E969C 5582 mov tmp5,tmp11 ;Index 9609 4E929E 5583 mov tmp1,tmp13 ;X1 960C 4E939F 5584 mov tmp2,tmp14 ;X2 5585 ST2_STEP_3: 5586 ;TABLEWALK: 960F 8C 5587 clrh 9610 AE0C 5588 ldx #$0c ;(12) 9612 B699 5589 lda tmp8 9614 4A 5590 deca 9615 42 5591 mul 9616 BB9C 5592 add tmp11 9618 4A 5593 deca 9619 97 5594 tax 961A macro 5595 VE4X 961A C60102 5596 LDA PAGE 961D A104 5597 CMP #04T 961F 2605 5598 BNE VE4XF 9621 D60114 5599 LDA VE_R,X 9624 2003 5600 BRA VE4XC 9626 D6E400 5601 VE4XF: LDA ST_F2,X 5602 VE4XC: 9629 B7A0 5603 sta tmp15 962B 5C 5604 incx 962C macro 5605 VE4X 962C C60102 5606 LDA PAGE 962F A104 5607 CMP #04T 9631 2605 5608 BNE VE4XF 9633 D60114 5609 LDA VE_R,X 9636 2003 5610 BRA VE4XC 9638 D6E400 5611 VE4XF: LDA ST_F2,X 5612 VE4XC: 963B B7A1 5613 sta tmp16 963D AE0C 5614 ldx #$0c ;(12) 963F B699 5615 lda tmp8 9641 42 5616 mul 9642 BB9C 5617 add tmp11 9644 4A 5618 deca 9645 97 5619 tax 9646 macro 5620 VE4X 9646 C60102 5621 LDA PAGE 9649 A104 5622 CMP #04T 964B 2605 5623 BNE VE4XF 964D D60114 5624 LDA VE_R,X 9650 2003 5625 BRA VE4XC 9652 D6E400 5626 VE4XF: LDA ST_F2,X 5627 VE4XC: 9655 B7A2 5628 sta tmp17 9657 5C 5629 incx 9658 macro 5630 VE4X 9658 C60102 5631 LDA PAGE 965B A104 5632 CMP #04T 965D 2605 5633 BNE VE4XF 965F D60114 5634 LDA VE_R,X 9662 2003 5635 BRA VE4XC 9664 D6E400 5636 VE4XF: LDA ST_F2,X 5637 VE4XC: 9667 B7A3 5638 sta tmp18 9669 CC966C 5639 jmp ST2_STEP_4 5640 5641 ST2_STEP_4: 966C 4E9E92 5642 mov tmp13,tmp1 966F 4E9F93 5643 mov tmp14,tmp2 9672 4EA094 5644 mov tmp15,tmp3 9675 4EA195 5645 mov tmp16,tmp4 9678 4E4D96 5646 mov rpm,tmp5 967B CDD51E 5647 jsr lininterp 967E 4E97A4 5648 mov tmp6,tmp19 5649 5650 ST2_STEP_5: 9681 4E9E92 5651 mov tmp13,tmp1 9684 4E9F93 5652 mov tmp14,tmp2 9687 4EA294 5653 mov tmp17,tmp3 968A 4EA395 5654 mov tmp18,tmp4 968D 4E4D96 5655 mov rpm,tmp5 9690 CDD51E 5656 jsr lininterp 9693 4E979C 5657 mov tmp6,tmp11 5658 5659 ST2_STEP_6: 9696 4E9A92 5660 mov tmp9,tmp1 9699 4E9B93 5661 mov tmp10,tmp2 969C 4EA494 5662 mov tmp19,tmp3 969F 4E9C95 5663 mov tmp11,tmp4 96A2 4ED896 5664 mov kpa_n,tmp5 96A5 CDD51E 5665 jsr lininterp ; Spark Table 2 result in tmp6 96A8 030304 5666 brclr NosIn,portd,Not_ST1 ; If input low then use ST2 5667 5668 LookUp_Finished: 96AB B6D9 5669 lda tmp31 ; Reload the look up angle for ST1 96AD B797 5670 sta tmp6 5671 Not_ST1: 96AF C60102 5672 lda page 96B2 A103 5673 cmp #3 96B4 2605 5674 bne trim_fl 96B6 C601BE 5675 lda TrimAngle_r 96B9 2003 5676 bra trim_c msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 56 MC68HC908GP32 User Bootloader 96BB C6E3AA 5677 trim_fl: lda TrimAngle_f 96BE 2A0A 5678 trim_c: bpl CHECK_SP_ADD ; check adding of trim 96C0 BB97 5679 add tmp6 ; add lookup angle 96C2 250E 5680 bcs TRIM_DONE ; if carry, all is done = high advance 96C4 2A0C 5681 bpl TRIM_DONE ; if result is positive 96C6 A600 5682 lda #$00 ; Negative trim over to high advance, 5683 ; clamp to 0 96C8 2008 5684 bra TRIM_DONE 5685 5686 CHECK_SP_ADD: 96CA BB97 5687 add tmp6 ; add lookup angle 96CC 2404 5688 bcc TRIM_DONE ; Check if add over into low advance 96CE 2B02 5689 bmi TRIM_DONE ; Check if result negative 96D0 A6FF 5690 lda #$FF ; Clamp to maximum 5691 5692 TRIM_DONE: 96D2 03420D 5693 brclr crank,engine,TRIM_DONE2 96D5 0A6B05 5694 brset nextcyl,EnhancedBits4,td_nc 96D8 C6E3AB 5695 lda CrankAngle_f ; Update spark angle for User Interface 96DB 2005 5696 bra TRIM_DONE2 5697 td_nc: 96DD C6E3A8 5698 lda TriggAngle_f ; if next cyl cranking then use trigger angle 96E0 AB1C 5699 add #28T ; add on 10 deg offset 5700 5701 TRIM_DONE2: 5702 ; bmi store_spark ; Check if result negative 5703 ; (i.e. > 10ATDC) 5704 ; lda #0 ; Clamp to minimum (surely safer?) 5705 store_spark: 96E2 024253 5706 brset crank,engine,store_spark2 ; if we are cranking skip 5707 ;to the save 5708 96E5 BB5E 5709 add CltIatAngle 96E7 BBFF 5710 add KnockAngleRet 96E9 CB0105 5711 add NitrousAngle 96EC 98 5712 clc ; Clear carry bit ** 96ED BBDE 5713 add TCAngle 96EF 2402 5714 bcc Store_Spark_Ang ; Did we over flow with the 5715 ; traction angle? ** 96F1 A61C 5716 lda #28T ; Yes so limit angle to 0 deg ** 5717 Store_Spark_Ang: 96F3 87 5718 psha 96F4 C6E87F 5719 lda ALS_CONFIG 96F7 A501 5720 bit #%00000001 96F9 272E 5721 beq check_launchangle 96FB A502 5722 bit #%00000010 96FD 272A 5723 beq check_launchangle 96FF 0B6927 5724 brclr over_Run_Set,EnhancedBits2,check_launchangle 9702 45E875 5725 ldhx #ALS_RPM ; Load memory address of RPM range. 9705 3592 5726 sthx tmp1 ; Put it in tmp1 9707 6E0394 5727 mov #$03,tmp3 ; 4 byte table 970A 4E4D95 5728 mov rpm,tmp4 ; Table axis is RPM 970D CDD503 5729 jsr tablelookup 9710 8C 5730 clrh 9711 BE96 5731 ldx tmp5 ; Put the field into tmp5 9713 D6E871 5732 lda ALS_RETARD,x 9716 B795 5733 sta liY2 9718 5A 5734 decx 9719 D6E871 5735 lda ALS_RETARD,x 971C B794 5736 sta liY1 971E 4E4D96 5737 mov rpm,lix ; RPM is the table axis 9721 CDD51E 5738 jsr lininterp 9724 86 5739 pula 9725 B697 5740 lda tmp6 ; Result from linear interpolation 9727 200A 5741 bra Not_in_LC 5742 5743 check_launchangle: 9729 86 5744 pula 972A 0D620B 5745 brclr LaunchOn,RevLimBits,store_spark2 972D 0A6105 5746 brset lc_fs,SparkBits,nf_flat2 9730 C6E02A 5747 lda LC_LimAngle_f ; Launch Retard spark Angle 5748 5749 Not_in_LC: 9733 2003 5750 bra store_spark2 5751 nf_flat2: 9735 C6E08D 5752 lda LC_f_limangle_f 5753 5754 store_spark2: 5755 CALC_DELAY: 9738 97 5756 tax ; take a copy in x, but don't save to SparkAngle yet 5757 9739 08632C 5758 brset EDIS,personality,edis_calc 5759 973C 0B6B1B 5760 brclr nextcyl,EnhancedBits4,this_cyl 973F A01C 5761 sub #28T ; subtract 10 deg offset 9741 2505 5762 bcs next_cyl_rail ; just in case map has -ves in it. 9743 C1E3A8 5763 cmp TriggAngle_f 9746 2208 5764 bhi next_cyl_calc ; if spark angle > trigger we're ok 5765 next_cyl_rail: 9748 C6E3A8 5766 lda TriggAngle_f 974B AB1F 5767 add #31T ; add on 10deg offset + 1 degree safety margin 974D 97 5768 tax ; save copy in x 974E A01C 5769 sub #28T ; remove that 10deg offset again 5770 ***************************************************************************** 5771 ** next Cyl mode works like this... 5772 ** DelayAngle = SparkAngle-Trigger 5773 ***************************************************************************** 5774 next_cyl_calc: 9750 BF5A 5775 stx SparkAngle 9752 C0E3A8 5776 sub TriggAngle_f 5777 ;can't go negative because we checked just above 9755 C70103 5778 sta DelayAngle 9758 203D 5779 bra CheckSoftLimit 5780 5781 this_cyl: 975A BF5A 5782 stx SparkAngle 975C C6E3A8 5783 lda TriggAngle_f 975F B05A 5784 sub SparkAngle 9761 AB1C 5785 add #28T 9763 C70103 5786 sta DelayAngle 9766 202F 5787 bra CheckSoftLimit 5788 5789 edis_calc: 5790 ***************************************************************************** 5791 ** Delay angle not used, but code left as-is for simplicity 5792 ** now convert to SAW width. SAW = 1536 - (25.6 * adv) 5793 ** SparkAngle = adv / 45 * 128 by definition in MSS 5794 ** adv = SparkAngle * 45 / 128 re-arrange for adv 5795 ** (256 * 45 * SparkAngle) 5796 ** SAW = 1536 - (---------------------) 5797 ** (128 * 10 ) 5798 ** 5799 ** SAW (us) = 1536 - (SparkAngle * 9) 5800 ** BUT we will use baseline timing of 10ATDC so formula becomes 5801 ** SAW (us) = 1792 - (SparkAngle * 9) 5802 ** 5803 ** JSM - physical tests show some skewing, pulse is 2-3% longer and at 5804 ** least 15us too long 5805 ** make it 1777 ($6f1) 5806 ***************************************************************************** 5807 9768 BF5A 5808 stx SparkAngle 976A 9F 5809 txa 976B AE09 5810 ldx #9 976D 42 5811 mul ; stores result in x:a 976E BF92 5812 stx tmp1 ; save them msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 57 MC68HC908GP32 User Bootloader 9770 B793 5813 sta tmp2 9772 98 5814 clc 9773 A6F1 5815 lda #$f1 ; do 1792-... (1792 = $700) (1777 = $6f1) 9775 B293 5816 sbc tmp2 9777 B793 5817 sta tmp2 9779 A606 5818 lda #$6 977B B292 5819 sbc tmp1 977D B792 5820 sta tmp1 5821 ; if rpm < 1100 & multi-mode enabled 5822 ; brclr multispark,feature4,NOT_MULTI 977F C6E042 5823 lda feature4_f ; this allow multi spark on/off 5824 ; while running 9782 A508 5825 bit #multisparkb 9784 270D 5826 beq NOT_MULTI 9786 B64D 5827 lda rpm 9788 C1E015 5828 cmp edisms_f 978B 2406 5829 bhs NOT_MULTI 5830 ; add on 2048us (@8MHz) 5831 ; the initial 2048us command may correct the 2% error as the EDIS 5832 ; module uses it to 5833 ; calibrate its own timer 978D B692 5834 lda tmp1 978F AB08 5835 add #$08 9791 B792 5836 sta tmp1 5837 NOT_MULTI: 9793 5592 5838 ldhx tmp1 9795 35F0 5839 sthx sawh ; save 16-bits in one instruction 5840 ; to avoid interruption 5841 5842 *************************************************************************** 5843 ** 5844 ** Check rev limiters 5845 ** 5846 *************************************************************************** 5847 CheckSoftLimit: 9797 1D62 5848 bclr LaunchOn,RevLimBits ; Clear the Soft Launch 5849 ; Rev Limit bit 9799 056626 5850 brclr LaunchControl,feature2,Magnus_revlimiters; Is Launch 5851 ; selected? 979C 060323 5852 brset Launch,portd,Magnus_revlimiters ; Button not pressed 5853 ; so reset variable bit 979F B647 5854 lda tps ; Is throttle in right place? 97A1 C1E029 5855 cmp LC_Throttle_f 97A4 251C 5856 blo Magnus_revlimiters ; No then no LC 97A6 0A6105 5857 brset lc_fs,SparkBits,csl_flat 97A9 C6E02B 5858 lda LC_Soft_Rpm_f ; Load in Launch soft limiter 97AC 2003 5859 bra csl_comp 5860 csl_flat: 97AE C6E08C 5861 lda LC_f_slim_f 5862 csl_comp: 97B1 270F 5863 beq Magnus_revlimiters ; If Zero no soft limit 97B3 B14D 5864 cmp rpm ; Is rpm higher than limit? 97B5 220B 5865 bhi Magnus_revlimiters ; No so no soft limit 97B7 B647 5866 lda tps ; Is tps higher than setting? 97B9 C1E029 5867 cmp LC_Throttle_f 97BC 2504 5868 blo Magnus_revlimiters ; No so no soft limit 97BE 1C62 5869 bset LaunchOn,RevLimBits ; Set soft Launch bit on 97C0 2022 5870 bra SRevLimOnDone ; Jump past rpm limit checks 5871 5872 Magnus_revlimiters: 97C2 C6E002 5873 lda SRevLimRPM 97C5 271D 5874 beq SRevLimOnDone ; skip if zero 97C7 B14D 5875 cmp rpm 97C9 250B 5876 blo SRevLimOn ; rpm higher than limit 97CB 2203 5877 bhi SRevLimOff ; rpm lower than limit 97CD 006206 5878 brset RevLimSoft,RevLimBits,SRevLimOn ; at limit check 5879 ; current status 5880 SRevLimOff: 97D0 1162 5881 bclr RevLimSoft,RevLimBits ; Clear soft limit bit 97D2 1362 5882 bclr RevLimHSoft,RevLimBits ; Clear soft limit fuel cut bit 97D4 200E 5883 bra SRevLimDone 5884 5885 SRevLimOn: 97D6 1062 5886 bset RevLimSoft,RevLimBits ; Set soft limit bit 5887 ; lda SRevLimCTime ; Set Cool down period 5888 ; sta SRevLimCoolLeft 97D8 B6C2 5889 lda SRevLimTimeLeft ; Check if time left = 5890 ; counting down 97DA 2608 5891 bne SRevLimOnDone 97DC 026205 5892 brset RevLimHSoft,RevLimBits,SRevLimOnDone ; Check if 5893 ; soft limit has cut fuel 97DF C6E004 5894 lda SRevLimHTime ; Set delay time for soft 5895 ; limit to cut fuel 97E2 B7C2 5896 sta SRevLimTimeLeft 5897 SRevLimOnDone: 5898 SRevLimDone: 5899 5900 *************************************************************************** 5901 ** 5902 ** Check outputs 5903 ** 5904 *************************************************************************** 5905 CheckOutputs: 97E4 8C 5906 clrh 97E5 006646 5907 brset BoostControl,feature2,Out1DoneJMP; If Boost control 5908 ; used then no output1 97E8 C6E008 5909 lda Out1Source 97EB A11F 5910 cmp #31T 97ED 2769 5911 beq TractOut1 97EF A105 5912 cmp #05T ; Are we using temperature? 97F1 2706 5913 beq IAT1Source 97F3 A106 5914 cmp #06T 97F5 2710 5915 beq CLT1Source 97F7 2037 5916 bra Not_Temps1 5917 IAT1Source: 97F9 C60104 5918 lda AirTemp 97FC B7D9 5919 sta tmp31 97FE C1E007 5920 cmp Out1Lim ; Check limit 9801 225A 5921 bhi Out1On ; Above limit, set output 9803 2777 5922 beq Out1Done ; Equal to limit skip out 9805 2039 5923 bra Hyster1 5924 CLT1Source: 9807 B6CA 5925 lda coolant 9809 B7D9 5926 sta tmp31 980B C1E007 5927 cmp Out1Lim ; Check limit 980E 224D 5928 bhi Out1On ; Above limit, set output 9810 276A 5929 beq Out1Done ; Equal to limit skip out 9812 202C 5930 bra Hyster1 5931 5932 ADCX6_In1: ; ADC Input on X6 9814 B65C 5933 lda o2_fpadc 9816 B7D9 5934 sta tmp31 9818 C1E007 5935 cmp Out1Lim 981B 2240 5936 bhi Out1On 981D 275D 5937 beq Out1Done 981F 201F 5938 bra Hyster1 5939 5940 ADCX7_In1: ; ADC Input on X7 9821 B65D 5941 lda egtadc 9823 B7D9 5942 sta tmp31 9825 C1E007 5943 cmp Out1Lim 9828 2233 5944 bhi Out1On 982A 2750 5945 beq Out1Done 982C 2012 5946 bra Hyster1 5947 5948 Out1DoneJMP: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 58 MC68HC908GP32 User Bootloader 982E 204C 5949 bra Out1Done 5950 Not_Temps1: 9830 CEE008 5951 ldx Out1Source ; Get source 9833 2747 5952 beq Out1Done ; No source = no check 9835 E640 5953 lda secl,x ; Get data 9837 B7D9 5954 sta tmp31 9839 C1E007 5955 cmp Out1Lim ; Check limit 983C 221F 5956 bhi Out1On ; Above limit, set output 983E 273C 5957 beq Out1Done ; Equal to limit skip out 5958 ; Hysterisis check 5959 Hyster1: 9840 03690A 5960 brclr Output1On,Enhancedbits2,Out1Off ; Is output 1 off? 5961 ; If so carry on as normal 9843 C6E007 5962 lda Out1Lim 9846 C0E07E 5963 sub Out1Hys_f ; Subtract Hysterisis for output1 5964 ; from Out1 limit 9849 B1D9 5965 cmp tmp31 ; Actual value 984B 232F 5966 bls Out1Done ; If actual value higher than 5967 ; Limit-Hysterisis then dont clear 5968 ; output 5969 5970 Out1Off: 984D 1369 5971 bclr Output1On,Enhancedbits2 ; Turn the output bit check off 984F C6E042 5972 lda feature4_f 9852 A502 5973 bit #InvertOutOneb 9854 2624 5974 bne out1_set 9856 2015 5975 bra out1_clr ; Below limit, clear output 5976 5977 ;Added for traction bit set output 5978 TractOut1: 9858 006916 5979 brset Traction,EnhancedBits2,No_Upper_Lim1 ; If traction 5980 ; Running set output 985B 20F0 5981 bra Out1Off 5982 5983 5984 Out1On: 985D C6E058 5985 lda Out1UpLim_f ; Upper limit. Creates a window 5986 ; for output to work in 9860 270F 5987 beq No_Upper_Lim1 ; If zero no limit 9862 E140 5988 cmp secl,x 9864 220B 5989 bhi No_Upper_Lim1 ; If higher than setpoint dont 5990 ; clear output 9866 C6E042 5991 lda feature4_f 9869 A502 5992 bit #InvertOutOneb 986B 260D 5993 bne out1_set 5994 out1_clr: 986D 1700 5995 bclr Output1,porta 986F 200B 5996 bra Out1Done 5997 5998 No_Upper_Lim1: 9871 1269 5999 bset Output1On,Enhancedbits2 ; Output on so set bit 9873 C6E042 6000 lda feature4_f 9876 A502 6001 bit #InvertOutOneb 9878 26F3 6002 bne out1_clr 6003 out1_set: 987A 1600 6004 bset Output1,porta ; Below limit, set output (Inverted) 6005 6006 Out1Done: 6007 987C C6E00A 6008 lda Out2Source 6009 987F A11F 6010 cmp #31T 9881 276D 6011 beq TractOut2 6012 9883 A105 6013 cmp #05T ; Are we using temperature? 9885 2706 6014 beq IAT2Source 9887 A106 6015 cmp #06T 9889 2710 6016 beq CLT2Source 988B 2035 6017 bra Not_Temps2 6018 IAT2Source: 988D C60104 6019 lda AirTemp 9890 B7D9 6020 sta tmp31 9892 C1E009 6021 cmp Out2Lim ; Check limit 9895 225E 6022 bhi Out2On ; Above limit, set output 9897 277B 6023 beq Out2Done ; Equal to limit skip out 9899 2037 6024 bra Hyster2 6025 CLT2Source: 989B B6CA 6026 lda coolant 989D B7D9 6027 sta tmp31 989F C1E009 6028 cmp Out2Lim ; Check limit 98A2 2251 6029 bhi Out2On ; Above limit, set output 98A4 276E 6030 beq Out2Done ; Equal to limit skip out 98A6 202A 6031 bra Hyster2 6032 6033 ADCX6_In2: ; ADC Input on X6 98A8 B65C 6034 lda o2_fpadc 98AA B7D9 6035 sta tmp31 98AC C1E009 6036 cmp Out2Lim 98AF 2244 6037 bhi Out2On 98B1 2761 6038 beq Out2Done 98B3 201D 6039 bra Hyster2 6040 6041 ADCX7_In2: 98B5 B65D 6042 lda egtadc 98B7 B7D9 6043 sta tmp31 98B9 C1E009 6044 cmp Out2Lim 98BC 2237 6045 bhi Out2On 98BE 2754 6046 beq Out2Done 98C0 2010 6047 bra Hyster2 6048 6049 Not_Temps2: 98C2 CEE00A 6050 ldx Out2Source ; Get source 98C5 274D 6051 beq Out2Done ; No source = no check 98C7 E640 6052 lda secl,x ; Get data 98C9 B7D9 6053 sta tmp31 98CB C1E009 6054 cmp Out2Lim ; Check limit 98CE 2225 6055 bhi Out2On ; Above limit, set output 98D0 2742 6056 beq Out2Done ; Equal to limit skip out 6057 ; Hysterisis check 6058 Hyster2: 98D2 05690A 6059 brclr Output2On,Enhancedbits2,Out2Off ; Is output 1 off? 6060 ; If so carry on as normal 98D5 C6E009 6061 lda Out2Lim 98D8 C0E07F 6062 sub Out2Hys_f ; Subtract Hysterisis for output1 6063 ; from Out1 limit 98DB B1D9 6064 cmp tmp31 ; Actual value 98DD 2335 6065 bls Out2Done ; If actual value higher than 6066 ; Limit-Hysterisis then dont 6067 ; clear output 6068 6069 Out2Off: 98DF 1569 6070 bclr Output2On,Enhancedbits2 ; Turn the output bit check off 98E1 C6E042 6071 lda feature4_f 98E4 A504 6072 bit #InvertOutTwob 98E6 2604 6073 bne Inv_Out2 ; Are we inverting output2? 98E8 1500 6074 bclr Output2,porta ; Below limit, clear output 98EA 2028 6075 bra Out2Done 6076 Inv_Out2: 98EC 1400 6077 bset Output2,porta ; Inverting output 98EE 2024 6078 bra Out2Done 6079 6080 TractOut2: 98F0 006916 6081 brset Traction,EnhancedBits2,No_Upper_Lim2 ; If traction 6082 ; Running set output 98F3 20EA 6083 bra Out2Off 6084 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 59 MC68HC908GP32 User Bootloader 6085 Out2On: 98F5 C6E059 6086 lda Out2UpLim_f ; Upper limit. Creates a window 6087 ; for output to work in 98F8 270F 6088 beq No_Upper_Lim2 ; If zero no limit 98FA E140 6089 cmp secl,x 98FC 220B 6090 bhi No_Upper_Lim2 ; If higher than setpoint dont 6091 ; clear output 98FE C6E042 6092 lda feature4_f 9901 A504 6093 bit #InvertOutTwob 9903 260D 6094 bne out2_set 6095 out2_clr: 9905 1500 6096 bclr Output2,porta ; Inverting output 9907 200B 6097 bra Out2Done 6098 6099 No_Upper_Lim2: 9909 1469 6100 bset Output2On,Enhancedbits2 ; Output on so set bit 990B C6E042 6101 lda feature4_f 990E A504 6102 bit #InvertOutTwob 9910 26F3 6103 bne out2_clr 6104 out2_set: 9912 1400 6105 bset Output2,porta ; Below limit, set output (Inverted) 6106 Out2Done: 6107 6108 ******************************************************************************* 6109 ** OUTPUT 3 Port D 0 (pin 15 top of R14) with delay off timer 6110 ******************************************************************************* 6111 9914 086674 6112 brset out3sparkd,feature2,out3done 9917 8C 6113 clrh 9918 C6E074 6114 lda feature8_f 991B A580 6115 bit #Out1_Out3b ; Are we in Out1+ mode? 991D 2703 6116 beq Norm_Out3_check 991F 07002F 6117 brclr Output1,porta,Out3Off ; If Output1 is off then 6118 ; don't do any checks for Out3 6119 6120 Norm_Out3_check: 9922 C6E084 6121 lda Out3Source_f 9925 A50F 6122 bit #$0f ; Only use 5 bits of this byte 9927 2762 6123 beq Out3Done ; No source = no check 6124 ; cmp #01T 6125 ; beq Tract_Output3 ; If source = 1 then traction to 6126 ; activate output 9929 A11F 6127 cmp #31T 992B 274D 6128 beq Tract_Output3 ; If source = 31 then traction to 6129 ; activate output 992D A102 6130 cmp #02 992F 274E 6131 beq DEC_Output3 ; If source = 2 then we are using 6132 ; decel to activate output 9931 A103 6133 cmp #03T 9933 274F 6134 beq ACEL_Output3 ; If source = 3 then we are using 6135 ; accel to activate output 9935 A105 6136 cmp #05T ; Are we using temperature? 9937 2725 6137 beq IAT3Source 9939 A106 6138 cmp #06T 993B 272D 6139 beq CLT3Source 993D A10A 6140 cmp #10T ; Are we looking at Out2? 993F 2734 6141 beq Out2_Out3 9941 A120 6142 cmp #32T 9943 2730 6143 beq Out2_Out3 9945 CEE084 6144 ldx Out3Source_f ; Get source 9948 E640 6145 lda secl,x ; Get data 994A C1E085 6146 cmp Out3Lim_f ; Check limit 994D 2238 6147 bhi Out3On ; Above limit, set output 994F 273A 6148 beq Out3Done ; Equal to limit skip out 6149 Out3Off: 9951 C6E086 6150 lda TimerOut3_f ; What time delay is set? 9954 2704 6151 beq No_Out3_Timer 9956 B1E2 6152 cmp Out3Timer 9958 2231 6153 bhi Out3Done 6154 6155 No_Out3_Timer: 995A 1103 6156 bclr Output3,portd ; Below limit, clear output 995C 202D 6157 bra Out3Done 6158 6159 IAT3Source: 995E C60104 6160 lda AirTemp 9961 C1E085 6161 cmp Out3Lim_f ; Check limit 9964 2221 6162 bhi Out3On ; Above limit, set output 9966 2723 6163 beq Out3Done ; Equal to limit skip out 9968 20E7 6164 bra Out3Off 6165 CLT3Source: 996A B6CA 6166 lda coolant 996C C1E085 6167 cmp Out3Lim_f ; Check limit 996F 2216 6168 bhi Out3On ; Above limit, set output 9971 2718 6169 beq Out3Done ; Equal to limit skip out 9973 20DC 6170 bra Out3Off 6171 6172 Out2_Out3: 9975 0500D9 6173 brclr Output2,porta,Out3Off ; If Output2 on then turn 6174 ; output3 on 9978 200D 6175 bra Out3On 6176 6177 Tract_Output3: 997A 0169D4 6178 brclr Traction,EnhancedBits2,Out3Off ; If traction Running 6179 ; set output 997D 2008 6180 bra Out3On 6181 6182 DEC_Output3: 997F 0B42CF 6183 brclr TPSDEN,ENGINE,Out3Off ; If Decel output off 9982 2003 6184 bra Out3On 6185 6186 ACEL_Output3: 9984 0942CA 6187 brclr TPSAEN,ENGINE,Out3Off ; If Accel output off 6188 6189 Out3On: 9987 3FE2 6190 clr Out3Timer 9989 1003 6191 bset Output3,portd ; Set output 6192 6193 Out3Done: 6194 6195 6196 ***************************************************************************** 6197 ** OUTPUT 4 6198 ******************************************************************************* 6199 ; OUTPUT 4 LED 18 can be used as a standard output or as a fan control 6200 ; for those using WATER INJECTION on X2 6201 998B 046458 6202 brset REUSE_LED18,outputpins,Out4Done ; being used as IRQ 6203 ; or COIL C 998E 076455 6204 brclr REUSE_LED18_2,outputpins,Out4Done ; Are we re 6205 ; using LED18 as output4? 9991 0C6452 6206 brset LED18_FAN,outputpins,Out4Done ; Are we using it 6207 ;as fan control? 9994 8C 6208 clrh 9995 C6E08A 6209 lda Out4Source_f 9998 A50F 6210 bit #$0f ; Only use 5 bits of this byte 999A 274A 6211 beq Out4Done ; No source = no check 6212 ; cmp #01T 6213 ; beq Tract_Output4 ; If source = 1 then traction to 6214 ; activate output 999C A11F 6215 cmp #31T 999E 2737 6216 beq Tract_Output4 ; If source = 31 then traction to 6217 ; activate output 99A0 A102 6218 cmp #02T 99A2 2738 6219 beq DEC_Output4 ; If source = 2 then we are using 6220 ; decel to activate output msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 60 MC68HC908GP32 User Bootloader 99A4 A103 6221 cmp #03T 99A6 2739 6222 beq ACEL_Output4 ; If source = 3 then we are using 6223 ; accel to activate output 99A8 A105 6224 cmp #05T ; Are we using temperature? 99AA 2714 6225 beq IAT4Source 99AC A106 6226 cmp #06T 99AE 271C 6227 beq CLT4Source 99B0 CEE08A 6228 ldx Out4Source_f ; Get source 99B3 E640 6229 lda secl,x ; Get data 99B5 C1E08B 6230 cmp Out4Lim_f ; Check limit 99B8 222A 6231 bhi Out4On ; Above limit, set output 99BA 272A 6232 beq Out4Done ; Equal to limit skip out 6233 Out4Off: 99BC 1502 6234 bclr wled,portc ; Below limit, clear output 99BE 2026 6235 bra Out4Done 6236 6237 IAT4Source: 99C0 C60104 6238 lda AirTemp 99C3 C1E08B 6239 cmp Out4Lim_f ; Check limit 99C6 221C 6240 bhi Out4On ; Above limit, set output 99C8 271C 6241 beq Out4Done ; Equal to limit skip out 99CA 20F0 6242 bra Out4Off 6243 CLT4Source: 99CC B6CA 6244 lda coolant 99CE C1E08B 6245 cmp Out4Lim_f ; Check limit 99D1 2211 6246 bhi Out4On ; Above limit, set output 99D3 2711 6247 beq Out4Done ; Equal to limit skip out 99D5 20E5 6248 bra Out4Off 6249 6250 Tract_Output4: 99D7 0169E2 6251 brclr Traction,EnhancedBits2,Out4Off ; If traction Running 6252 ; set output 99DA 2008 6253 bra Out4On 6254 6255 DEC_Output4: 99DC 0B42DD 6256 brclr TPSDEN,ENGINE,Out4Off ; If Decel output off 99DF 2003 6257 bra Out4On 6258 6259 ACEL_Output4: 99E1 0942D8 6260 brclr TPSAEN,ENGINE,Out4Off ; If Accel output off 6261 6262 Out4On: 99E4 1402 6263 bset wled,portc ; Set output 6264 6265 Out4Done: 6266 6267 *************************************************************************** 6268 ** 6269 ** Fan Control - added separate off-temp - from RPE 6270 ** Can use X2 and or LED18 6271 ** 6272 *************************************************************************** 99E6 0A640B 6273 brset X2_FAN,outputpins,DO_FAN_Check ; Are we using X2 as fan 6274 ; control? 99E9 046406 6275 brset REUSE_LED18,outputpins,fan_exit 99EC 076403 6276 brclr REUSE_LED18_2,outputpins,fan_exit 99EF 0C6402 6277 brset LED18_FAN,outputpins,DO_FAN_Check ; Are we using LED18 6278 ; as fan control? 6279 fan_exit: 99F2 2027 6280 bra FAN_DONE ; Nope, so return 6281 6282 DO_FAN_Check: 99F4 02420E 6283 brset crank,engine,FAN_OFF 99F7 B6CA 6284 lda coolant 99F9 C1E04A 6285 cmp EfanOnTemp_f 99FC 2213 6286 bhi FAN_ON 99FE C1E04B 6287 cmp EfanOffTemp_f 9A01 2502 6288 blo FAN_OFF 9A03 2016 6289 bra FAN_DONE 6290 6291 FAN_OFF: 9A05 0B6402 6292 brclr X2_FAN,outputpins,No_FAN_Porta ; Are we using X2? 9A08 1B00 6293 bclr water,porta ; sharing X2 with water inj output 6294 No_FAN_Porta: 9A0A 0D640E 6295 brclr LED18_FAN,outputpins,FAN_DONE ; Are we using LED18? 9A0D 1502 6296 bclr wled,portc 9A0F 200A 6297 bra FAN_DONE 6298 FAN_ON: 9A11 0B6402 6299 brclr X2_FAN,outputpins,No_FANOn_Porta ; Are we using X2? 9A14 1A00 6300 bset water,porta ; sharing X2 with water inj output 6301 No_FANOn_Porta: 9A16 0D6402 6302 brclr LED18_FAN,outputpins,FAN_DONE ; Are we using LED18? 9A19 1402 6303 bset wled,portc 6304 6305 FAN_DONE: 6306 6307 6308 ******************************************************************************* 6309 ** 6310 ** Over run fuel cut system (P Ringwood) 6311 ** 6312 ******************************************************************************* 6313 Over_Run: 9A1B C6E042 6314 lda feature4_f 9A1E A540 6315 bit #OverRunOnb 9A20 2741 6316 beq Over_Run_Done 6317 6318 No_Over_Run: 9A22 C6E87F 6319 lda ALS_CONFIG ; If we are using ALS, allow overrun only when the switch is off 9A25 A501 6320 bit #%00000001 ; If Anti lag disabled, let's not mess with 9A27 2703 6321 beq norm_OverRun ; the bit borrowed from overrun fuel cut. 9A29 070237 6322 brclr ALSIn,portc,Over_Run_Done 6323 norm_overrun: 9A2C C60110 6324 lda engineLoad ; was kpa 9A2F C1E048 6325 cmp ORunKpa_f ; Is the KPa lower than the set point? 9A32 222B 6326 bhi No_OverRun ; No so no over run 9A34 B64D 6327 lda rpm 9A36 C1E047 6328 cmp ORunRpm_f ; Is the rpm higher than the setpoint? 9A39 2524 6329 blo No_OverRun ; No so no Over run 9A3B B647 6330 lda tps 9A3D C1E049 6331 cmp ORunTPS_f ; Is the TPS below the setpoint? 9A40 221D 6332 bhi No_OverRun ; No so no over run 9A42 B6CA 6333 lda coolant 9A44 C1E0B6 6334 cmp OverRunClt_f1 ; Is the coolant temp high enough? 9A47 2516 6335 blo No_OverRun 9A49 0A6906 6336 brset over_Run_Set,EnhancedBits2,No_OverRun_Reset 9A4C 1A69 6337 bset over_Run_Set,EnhancedBits2 9A4E A600 6338 lda #00T 9A50 B7D4 6339 sta OverRunTime ; Reset the over run timer once 6340 ; per over run 6341 6342 No_OverRun_Reset: 9A52 B6D4 6343 lda OverRunTime 9A54 C1E082 6344 cmp OverRunT_f 9A57 2402 6345 bhs Do_OverRun 9A59 2006 6346 bra Over_Run_T 6347 6348 Do_OverRun: 9A5B 1468 6349 bset OverRun,EnhancedBits ; Set Over Run Fuel Cut 9A5D 2004 6350 bra Over_Run_Done 6351 No_OverRun: 9A5F 1B69 6352 bclr over_Run_Set,EnhancedBits2 ; Clear the over run timer clear bit 6353 Over_Run_T: 9A61 1568 6354 bclr OverRun,EnhancedBits ; Clear the over run fuel cut 6355 6356 Over_Run_Done: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 61 MC68HC908GP32 User Bootloader 6357 6358 ***************************************************************************** 6359 ** Water Injection section 6360 ** 6361 ** Turn 1st water output (X2) on if MAP and RPM and IAT higher than 6362 ** Water set point 6363 ** 6364 ** Pulse water2 output (X3) at same rate as Fuel Injector #2. 6365 ** 6366 *************************************************************************** 9A63 C6E02E 6367 lda feature3_f 9A66 A508 6368 bit #WaterInjb 9A68 2729 6369 beq Water_Inj_Done 6370 6371 Water_Injection: ; we only get here if water 6372 ; inj is enabled 9A6A 0A0008 6373 brset water,porta,ignore_iat;If water on then dont check 6374 ; IAT again 6375 9A6D C6E03D 6376 lda iatpoint_f ; Load Inlet air temp setpoint 9A70 C10104 6377 cmp airTemp ; Is it higher than actual iat? 9A73 221C 6378 bhi definatlyno_water 6379 6380 6381 ignore_iat: 9A75 C6E03E 6382 lda wateripoint_f ; Load water injection point 9A78 C10110 6383 cmp engineLoad ; Is it lower than the actual kpa? 9A7B 2509 6384 blo water_on ; If so turn water pump on 9A7D 2012 6385 bra definatlyno_water ; If not then no water 6386 9A7F B64D 6387 lda rpm 9A81 C1E03F 6388 cmp wateriRpm_f ; Is the engine above the min rpm? 9A84 250B 6389 blo definatlyno_water 6390 6391 water_on: 9A86 B64D 6392 lda rpm 9A88 C1E03F 6393 cmp wateriRpm_f ; Are we actually above the rpm Minimum? 9A8B 2504 6394 blo definatlyno_water 9A8D 1A00 6395 bset water,porta ;Turn water pump on 9A8F 2002 6396 bra Water_Inj_Done 6397 6398 definatlyno_water: 6399 9A91 1B00 6400 bclr water,porta ;Turn off water pump 6401 Water_Inj_Done: 6402 6403 ***************************************************************************** 6404 ** 6405 ** Coolant Related Ignition Advance (P Ringwood) 6406 ** Add Advance of 1 deg per user defined amount of coolant temp below setpoint 6407 ** 6408 ***************************************************************************** 6409 *************************************************************************** 6410 ** DeadBand: If we are within 5 degrees above of coolant setpoint then 6411 ** ensure we turn advance setting to zero. This is incase temp jumps up 6412 ** for some reason and leaves advance set. 6413 ** 6414 ** I have no idea if this could happen but I put it in just incase. 6415 ***************************************************************************** 9A93 C6E02E 6416 lda feature3_f 9A96 A504 6417 bit #CltIatIgnitionb 9A98 274A 6418 beq retard_endJmp 6419 6420 IatClt_Related: 6421 9A9A 8C 6422 clrh 9A9B C6E02F 6423 lda cltAdvance_f ; Load Coolant temperature setpoint 9A9E 2747 6424 beq Advance_end ; If zero no Advance 9AA0 AB05 6425 add #05T ; Add 5 to the clt temp 9AA2 B1CA 6426 cmp coolant ; Are we within 5 degrees F of 6427 ; setpoint for clt advance? 9AA4 2541 6428 blo Advance_end ; 9AA6 B6CA 6429 lda coolant ; 9AA8 C1E02F 6430 cmp cltAdvance_f ; Is the clt under the setpoint? 9AAB 2507 6431 blo carryOn_Advance ; If so carry on with advance 9AAD A600 6432 lda #$00 9AAF B75E 6433 sta CltIatAngle ; If not then it's in dead band 6434 ; so clear trimAngle 9AB1 CC9B29 6435 jmp retard_end ; Don't do any Advance / Retard 6436 ; till out of deadband 6437 6438 * End of dead band 6439 ********************************************************************** 6440 6441 carryOn_Advance: 6442 9AB4 C6E030 6443 lda cltDeg_f ; load the temp per 1 deg of Advance. 9AB7 272E 6444 beq Advance_end ; If zero no Advance 9AB9 44 6445 lsra ; Shift bit pattern to the right 6446 ; (Divide by 2) 9ABA 2401 6447 bcc nota_carry ; Check if carry bit clear, skip 6448 ; increment 9ABC 4C 6449 inca ; otherwise, increment accumulator 6450 nota_carry: 9ABD B7D9 6451 sta tmp31 ; Stores half the cltDeg (used for 6452 ; checking division) 9ABF C6E02F 6453 lda cltAdvance_f ; Load into the accumulator the top 6454 ; temperature limit 9AC2 B0CA 6455 sub coolant ; How much cooler are we? 9AC4 8C 6456 clrh ; Zero out high 8 bits of 16-bit 6457 ; H:X register 6458 ; Accumulator contains low 8 bits 9AC5 CEE030 6459 ldx cltDeg_f ; Set divisor 9AC8 52 6460 div ; (H:A) /X -> A, with rem in H 6461 9AC9 97 6462 tax ; Move quotient to index register 9ACA 8B 6463 pshh ; Transfer remainder to accumulator 9ACB 86 6464 pula 9ACC B1D9 6465 cmp tmp31 ; See if the remainder is more than 6466 ; half of divisor 9ACE 2501 6467 blo roundedAdvance 9AD0 5C 6468 incx ; It was a big remainder, round up. 6469 6470 roundedAdvance: 9AD1 A603 6471 lda #3T ; 1 degree 9AD3 42 6472 mul ; X * A -> (X:A) 9AD4 A300 6473 cpx #0T ; See if we overflowed, i.e., X != 0 9AD6 2702 6474 beq maxAdvanceTrim ; No, so see if we are at max angle 9AD8 A6FF 6475 lda #255T ; Overflow value 6476 6477 maxAdvanceTrim: 9ADA C1E031 6478 cmp maxAdvAng_f ; Is it above the max allowed advance? 9ADD 2503 6479 blo store_Advance ; No, store the advance 9ADF C6E031 6480 lda maxAdvAng_f ; Yes, load the max Advance allowed 6481 6482 store_Advance: 9AE2 B75E 6483 sta CltIatAngle ; Store the advance 6484 6485 retard_endJmp: 6486 9AE4 CC9B29 6487 jmp retard_end ; If Coolant advance running dont 6488 ; check IAT retard 6489 6490 Advance_end: 6491 6492 ***************************************************************************** msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 62 MC68HC908GP32 User Bootloader 6493 ** 6494 ** Add Retard of 1 deg per user defined amount of IAT when IAT and 6495 ** boost above setpoints 6496 ** 6497 ***************************************************************************** 6498 9AE7 C6E032 6499 lda iatDeg_f ; load the temp per 1 deg of retard. 9AEA 273D 6500 beq noRetard ; If zero then no Retard 9AEC 44 6501 lsra ; Shift bit pattern to the right 6502 ; (Divide by 2) 9AED 2401 6503 bcc no_carry ; Check if carry bit clear, skip 6504 ; increment 9AEF 4C 6505 inca ; otherwise, increment accumulator 6506 6507 no_carry: 9AF0 B7DA 6508 sta tmp32 ; Stores half the iatDeg 6509 9AF2 B6C9 6510 lda kpa 9AF4 C1E033 6511 cmp kpaRetard_f ; Setpoint of KPa for retard 9AF7 252C 6512 blo clr_Retard ; If not reached make sure we 6513 ; clear the retard angle 6514 9AF9 C60104 6515 lda airTemp ; Actual IAT Temp 9AFC C1E034 6516 cmp iatDanger_f ; Setpoint for start of retard 9AFF 2524 6517 blo clr_Retard ; If not reached make sure we 6518 ; clear the retard angle 6519 9B01 C0E034 6520 sub iatDanger_f ; How much higher are we? Leaves 6521 ; difference in accumulator 9B04 8C 6522 clrh ; Zero out high 8 bits of 16-bit 6523 ; H:X register 6524 ; Accumulator contains low 8 bits 9B05 CEE032 6525 ldx iatDeg_f ; Set divisor 9B08 52 6526 div ; (H:A) /X -> A, with rem in H 6527 9B09 97 6528 tax ; Move quotient to index register 9B0A 8B 6529 pshh ; Transfer remainder to accumulator 9B0B 86 6530 pula 9B0C B1DA 6531 cmp tmp32 ; See if the remainder is more than 6532 ; half of divisor 9B0E 2501 6533 blo roundedRetard 9B10 5C 6534 incx ; It was a big remainder, round up. 6535 6536 roundedRetard: 9B11 A603 6537 lda #3T ; 1 degree 9B13 42 6538 mul ; X * A -> (X:A) 6539 9B14 B7D9 6540 sta tmp31 ; Store angle to retard, its an 6541 ; advance angle at the moment 9B16 A6FF 6542 lda #255T ; 9B18 B0D9 6543 sub tmp31 ; (255-angle to retard) turns it 6544 ; into a retard angle 6545 9B1A A300 6546 cpx #0T ; See if we overflowed, i.e., X != 0 9B1C 2702 6547 beq storeRetardedTrim 9B1E A6FF 6548 lda #255T ; Overflow value 6549 6550 storeRetardedTrim: 9B20 B75E 6551 sta CltIatAngle ; 9B22 CC9B29 6552 jmp retard_end ; finished retard 6553 6554 clr_Retard: 9B25 A600 6555 lda #$00 9B27 B75E 6556 sta CltIatAngle ; Sets trim angle back to zero when 6557 ; no setpoints met 6558 noRetard: 6559 retard_end: 6560 6561 6562 *************************************************************************** 6563 ** 6564 ** Idle Speed Adjustment 6565 ** 6566 ** Ubipa's idle control algorithm with KeithG front end logic and such. 6567 ** 6568 ** idleOn = adjustment algorithm is running. If it is not, then 6569 ** idleLastDC will not be changed. 6570 ** 6571 ** if cranking 6572 ** idleDC = icrankdc 6573 ** idleLastDC = icrankdc 6574 ** 6575 ** Active Dashpot 6576 ** small amount added to last idle DC value recorded 6577 ** 6578 ** Through the closed loop warmup, activation tracks idle speed because it 6579 ** is 'rpms above idle' not a fixed value. 6580 ** 6581 ** JSM added warmup PWM setting. Can choose open loop or closed loop. 6582 ** This is designed to work like a variable version of B&G 6583 ** Can set duty cycle at lower temp. Interpolates to zero at upper temp, where 6584 ** rpm targets take over. 6585 ** If rpm targets are set to zero then valve shut about upper temp. 6586 *************************************************************************** 9B29 006476 6587 brset REUSE_FIDLE,outputpins,idle_DoneJMP1 6588 6589 IdleAdjust: 6590 ; brset PWMidle,feature2,idlePWM 9B2C C6E810 6591 lda feature13_f 9B2F A501 6592 bit #pwmidleb 9B31 2612 6593 bne idlePWM 6594 6595 ;-- Toggle Mode ---------------------------------------------------------------- 6596 6597 idleToggle: 9B33 B6CA 6598 lda coolant 9B35 C1E1BA 6599 cmp fastIdleBG_f ; use original B&G on/off temp 9B38 2305 6600 bls idleFast ; Shouldn't there be some hysteresis 6601 ; here? On the other hand, the 6602 ; temp should never hover around 6603 ; here, so why bother? 6604 idleSlow: 9B3A 3F57 6605 clr idleDC ; Fully closed. 9B3C CC9CF4 6606 jmp idle_Done 6607 6608 idleFast: 9B3F 6EFF57 6609 mov #255T,idleDC ; Wide open. 9B42 CC9CF4 6610 jmp idle_Done 6611 6612 ;-- PWM Mode ------------------------------------------------------------------- 6613 6614 idlePWM: 9B45 0E6D5D 6615 brset istartbit,EnhancedBits6,Crank_PWM ; loop to stabilize on startup 9B48 02425A 6616 brset crank,engine,Crank_PWM ; open AIC for cranking 9B4B 014254 6617 brclr running,engine,Idle_doneJMP1 ; no PWM adjust when not running 6618 6619 ; ALS open valve appropriately when ALS selected and active kg 9B4E C6E87F 6620 lda ALS_CONFIG ; if no ALS bit, then off 9B51 A501 6621 bit #%00000001 9B53 270F 6622 beq No_ALS_PWM ; if no ALS PWM bit, then off 9B55 A504 6623 bit #%00000100 9B57 270B 6624 beq No_ALS_PWM 6625 ; brset ALSIn,portc,No_ALS_PWM ; if pin is not pulled low, then off 9B59 0B6908 6626 brclr over_Run_Set,EnhancedBits2,No_ALS_PWM 9B5C C6E880 6627 lda ALS_DC ; otherwise plug in the default PWM value 9B5F B757 6628 sta idleDC msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 63 MC68HC908GP32 User Bootloader 9B61 CC9CF4 6629 jmp idle_Done 6630 No_ALS_PWM 6631 ; end ALS idle 6632 6633 ; brset crank,engine,jeskipAdjust ; Don't adjust idle during cranking 9B64 C6E810 6634 lda feature13_f 9B67 A502 6635 bit #idle_warmupb 9B69 270E 6636 beq idle_closedloop_jmp 6637 ; bra idle_closedloop ;?? this prevents open loop from working 6638 6639 ; Warmup PWM 6640 idle_openloop: 9B6B B6CA 6641 lda coolant 9B6D C1E812 6642 cmp slowIdleTemp_f 9B70 2510 6643 blo idle_loopcold 9B72 C6E810 6644 lda feature13_f ; If we are not using closed loop then clear DC 9B75 A504 6645 bit #idle_clb 9B77 2702 6646 beq clrNskip 6647 idle_closedloop_jmp 9B79 206E 6648 bra idle_closedloop 6649 6650 clrNskip: 9B7B C6E806 6651 lda idle_dc_hi ; Store hot DC in Idle DC 9B7E B757 6652 sta idleDC ; Added for setting idle DC as if ignition turned 9B80 2020 6653 bra idle_DoneJMP1 ; on when engine hot 6654 6655 idle_loopcold: 6656 ; determine duty cycle by linear interpolation 9B82 C6E811 6657 lda fastIdletemp_f 9B85 B792 6658 sta liX1 9B87 C6E812 6659 lda slowIdleTemp_f 9B8A B793 6660 sta liX2 9B8C C6E800 6661 lda idle_dc_lo 9B8F B794 6662 sta liY1 9B91 C6E806 6663 lda idle_dc_hi 9B94 B795 6664 sta liy2 ; rmd upper duty limit 9B96 B6CA 6665 lda coolant 9B98 B796 6666 sta liX 9B9A CDD51E 6667 jsr lininterp 9B9D 4E9757 6668 mov liY,idleDC 9BA0 2047 6669 bra idle_closedloop 6670 6671 Idle_doneJMP1: 9BA2 CC9CF4 6672 jmp Idle_done 6673 6674 Crank_PWM: 9BA5 0E6D1C 6675 brset istartbit,EnhancedBits6,start_delay 9BA8 C6E811 6676 lda fastIdletemp_f ; interpolate delay to 0 at 9BAB B792 6677 sta tmp1 ; slow idle temp 9BAD C6E812 6678 lda slowIdleTemp_f 9BB0 B793 6679 sta tmp2 9BB2 C6E80C 6680 lda idlestartclk_f 9BB5 B794 6681 sta tmp3 9BB7 3F95 6682 clr tmp4 9BB9 4ECA96 6683 mov coolant,tmp5 9BBC CDD51E 6684 jsr lininterp 6685 ; mov tmp6,idleDelayClock 9BBF B697 6686 lda tmp6 9BC1 C7010F 6687 sta idleDelayClock 6688 start_delay: 9BC4 C6E802 6689 lda idlecrankdc_f 9BC7 B757 6690 sta idleDC 9BC9 B7CB 6691 sta idlelastdc 9BCB 1E6D 6692 bset istartbit,EnhancedBits6 ; let em know we are starting... 9BCD C6010F 6693 lda idledelayClock ; Make sure we settle here for a bit 9BD0 26D0 6694 bne idle_doneJMP1 ; clear the bit after the wait time 9BD2 1F6D 6695 bclr istartbit,EnhancedBits6 ; we are no longer starting 9BD4 1E42 6696 bset idleon,engine ; we want to idle down 9BD6 1C6D 6697 bset idashbit,EnhancedBits6 ; we want to bypass the rpm test for a bit 9BD8 C6E80C 6698 lda idlestartclk_f ; load start delay clock again 9BDB C1E803 6699 cmp idleDelayClock_f 9BDE 2203 6700 bhi longer_delay 9BE0 C6E803 6701 lda idleDelayClock_f 6702 longer_delay: 9BE3 C7010F 6703 sta idleDelayClock ; to allow for the decay time 6704 6705 Idle_doneJMP2: 9BE6 CC9CF4 6706 jmp Idle_done 6707 6708 idle_closedloop: 6709 ; brclr idle_cl,feature7,Idle_doneJMP1 9BE9 C6E810 6710 lda feature13_f 9BEC A504 6711 bit #idle_clb 9BEE 27B2 6712 beq idle_DoneJMP1 9BF0 B647 6713 lda tps 9BF2 C1E815 6714 cmp IdleThresh_f ; compare tps with treshold 9BF5 2234 6715 bhi close_AIC ; tps based closure 6716 6717 IDLE_RPM: ; Ubipa's idle regulation code 9BF7 A618 6718 lda #24T 9BF9 B14D 6719 cmp rpm ; now check rpms 9BFB 2525 6720 blo revs_over ; make sure rpms below are < 2400 rpm 9BFD 3F92 6721 clr intacc1 ; routine to determine 8 bit RPM value x10 9BFF 3F93 6722 clr intacc1+1 9C01 556E 6723 ldhx rpmph 9C03 3596 6724 sthx intacc2 9C05 A60A 6725 lda #10T 9C07 CEE19D 6726 ldx rpmk_f1+1 ; LSB of multiplicand. 9C0A 42 6727 mul 9C0B B795 6728 sta intacc1+3 ; LSB of result stored. 9C0D BF94 6729 stx intacc1+2 ; Carry on stack. 9C0F A60A 6730 lda #10T 9C11 CEE19C 6731 ldx rpmk_f1 ; MSB of multiplicand. 9C14 42 6732 mul 9C15 BB94 6733 add intacc1+2 ; Add in carry from LSB. 9C17 B794 6734 sta intacc1+2 ; MSB of result. 9C19 CDD59B 6735 jsr udvd32 ; 32 / 16 divide tmp1 thru tmp11 used... 9C1C B695 6736 lda intacc1+3 ; get 8-bit RPM result 9C1E B7A0 6737 sta tmp15 ; of current RPM x10 9C20 2038 6738 bra IDLE_SPEED 6739 6740 revs_over: ; ensure that revs do not overflow 9C22 A6F0 6741 lda #240T ; set at 2400 rpm 9C24 B7A0 6742 sta tmp15 9C26 2032 6743 bra IDLE_SPEED 6744 6745 close_AIC_rpm: 9C28 0C6D5A 6746 brset idashbit,EnhancedBits6,rpm_delay ; but not if dashpot is set 6747 close_AIC: 9C2B 1D6D 6748 bclr idashbit,EnhancedBits6 ; turn off dashpot bit 9C2D 1F42 6749 bclr idleon,engine ; turn off idle bit 9C2F B6CF 6750 lda idleCtlClock ; step close the AIC 9C31 C1E80A 6751 cmp Idashdelay_f ; with this many 1/10 sec between steps 9C34 25B0 6752 blo Idle_doneJMP2 9C36 3FCF 6753 clr idleCtlClock 9C38 B657 6754 lda idleDC 9C3A C1E80F 6755 cmp idleclosedc_f 9C3D 23A7 6756 bls Idle_doneJMP2 9C3F 4A 6757 deca 9C40 B757 6758 sta idleDC 9C42 20A2 6759 bra Idle_doneJMP2 6760 6761 idash: ; simplified dashpot 9C44 0C6D9F 6762 brset idashbit,EnhancedBits6,idle_doneJMP2 9C47 1E42 6763 bset idleon,engine 9C49 1C6D 6764 bset idashbit,EnhancedBits6 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 64 MC68HC908GP32 User Bootloader 9C4B C6E804 6765 lda idledashdc_f ; take lastidleDC 9C4E BBCB 6766 add idlelastdc ; add dashDC 9C50 B757 6767 sta idleDC 9C52 C6E803 6768 lda IdleDelayClock_f ; start delay clock 9C55 C7010F 6769 sta idleDelayClock 9C58 2042 6770 bra idle_doneJMP 6771 6772 IDLE_SPEED: ; Determine idle speed target 6773 ; lda slowIdle_f ; based on coolant temp and targets 6774 ; cmp idleTarget 6775 ; beq RPM_TEST 9C5A C6E811 6776 lda fastIdletemp_f 9C5D B792 6777 sta tmp1 9C5F C6E812 6778 lda slowIdleTemp_f 9C62 B793 6779 sta tmp2 9C64 C6E813 6780 lda fastIdle_f 9C67 B794 6781 sta tmp3 9C69 C6E814 6782 lda slowIdle_f 9C6C B795 6783 sta tmp4 9C6E 4ECA96 6784 mov coolant,tmp5 9C71 CDD51E 6785 jsr lininterp 9C74 4E97A1 6786 mov tmp6,tmp16 6787 6788 RPM_TEST: 9C77 B6A1 6789 lda tmp16 9C79 CBE80E 6790 add irestorerpm_f ; tests to determine what to do based on RPM 9C7C B1A0 6791 cmp tmp15 ; now check rpms 9C7E 25A8 6792 blo close_AIC_rpm ; close it above RPM threshold 9C80 0C6D02 6793 brset idashbit,EnhancedBits6,rpm_delay ; always go here when dashbit is set 9C83 2007 6794 bra idleDC_test 6795 6796 rpm_delay: 9C85 C6010F 6797 lda idleDelayClock ; Make sure we settle below the thresh before we 9C88 2602 6798 bne IdleDC_test ; clear the bit after the wait time 9C8A 1D6D 6799 bclr idashbit,EnhancedBits6 ; clear the dashbit after delay 6800 6801 idleDC_test: ; make sure that idleDC is reasonable and not closed 9C8C 0F42B5 6802 brclr idleon,engine,idash ; dashpot if idleon is not set 9C8F C6E805 6803 lda idlemindc_f 9C92 B157 6804 cmp idleDC 9C94 2308 6805 bls IDLE_LOOP 9C96 B6CB 6806 lda idlelastdc ; do not let idleDC drop below min for routine 9C98 B757 6807 sta idleDC ; we want to idle, calc rpm and target 9C9A 2002 6808 bra IDLE_LOOP 6809 6810 Idle_doneJMP: 9C9C 2056 6811 bra idle_done 6812 6813 IDLE_LOOP: ; delay time is proportional to deviance 9C9E C6E808 6814 lda ictlrpm2_f ; from target 9CA1 B792 6815 sta tmp1 ; upper limit of rpm deviance 9CA3 C6E807 6816 lda ictlrpm1_f 9CA6 B793 6817 sta tmp2 ; lower limit of rpm deviance 9CA8 C6E801 6818 lda idleperiod_f 9CAB B794 6819 sta tmp3 ; faster idlectl, lower # 9CAD C6E80D 6820 lda idleperiod2_f 9CB0 B795 6821 sta tmp4 ; slower idlectl, higher # 9CB2 B6A0 6822 lda tmp15 9CB4 B0A1 6823 sub tmp16 9CB6 B796 6824 sta tmp5 9CB8 2403 6825 bcc Ctl_speed 9CBA 40 6826 nega 9CBB B796 6827 sta tmp5 6828 ; rol tmp1 ; comment per KG ; SPEED THIS UP by halving the high rpm 6829 Ctl_speed: 9CBD CDD51E 6830 jsr lininterp 9CC0 B697 6831 lda tmp6 9CC2 B1CF 6832 cmp idleCtlClock 9CC4 222E 6833 bhi Idle_done 9CC6 B6A1 6834 lda tmp16 9CC8 CBE809 6835 add Ideadbnd_f ; add tol. e.g. 850+2=870rpm 9CCB B1A0 6836 cmp tmp15 ; compare with idle rpm 9CCD 2517 6837 blo idle_dec ; if lower the outside range so adjust 9CCF B6A1 6838 lda tmp16 9CD1 C0E809 6839 sub Ideadbnd_f ; subtract 870-4=830rpm 9CD4 B1A0 6840 cmp tmp15 9CD6 2202 6841 bhi idle_inc 9CD8 201A 6842 bra Idle_done ; idle is ok so exit 6843 6844 IDLE_INC: ; idle rpm is too low increase duty cycle 9CDA B657 6845 lda idledc 9CDC C1E80B 6846 cmp idlefreq_f ;these lines to accomodate freqs other than 100 9CDF 2713 6847 beq Idle_done 9CE1 4C 6848 inca 9CE2 B757 6849 sta idledc 9CE4 200A 6850 bra IDLE_SAVE 6851 6852 IDLE_DEC: ; idle rpm is too high decrease duty cycle 9CE6 B657 6853 lda idledc 9CE8 C1E805 6854 cmp idlemindc_f 9CEB 2707 6855 beq idle_done ; lower duty cycle limit 9CED 4A 6856 deca 9CEE B757 6857 sta idledc 6858 6859 IDLE_SAVE: 9CF0 3FCF 6860 clr idleCtlClock ; clear delay counter 9CF2 B7CB 6861 sta idleLastDC ; Save the last active idle dutycycle 6862 6863 Idle_done: 6864 6865 ****************************************************************************** 6866 ** K n o c k D e t e c t i o n S y s t e m P Ringwood ** 6867 ** 6868 ** This receives an input in from the JP1 header, if its low it sees 6869 ** it as a knock. 6870 ** Basic functionality: 6871 ** Are we below the max rpm allowed? 6872 ** Yes- carry on with detection, 6873 ** No- reset all and end knock detection. 6874 ** Knock on input, retard ignition by the 1st retard value 6875 ** (KnockRetard1), start timer 6876 ** wait for timer to time out (KnockTimLft) 6877 ** Is it still knocking? 6878 ** Yes- then add knockretard2 value to total retard. 6879 ** No- then advance by KnockAdv amount. 6880 ** Is the total retard less than 1 degree? 6881 ** Yes- reset all knock settings, goto start. 6882 ** No- so carry on with timer 6883 ** Check for knock. If knocking add retard2 restart timer - if not 6884 ** Wait for timer to time out before adding advance. 6885 ** Is it still knocking? 6886 ** Yes- then add knockretard2 value to total retard, restart timer. 6887 ** No- then advance by KnockAdv amount, restart timer. 6888 ** Is the total retard less than 1 degree? 6889 ** Yes- reset all knock settings, goto start. 6890 ** No- so carry on with timer 6891 ** When timer timed out check for knock? If knocking add knockRetard2, 6892 ** if not advance 6893 ** etc, etc, 6894 ** 6895 **************************************************************************** 6896 **************************************************************************** 6897 Knock_Detection: 6898 9CF4 C6E02E 6899 lda feature3_f 9CF7 A540 6900 bit #KnockDetb msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 65 MC68HC908GP32 User Bootloader 9CF9 2778 6901 beq End_KnockJmp ; knock not enabled 6902 9CFB C6E074 6903 lda feature8_f 9CFE A510 6904 bit #spkfopb 9D00 2671 6905 bne End_KnockJmp ; Spark output F enabled, incompatible 6906 9D02 8C 6907 clrh 9D03 B64D 6908 lda rpm 9D05 C1E035 6909 cmp KnockRpmL_f ; Is the engine rpm too high for 6910 ; the knock sensor? 9D08 2266 6911 bhi Clr_KnockJmp ; If it is clear values, no more retard 9D0A C1E036 6912 cmp KnockRpmLL_f ; Is it running lower than the 6913 ; low rpm setpoint? 9D0D 2561 6914 blo Clr_KnockJmp ; If so clear all values, no 6915 ; more retard 9D0F B6C9 6916 lda kpa 9D11 C1E037 6917 cmp KnockKpaL_f ; Is the boost above the limit 6918 ; for knock system? 9D14 225A 6919 bhi Clr_KnockJmp ; If it is clear knock values, 6920 ; no more retard. 9D16 0E6115 6921 brset Knocked,SparkBits,KnockTLeft ; If knock has been 6922 ; previously detected do timer 9D19 0E621D 6923 brset Advancing,RevLimBits,KnockALeft ; If we are advancing back 9D1C 040354 6924 brset KnockIn,portd,End_KnockJmp ; If no knock on input 6925 ; then no knock 9D1F 1E61 6926 bset Knocked,SparkBits ; 1st Knock on input so set knocked bit 9D21 C6E038 6927 lda KnockRet1_f 9D24 B75F 6928 sta KnockAngle ; Load in first retard amount 9D26 C6E06B 6929 lda BoostKnock_f ; Value to remove from Boost controller 9D29 B7FE 6930 sta KnockBoost ; target 9D2B CC9DA9 6931 jmp Start_KnockTime ; Start the knock timer 6932 6933 KnockTLeft: 9D2E 1F62 6934 bclr Advancing,RevLimBits ; Clear advance bit as we are retarding 9D30 B6D6 6935 lda KnockTimLft 9D32 A100 6936 cmp #00T 9D34 2711 6937 beq NoTimeLeft ; If timer counted down then add 6938 ; some advance 9D36 CC9D73 6939 jmp End_KnockJmp ; End of Knock 6940 6941 KnockALeft: 9D39 1F61 6942 bclr Knocked,SparkBits ; Clear Retard set bit as we 6943 ; are advancing 9D3B 050349 6944 brclr KnockIn,portd,Knocking_Still ; Do we have any knocking? 9D3E B6D6 6945 lda KnockTimLft 9D40 A100 6946 cmp #00T 9D42 2703 6947 beq NoTimeLeft ; If timer counted down then add 6948 ; some advance 9D44 CC9D73 6949 jmp End_KnockJmp ; End of Knock 6950 6951 NoTimeLeft: 9D47 05033D 6952 brclr KnockIn,portd,Knocking_Still ; Still knocking? 9D4A 1F61 6953 bclr Knocked,SparkBits ; No Knocking so clear knock bit 9D4C 1E61 6954 bset Advancing,SparkBits ; Set advancing bit 9D4E C6E06B 6955 lda Boostknock_f 9D51 270B 6956 beq No_BoostKnock ; if no Boost Knock value then 6957 ; jump past checks 9D53 B6FE 6958 lda KnockBoost ; Value to add to Boost controller 9D55 C0E06B 6959 sub BoostKnock_f ; target 9D58 B7FE 6960 sta KnockBoost 9D5A A103 6961 cmp #03T 9D5C 2518 6962 blo ClearTime ; If target boost less than 6963 ; 0.5psi then clear all 6964 No_BoostKnock: 9D5E B65F 6965 lda KnockAngle ; No Knock detected and time 6966 ; period over 9D60 C0E03A 6967 sub KnockAdv_f ; so remove some retard 6968 6969 StoreKnock: 9D63 A103 6970 cmp #03T 9D65 250F 6971 blo ClearTime ; If retard is less than 1deg 6972 ; clear timer, we have finished 9D67 A155 6973 cmp #85T 9D69 220B 6974 bhi ClearTime ; If we are above 30 Degrees 6975 ; then somethings wrong so clear retard 9D6B B75F 6976 sta KnockAngle 9D6D CC9DA9 6977 jmp Start_KnockTime 6978 6979 Clr_KnockJmp: 9D70 CC9DBB 6980 jmp Clr_Knock 6981 End_KnockJmp: 9D73 CC9DC7 6982 jmp End_Knock 6983 6984 ClearTime: ; No Knocks and retard back to start 6985 ; so clear everything. 9D76 A600 6986 lda #00T 9D78 B75F 6987 sta KnockAngle ; Clear the knock angle 9D7A B7D6 6988 sta KnockTimLft ; Clear the time left value 9D7C B7FF 6989 sta KnockAngleRet ; Clears actual knock angle 9D7E B7FE 6990 sta KnockBoost ; Clear the boost value to remove 9D80 1F61 6991 bclr Knocked,SparkBits ; Clear the Knocked bit 9D82 1F62 6992 bclr Advancing,RevLimBits ; Clear advance bit 9D84 CC9DC7 6993 jmp End_Knock ; Go to end of knock system 6994 6995 Knocking_Still: 9D87 1E61 6996 bset Knocked,SparkBits ; Set Knocking bit 9D89 1F62 6997 bclr Advancing,RevLimBits ; Clear the advance bit as we are 6998 ; in knock retard 9D8B B6FE 6999 lda KnockBoost 9D8D CBE06B 7000 add BoostKnock_f ; Increase the amount of boost to remove 9D90 C1E06C 7001 cmp BoostKnMax_f ; Are we at max? 9D93 2503 7002 blo Store_Boost_Remove ; No so store boost to remove 9D95 C6E06C 7003 lda BoostKnMax_f ; Yes so store the max 7004 Store_Boost_Remove: 9D98 B7FE 7005 sta KnockBoost 9D9A C6E039 7006 lda KnockRet2_f ; 9D9D BB5F 7007 add KnockAngle ; add the knock retard angle2 to 7008 ; knock angle 9D9F C1E03B 7009 cmp KnockMax_f ; Are we at the max retard? 9DA2 2503 7010 blo Not_atMax ; If not at max store new angle 9DA4 C6E03B 7011 lda KnockMax_f ; If above max load the max allowed. 7012 7013 Not_atMax: 9DA7 B75F 7014 sta KnockAngle ; Store new knock angle 7015 7016 Start_KnockTime: 9DA9 C6E03C 7017 lda KnockTim_f ; Start/Restart the knock timer 9DAC B7D6 7018 sta KnockTimLft 9DAE A6FF 7019 lda #255T 9DB0 B05F 7020 sub KnockAngle ; (255-Knock Angle) turns it into a retard angle 9DB2 A1AA 7021 cmp #$aa ; Limit the retard to 30 degrees 9DB4 220F 7022 bhi StoreAngle 9DB6 A6AA 7023 lda #$aa 9DB8 CC9DC5 7024 jmp StoreAngle 7025 7026 Clr_Knock: 9DBB 1F61 7027 bclr Knocked,SparkBits ; Clear the Knocked bit 9DBD 1F62 7028 bclr Advancing,RevLimBits ; Clear advancing bit 9DBF A600 7029 lda #$00 ; Clear the knock angle value 9DC1 B7FE 7030 sta KnockBoost ; Clear the boost value to remove 9DC3 B75F 7031 sta KnockAngle 7032 7033 StoreAngle: 9DC5 B7FF 7034 sta KnockAngleRet ; Actual retard value for MSnS 7035 7036 End_Knock: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 66 MC68HC908GP32 User Bootloader 7037 ****************************************************************************** 7038 ****************************************************************************** 7039 ** Anti-Rev System P Ringwood 7040 ** System based on rate of change of rpm or input signals from 7041 ** 2 x Vehicle Speed Sensors 7042 ** Fuel enrichment, to bog down the engine and retard angle are 7043 ** interpolated from the 4 bins of each setting. Spark Cut isn't 7044 ** interpolated as it's not worth the effort as it's such a low 7045 ** figure (1 or 2 cuts) 7046 ** Now added cycle counter so it can hold settings for an interpolated amount 7047 ** of engine cycles. Uses ASEcount, so can only work after start warm up over. 7048 ** Using this saves making h file bigger and adding yet another counter 7049 ** to the interupt. 7050 ** 7051 ******************************************************************************** 7052 ******************************************************************************** 7053 9DC7 C6E05C 7054 lda feature6_f 9DCA A520 7055 bit #TractionCb 9DCC 2776 7056 beq Traction_DoneJMP 7057 7058 TractionSystem: 9DCE 01421F 7059 brclr running,engine,No_TC_Yet; Only use it if engine running 9DD1 02421C 7060 brset crank,engine,No_TC_Yet ; Dont use it during cranking as we use some 7061 ; traction bytes 9DD4 044219 7062 brset startw,engine,No_TC_Yet ; only use Anti-Rev when after 7063 ; start enrichment over 9DD7 066719 7064 brset WheelSensor,feature7,No_RPM_Thresh ; If using wheel 7065 ; sensors then no need to look at rpm 7066 Do_RPM_TC: 9DDA B64D 7067 lda rpm 9DDC C10100 7068 cmp rpmlast 9DDF 246B 7069 bhs RPM_Thresh ; Has the rpm increased? 7070 NO_TC_Loss: 9DE1 006963 7071 brset Traction,EnhancedBits2,reset_TC_Yet ; Have we selected 7072 ; to wait till cycle counter timed out? 7073 Reset_TC_Now: 9DE4 1169 7074 bclr Traction,EnhancedBits2 ; Clear the traction control bit 9DE6 A600 7075 lda #00T 9DE8 B7E1 7076 sta TCCycles 9DEA B7DE 7077 sta TCAngle 9DEC B7DD 7078 sta TCAccel 9DEE B781 7079 sta ASEcount 7080 No_TC_Yet: 9DF0 CC9F1F 7081 jmp Traction_Done ; No so return 7082 7083 No_RPM_Thresh: 7084 7085 ; Driven input = egtadc Non-Driven input = o2_fpadc 7086 ; If under max speed and over min speed, multiply driven speed sensor 7087 ; input by the scale factor to find the speed the un-driven sensor should be at. 7088 ; Then find the allowable slip amount based on calculated estimate speed 7089 ; than actual then we have lost traction. I think:-) 7090 9DF3 B65C 7091 lda o2_fpadc ; Non-driven speed sensor input 9DF5 C1E076 7092 cmp UDSpeedLim_f ; Have we reached the speed limit? 9DF8 22EA 7093 bhi Reset_TC_Now ; Yes so reset TC 9DFA C1E075 7094 cmp UDSpeedLo_f ; Are we above the minimum speed? 9DFD 25E5 7095 blo Reset_TC_Now ; Yes so reset TC 9DFF 8C 7096 clrh 9E00 BE5D 7097 ldx egtadc ; Put Driven input into x reg 9E02 C6E077 7098 lda TCScaleFac_f ; Multiply by the differential factor 9E05 42 7099 mul 9E06 9F 7100 txa ; Transfer high byte to accumulator 9E07 2401 7101 bcc Carry_LC ; Is the carry bit set? 9E09 4C 7102 inca 7103 Carry_LC: ; Acc contains result 9E0A B7DA 7104 sta tmp32 9E0C B05C 7105 sub o2_fpadc ; subtract undriven wheel speed 9E0E 2BD1 7106 bmi NO_TC_Loss ; Drive wheels slower than undriven, 7107 ; no TC 7108 7109 ; Interpolate to find allowable slip depending on vehicle speed 7110 ; (store allowed slip in tmp31) 9E10 3F92 7111 clr liX1 ; Set minimum speed to 00 9E12 A67F 7112 lda #127T ; Set maximum speed for 7113 ; interpolater to half speed 9E14 B793 7114 sta liX2 9E16 C6E078 7115 lda TCSlipFac_f ; Slip allowed at minimum speed 7116 ; (00 liX1) 9E19 B794 7117 sta liY1 9E1B C6E07B 7118 lda TCSlipFacH_f ; Slip allowed at half speed 9E1E B795 7119 sta liY2 9E20 B65C 7120 lda o2_fpadc ; Actual speed were running at 9E22 B796 7121 sta liX 9E24 CDD51E 7122 jsr LinInterp ; Go and find out what slip is 7123 ; allowed at current speed 9E27 B7D9 7124 sta tmp31 7125 7126 ; Find out if we are slipping over the amount allowed 9E29 BEDA 7127 ldx tmp32 ; Load x reg with speed undriven 7128 ; wheels should be (calculated 7129 ; from driven wheel) 9E2B B6D9 7130 lda tmp31 ; Multiply by the allowable 7131 ; difference factor (slip allowed) 9E2D 42 7132 mul 9E2E 9F 7133 txa ; Transfer high byte to acc 9E2F 2401 7134 bcc Carry_Slip 9E31 4C 7135 inca 7136 Carry_Slip: 9E32 BB5C 7137 add o2_fpadc ; Acc = speed of undriven wheel 7138 ; + slip allowed 9E34 25AB 7139 bcs NO_TC_Loss ; If we go over 255 then no traction 9E36 B1DA 7140 cmp tmp32 ; Compare to calculated speed of 7141 ; undriven wheel 9E38 22A7 7142 bhi NO_TC_Loss ; Were not over limit so no TC 9E3A B7D9 7143 sta tmp31 ; Store speed of undriven wheel 7144 ; + slip allowed 9E3C B6DA 7145 lda tmp32 ; Load calculated value of 7146 ; undriven wheel 9E3E B0D9 7147 sub tmp31 9E40 B7DA 7148 sta tmp32 ; Store amount of traction loss 9E42 2049 7149 bra VSSThresh_RJMP 7150 7151 Traction_DoneJMP: 9E44 CC9F1F 7152 jmp Traction_Done 7153 7154 ; If were here weve had Anti-Rev working and rpm is stable so do we 7155 ; reset it yet or later? 7156 reset_TC_Yet: 9E47 05679A 7157 brclr TCcycleSec,feature7,Reset_TC_Now ; Reset it now if 7158 ; stable rpm selected 9E4A 200A 7159 bra Check_TC_Counter ; Not reseting on stable rpm 7160 ; so check cycle counter 7161 7162 RPM_Thresh: 9E4C B64D 7163 lda rpm 9E4E C00100 7164 sub rpmlast 9E51 C1E062 7165 cmp RPMthresh_f ; Have we increased rpm above 7166 ; the threshold? 9E54 2413 7167 bhs Thresh_Reach 7168 7169 Check_TC_Counter: 9E56 B681 7170 lda ASEcount ; Use after start warmup counter 7171 ; as its only used for a few 7172 ; seconds on start up. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 67 MC68HC908GP32 User Bootloader 9E58 B1E1 7173 cmp TCCycles 9E5A 250A 7174 blo Dont_Reset_Tract ; Only reset angle and accel 7175 ; enrich after nn cycles 9E5C 1169 7176 bclr Traction,EnhancedBits2 ; Clear the traction control bit 9E5E A600 7177 lda #00T 9E60 B7DE 7178 sta TCAngle 9E62 B7DD 7179 sta TCAccel 9E64 B781 7180 sta ASEcount 7181 Dont_Reset_Tract: 9E66 CC9F1F 7182 jmp Traction_Done 7183 7184 ; For RPM Based Anti-Rev 7185 Thresh_Reach: 9E69 1069 7186 bset Traction,EnhancedBits2 ; Set the traction control bit 9E6B A600 7187 lda #00T 9E6D B781 7188 sta ASEcount ; Reset the cycle counter 9E6F 3F93 7189 clr tmp2 7190 7191 ; Find the rate of change from the table lookup, store it in tmp31 for 7192 ; the rest of the interpolaters 9E71 45DE40 7193 ldhx #rpmdotrate ; Store address for finding 7194 ; rate of change 9E74 3592 7195 sthx tmp1 9E76 6E0394 7196 mov #$03,tmp3 ; Table size 4 (3+1) 9E79 B64D 7197 lda rpm 9E7B C00100 7198 sub rpmlast 9E7E B795 7199 sta tmp4 9E80 B79B 7200 sta tmp10 9E82 CDD503 7201 jsr tablelookup ; Go find the address 9E85 8C 7202 clrh 9E86 B696 7203 lda tmp5 ; Put Address value from lookup 7204 ; into x reg 9E88 97 7205 tax 9E89 B7D9 7206 sta tmp31 ; Save tmp5 for next lin inter 9E8B 2002 7207 bra TC_Interpoler 7208 7209 VSSThresh_RJMP: 9E8D 2050 7210 bra VSSThresh_Reach 7211 7212 TC_Interpoler: 7213 ; Enrichment interpole 9E8F D6E05E 7214 lda RPMrate_f,x ; Load the enrich value 9E92 B795 7215 sta liY2 9E94 5A 7216 decx 9E95 D6E05E 7217 lda RPMrate_f,x ; Load the enrich value - 1 9E98 B794 7218 sta liY1 9E9A 4E9B96 7219 mov tmp10,liX 9E9D CDD51E 7220 jsr LinInterp 9EA0 B697 7221 lda tmp6 ; result from Lin Inter 9EA2 B7DD 7222 sta TCAccel ; Store enrichment 7223 7224 ; Retard angle interpole 9EA4 BED9 7225 ldx tmp31 ; Address from lookup table 9EA6 D6E063 7226 lda TractDeg_f,x 9EA9 B795 7227 sta liY2 9EAB 5A 7228 decx 9EAC D6E063 7229 lda TractDeg_f,x ; Load the angle value - 1 9EAF B794 7230 sta liY1 9EB1 4E9B96 7231 mov tmp10,liX 9EB4 CDD51E 7232 jsr LinInterp 9EB7 A6FF 7233 lda #255T ; 255 - result = retard angle 9EB9 B097 7234 sub tmp6 ; result from Lin Inter 9EBB B7DE 7235 sta TCAngle ; Store retard angle 7236 7237 ; Engine cycles to hold interpole 9EBD BED9 7238 ldx tmp31 ; Address from lookup table 9EBF D6E070 7239 lda TractCycle_f,x ; 9EC2 B795 7240 sta liY2 9EC4 5A 7241 decx 9EC5 D6E070 7242 lda TractCycle_f,x ; Load the cycle hold value - 1 9EC8 B794 7243 sta liY1 9ECA 4E9B96 7244 mov tmp10,liX 9ECD CDD51E 7245 jsr LinInterp 9ED0 B697 7246 lda tmp6 9ED2 B7E1 7247 sta TCCycles 7248 7249 ; Spark Cut finder 9ED4 BED9 7250 ldx tmp31 9ED6 D6E067 7251 lda TractSpark_f,x 9ED9 B7DF 7252 sta TCSparkCut ; No need to lin interpolate as 7253 9EDB 2042 7254 bra Traction_Done 7255 7256 TC_InterpJMP: 9EDD 20B0 7257 bra TC_Interpoler 7258 7259 ; For speed sensor Anti-Rev system, find table value. Tmp32 contains loss 7260 VSSThresh_Reach: 9EDF 1069 7261 bset Traction,EnhancedBits2 ; Set the traction control bit 9EE1 A600 7262 lda #00T 9EE3 B781 7263 sta ASEcount ; Reset the cycle counter 9EE5 3F93 7264 clr tmp2 7265 ; Find percentage of loss: Undriven wheel/100 * loss of traction (tmp32) 9EE7 B65C 7266 lda o2_fpadc 9EE9 8C 7267 clrh 9EEA AE64 7268 ldx #100T 9EEC 52 7269 div ; (H:A) / X ->A, rem in H 9EED 97 7270 tax 9EEE 8B 7271 pshh 9EEF 86 7272 pula 9EF0 A132 7273 cmp #50T ; Is remainder higher than half 7274 ; divisor? 9EF2 2501 7275 blo Round_Slip_Per 9EF4 5C 7276 incx 7277 Round_Slip_Per: 9EF5 B6DA 7278 lda tmp32 9EF7 42 7279 mul ; X*A -> (X:A) 9EF8 A300 7280 cpx #0T ; Did we overflow? 9EFA 2702 7281 beq No_OF_Slip 9EFC A664 7282 lda #100T ; 100% max 7283 No_OF_Slip: 9EFE A164 7284 cmp #100T 9F00 2502 7285 blo Slip_Percentage 9F02 A664 7286 lda #100T 7287 Slip_Percentage: 9F04 B7DA 7288 sta tmp32 ; Store percentage slip 7289 7290 ; Find the percent slip from the table lookup, store it in tmp31 for 7291 ; the rest of the interpolaters 9F06 45DE44 7292 ldhx #sliprate ; Store address for finding slipage 9F09 3592 7293 sthx tmp1 9F0B 6E0394 7294 mov #$03,tmp3 ; Table size 4 (3+1) 9F0E B6DA 7295 lda tmp32 ; Percentage of loss 9F10 B795 7296 sta tmp4 9F12 B79B 7297 sta tmp10 9F14 CDD503 7298 jsr tablelookup ; Go find the address 9F17 8C 7299 clrh 9F18 B696 7300 lda tmp5 ; Put Address value from lookup 7301 ; into x reg 9F1A 97 7302 tax 9F1B B7D9 7303 sta tmp31 ; Save tmp5 for next lin inter 9F1D 20BE 7304 bra TC_InterpJMP ; Now go and work out the 7305 ; enrichments, etc 7306 7307 Traction_Done: 7308 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 68 MC68HC908GP32 User Bootloader 7309 *************************************************************************** 7310 ******************** S U B S E C T I O N L O O P ************** 7311 *************************************************************************** 7312 7313 ;SubSectionLoop: 9F1F 0E6803 7314 brset Primed,EnhancedBits,Prime_Checked ; Have we primed? 9F22 CC8553 7315 jmp NotPrimed 7316 7317 Prime_Checked: 9F25 016603 7318 brclr BoostControl,feature2,no_boost 9F28 CDA1BC 7319 jsr CalcBoostDC 7320 7321 no_boost: 9F2B 0F6503 7322 brclr Nitrous,feature1,no_nitrous 9F2E CDD72C 7323 jsr EnableN2O 7324 7325 no_nitrous: 9F31 C6E05C 7326 lda feature6_f 9F34 A501 7327 bit #VETable3b 9F36 2703 7328 beq No_VE_Table_3 9F38 CDD87B 7329 jsr Check_VE3_Table 7330 7331 No_VE_Table_3: 9F3B C6E02E 7332 lda feature3_f 9F3E A580 7333 bit #TargetAFRb 9F40 2703 7334 beq No_AFRTar_VE1 7335 ; Are we using the 7336 ; target afrs for 7337 ; table 1? 9F42 CDD890 7338 jsr AFR1_Targets; Get Target AFR 7339 ; from table 1 for VE 1 7340 NO_AfrTar_VE1: 9F45 C6E05C 7341 lda feature6_f 9F48 A502 7342 bit #TargetAFR3b 9F4A 2703 7343 beq No_AfrTar_VE3 9F4C CDD94E 7344 jsr AFR2_Targets; Are we using the 7345 ; target afrs for 7346 ; table 3? 7347 ; Get Target AFR 7348 ; from table 2 for VE 3 7349 No_AfrTar_VE3: 9F4F 004203 7350 brset running,engine,nospkoff ; skip next check 7351 ;if not running then make sure all spark outputs are OFF 7352 ;this is a bandaid, but better safe than sorry 9F52 CDA390 7353 jsr turnallsparkoff ; subroutine to stop them all 7354 nospkoff: 9F55 C6E000 7355 lda personality_f 9F58 2703 7356 beq No_misc_Spark 9F5A CDA406 7357 jsr misc_spark ; dwell and other bits 7358 7359 No_misc_Spark: 7360 ;This section checks for imminent T2 rollover. Trying to avoid a race condition where 7361 ;the timer overflows but we try to read software byte before the overflow handler 7362 ; gets there. This would give an incorrect 24bit "current" value 9F5D 9B 7363 sei 9F5E 006B04 7364 brset roll1,EnhancedBits4,roll1set 9F61 136B 7365 bclr roll2,EnhancedBits4 9F63 2002 7366 bra chk_roll 7367 roll1set: 9F65 126B 7368 bset roll2,EnhancedBits4 7369 chk_roll: 9F67 B62D 7370 lda T2CNTL ; unlatch any previous read 9F69 B62C 7371 lda T2CNTH 9F6B A1FF 7372 cmp #$FF 9F6D 2604 7373 bne roll_not_high 9F6F 106B 7374 bset roll1,EnhancedBits4 9F71 2002 7375 bra chkroll_end 7376 roll_not_high: 9F73 116B 7377 bclr roll1,EnhancedBits4 7378 chkroll_end: 9F75 9A 7379 cli 7380 7381 ;test code 7382 ;check if 0.1ms code has executed since we got here last. Major problem if it 7383 ;hasn't. 9F76 036C15 7384 brclr checkbit,EnhancedBits5,troll_ck_done ; ok 7385 ;oh dear, we've missed it 7386 9F79 B62D 7387 lda T2CNTL ; unlatch any previous read 9F7B B62C 7388 lda T2CNTH 9F7D B792 7389 sta tmp1 9F7F B62D 7390 lda T2CNTL 9F81 AB0A 7391 add #10T ; interrupt will occur in 10us 9F83 97 7392 tax 9F84 B692 7393 lda tmp1 9F86 A900 7394 adc #0T 9F88 B731 7395 sta T2CH0H 9F8A BF32 7396 stx T2CH0L 9F8C 1C30 7397 bset TOIE,T2SC0 ; re-enable 0.1ms interrupt 7398 7399 troll_ck_done: 9F8E 126C 7400 bset checkbit,EnhancedBits5 ;set it here, 0.1ms will clear it 7401 9F90 CC85E0 7402 jmp CalcRunningParameters ; Start main loop again 7403 7404 *************************************************************************** 7405 ** 7406 ** Cranking Mode 7407 ** 7408 ** Pulsewidth is directly set by the coolant temperature value of 7409 ** 021p added facility to use Inlet Manifold air temp instead / as well 7410 ** CWU (at -40 degrees) and CWH (at 165 degrees) - value is interpolated 7411 ** 7412 ** Leaves result in tmp1, clears tmp2. 7413 ** 7414 *************************************************************************** 7415 7416 crankingMode: 9F93 01421B 7417 brclr running,engine,ExtraFuelCrank ; We are stopped so do we add 7418 ; extra fuel whilst cranking? 7419 7420 crankingModePrime: 9F96 1242 7421 bset crank,engine ; Turn on cranking mode. 9F98 1542 7422 bclr startw,engine ; Turn off ASE mode. 9F9A 1742 7423 bclr warmup,engine ; Turn off WUE mode. 7424 9F9C B647 7425 lda tps ; ~70% comparison value for throttle 7426 ; - flood clear trigger 9F9E C1E82C 7427 cmp tpsflood_f 9FA1 2537 7428 blo crankingPW 9FA3 3FDD 7429 clr TCAccel 7430 7431 floodClear: 9FA5 4F 7432 clra ; Turn off pulses altogether. 7433 ;sph for HR 9FA6 3F4E 7434 clr pwcalch; 9FA8 3F4F 7435 clr pwcalcl; 9FAA 3F55 7436 clr pwcalc2l; 9FAC 3F54 7437 clr pwcalc2h; 9FAE CCA037 7438 jmp crankingDone 7439 7440 ; Extra Fueling for Cranking! This is triggered if the TPS goes above the floodclear 7441 ; value 3 times before starting. Were using the NosDcOk Bit as its not used at cranking. 7442 ; Were also using various Traction Bytes too. All this to save RAM. 7443 7444 ExtraFuelCrank: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 69 MC68HC908GP32 User Bootloader 9FB1 C6E82A 7445 lda feature11_f4 9FB4 A540 7446 bit #ExCrFuelb 9FB6 27ED 7447 beq floodClear ; If Extra Cranking Fuel not selected then 7448 ; carry on as normal 7449 9FB8 B647 7450 lda tps 9FBA C1E82C 7451 cmp tpsflood_f 9FBD 2414 7452 bhs HighTPS ; Is the TPS higher than the floodclear value? 9FBF 0168E3 7453 brclr NosDcOk,EnhancedBits,floodClear ; No so go back to clearing PW 9FC2 1168 7454 bclr NosDcOk,EnhancedBits 9FC4 3CE1 7455 inc TCCycles ; Temp storage of TPS counter 9FC6 B6E1 7456 lda TCCycles 9FC8 A103 7457 cmp #03T 9FCA 25D9 7458 blo floodClear ; If we havent done it 3 times then clear PW 9FCC C6E82E 7459 lda ExtraCrFu_f 9FCF B7DD 7460 sta TCAccel 9FD1 20D2 7461 bra floodClear 7462 7463 HighTPS: 7464 9FD3 0068CF 7465 brset NosDcOk,EnhancedBits,floodClear ; Have we done this? 9FD6 1068 7466 bset NosDcOk,EnhancedBits ; Set bit so we dont do this again 9FD8 20CB 7467 bra floodClear 7468 7469 7470 7471 crankingPW: 7472 ;This section is redundant because variable overwritten below 7473 ; clr liX1 ; -40 + 40 7474 ; lda #205T ; 165 + 40 degrees (because of 7475 ; ; offset in lookup table) 7476 ; sta liX2 7477 ; lda cwu_f1 7478 ; sta liY1 7479 ; lda cwh_f1 7480 ; sta liY2 7481 7482 ; choose coolant, airtemp or average 9FDA C6E82A 7483 lda feature11_f4 9FDD A520 7484 bit #matcrankb 9FDF 2604 7485 bne crpwmat 7486 crpwclt: ; if cltcrank bit is 1 or 0 9FE1 B6CA 7487 lda coolant 9FE3 2012 7488 bra crpwint 7489 7490 crpwmat: 7491 9FE5 C6E82A 7492 lda feature11_f4 9FE8 A510 7493 bit #cltcrankb 9FEA 2708 7494 beq CltOnlyPulse 9FEC C60104 7495 lda airtemp 9FEF BBCA 7496 add coolant 7497 ; bcc Clt_IAT_NOFlow ; why ???? 7498 ; lda #255T 7499 ;Clt_IAT_NOFlow: 9FF1 46 7500 rora ; ( airtemp + coolant ) /2 9FF2 2003 7501 bra crpwint 7502 7503 CltOnlyPulse: 9FF4 C60104 7504 lda airtemp ; Air Temp only 7505 crpwint: 9FF7 B796 7506 sta liX 7507 7508 ; Table look up for Cranking PW, liX already contains temperature to look for - PR 9FF9 4E9695 7509 mov liX,tmp4 ; tmp4 holds the variable to look 7510 ; for in the lookup table 9FFC 4E969B 7511 mov liX,tmp10 ; Save away for later use below 9FFF 45DDF5 7512 ldhx #WWURANGE A002 3592 7513 sthx tmp1 A004 6E0994 7514 mov #$09,tmp3 ; 10 bits wide A007 CDD503 7515 jsr tableLookup ; This finds the bins when the 7516 ; temperatures are set 7517 A00A 8C 7518 clrh A00B BE96 7519 ldx tmp5 7520 A00D D6E820 7521 lda CrankPWs_f,x A010 B795 7522 sta liY2 A012 5A 7523 decx A013 D6E820 7524 lda CrankPWs_f,x ; This finds the values for the 7525 ; PW at the above temperatures A016 B794 7526 sta liY1 A018 4E9B96 7527 mov tmp10,liX 7528 A01B CDD51E 7529 jsr LinInterp 7530 7531 ; If TCAccel > 0 then we are multiplying the Crank PW by it 7532 A01E B6DD 7533 lda TCAccel A020 2713 7534 beq MultiFacCrank ; Do we have a value to use? A022 B79B 7535 sta tmp10 A024 3F9C 7536 clr tmp11 A026 B697 7537 lda tmp6 A028 B79D 7538 sta tmp12 A02A 3F9E 7539 clr tmp13 A02C CDD6D6 7540 jsr Supernorm A02F B69B 7541 lda tmp10 A031 BB97 7542 add tmp6 ; Add original PW back A033 2002 7543 bra crankingDone 7544 7545 MultiFacCrank: A035 B697 7546 lda tmp6 ; Leave it where expected. 7547 7548 crankingDone: 7549 ;sph stolen from HR code... need hires cranking A037 97 7550 tax A038 A664 7551 lda #$64 A03A 42 7552 mul A03B BFA4 7553 stx tmp19 A03D B7A5 7554 sta tmp20 7555 ; sta egtadc 7556 ; sta tmp1 A03F 0D6505 7557 brclr CrankingPW2,feature1,no_crankpw2 A042 BFA6 7558 stx tmp21 A044 B7A7 7559 sta tmp22 7560 ; sta tmp2 ; Pulse bank 2 just like bank 1. A046 81 7561 rts 7562 no_crankpw2: 7563 ; clr tmp2 ; Zero out bank 2 while cranking. A047 3FA6 7564 clr tmp21 ; high res A049 3FA7 7565 clr tmp22 ; kg moved from above to be consistent A04B 81 7566 rts 7567 7568 7569 *************************************************************************** 7570 ** Roger Enns' Staged Injection System 7571 ** (Modded for MSnS-Extra by P Ringwood) 7572 ** Calculate staged mode pulse width: 7573 ** 7574 ** PW_STAGED = ((TMP11 + TPSACCEL) * ScaleFac / 512) - INJOCFUEL + TMP6 7575 ** 7576 ** ScaleFac = Primary inj size /(Prim + Sec inj size) * 512, should always 7577 ** be <=255. If identically sized injectors, use 255. 7578 *************************************************************************** 7579 CALC_STAGED_PW: A04C B650 7580 lda TPSACCEL msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 70 MC68HC908GP32 User Bootloader A04E CB0106 7581 add NOSPW A051 97 7582 tax A052 A664 7583 lda #100T A054 42 7584 mul A055 BBA5 7585 add tmp20 A057 C70108 7586 sta pw_stagedl A05A 9F 7587 txa A05B B9A4 7588 adc tmp19 A05D C70107 7589 sta pw_stagedh A060 253C 7590 bcs MAX_PWM_ALLOWED2 7591 A062 C60108 7592 lda pw_stagedl A065 B097 7593 sub tmp6 A067 C70108 7594 sta pw_stagedl A06A C60107 7595 lda pw_stagedh A06D B296 7596 sbc tmp5 A06F C70107 7597 sta pw_stagedh 7598 A072 C6E04F 7599 lda SCALEFAC_f ; load SCALEFAC constant into 7600 ; accumulator A075 97 7601 tax A076 C60107 7602 lda pw_stagedh A079 42 7603 mul A07A C7010C 7604 sta pw_staged2l A07D 9F 7605 txa A07E 44 7606 lsra A07F C7010B 7607 sta pw_staged2h A082 C6010C 7608 lda pw_staged2l A085 46 7609 rora A086 2401 7610 bcc NO_INC ; if carry bit clear, skip increment A088 4C 7611 inca ; otherwise, increment accumulator 7612 NO_INC: A089 C7010C 7613 sta pw_staged2l 7614 A08C B697 7615 lda tmp6 A08E CB010C 7616 add pw_staged2l A091 C70108 7617 sta pw_stagedl A094 B696 7618 lda tmp5 A096 C9010B 7619 adc pw_staged2h A099 C70107 7620 sta pw_stagedh A09C 240A 7621 bcc FINISHED_PW_COMP 7622 MAX_PWM_ALLOWED2: ; THIS SHOULD NEVER HAPPEN A09E A6FF 7623 lda #$FF A0A0 C70107 7624 sta pw_stagedh A0A3 A6FE 7625 lda #$FE A0A5 C70108 7626 sta pw_stagedl 7627 FINISHED_PW_COMP: A0A8 CCA0FB 7628 jmp staged_same 7629 ;sta pw_staged 7630 ; figure out how much to bring in during each pw scheduling time. A0AB C6E3B3 7631 lda StgCycles_f 7632 ; redundant cmp #00T A0AE 274B 7633 beq staged_same ; if gradual transition is off branch 7634 7635 ; if the transition is done, branch A0B0 0A6D48 7636 brset StgTransDone,EnhancedBits6,staged_same 7637 7638 ; calculate the secondary pulse-width using the following formula: 7639 ; pw_staged2 = (((pw_staged - tmp6 + TPSACCEL) / StgCycles_f) 7640 ; * stgTransitionCnt) + tmp6) 7641 A0B3 8B 7642 pshh A0B4 97 7643 tax 7644 ;lda pw_staged A0B5 B7A7 7645 sta tmp22 ; stash a copy of pw_staged in tmp22 A0B7 B097 7646 sub tmp6 A0B9 BB50 7647 add TPSACCEL A0BB CB0106 7648 add NosPW A0BE 8C 7649 clrh A0BF 52 7650 div A0C0 A100 7651 cmp #00T A0C2 2602 7652 bne continue_pw_2 A0C4 A601 7653 lda #1T ; the div resulted in a 0 answer, round up 7654 ; ok, now we have in the a register, the amt to add to secondary 7655 ; during every ignition event, so do it 7656 continue_pw_2: A0C6 97 7657 tax A0C7 C6010D 7658 lda stgTransitionCnt 7659 ; if the count is 0, change to 1 to avoid 7660 ; instant transition 7661 ; redundant cmp #00T A0CA 2605 7662 bne continue_mul_2 A0CC A601 7663 lda #1T A0CE C7010D 7664 sta stgTransitionCnt 7665 continue_mul_2: A0D1 42 7666 mul 7667 ; now we have the amt to set pw_staged2 to 7668 ; add back the open time A0D2 BB97 7669 add tmp6 7670 ;sta pw_staged2 7671 7672 ; now figure it out for pw_staged using the following formula 7673 ; (tmp11 - ((((tmp11 + tmp6 + TPSACCEL) - pw_staged) / StgCycles_f) * 7674 ; stgTransitionCnt)) + tmp6 7675 ; we add tmp6 in the innermost set of parens b/c pw_staged already 7676 ; has the open time in it, and adding the open time to tmp 11 will 7677 ; give us the time without the open-time when we subtract. 7678 A0D4 C6E3B3 7679 lda StgCycles_f A0D7 97 7680 tax A0D8 B69C 7681 lda tmp11 A0DA BB97 7682 add tmp6 A0DC BB50 7683 add TPSACCEL ; add this since it was included in calc for pw_staged A0DE CB0106 7684 add NosPW 7685 ;sub pw_staged ; figure out how far to go from tmp11 to pw_staged A0E1 8C 7686 clrh A0E2 52 7687 div ; then figure out how much per step A0E3 A100 7688 cmp #00T A0E5 2602 7689 bne continue_pw_1 ; the div resulted in a 0 answer, round up A0E7 A601 7690 lda #1T 7691 continue_pw_1: A0E9 97 7692 tax A0EA C6010D 7693 lda stgTransitionCnt A0ED 42 7694 mul ; calculate the amount to subtract from tmp11 7695 ;sta pw_staged ; use pw_staged as temporary storage A0EE B69C 7696 lda tmp11 A0F0 BB50 7697 add TPSACCEL 7698 ;sub pw_staged A0F2 BB97 7699 add tmp6 7700 ;sta pw_staged 7701 7702 ;cmp pw_staged2 ; if pw_staged2 is greater than pw_staged, 7703 ; we probably rounded, so use the original 7704 ; pw_staged instead A0F4 8A 7705 pulh 7706 A0F5 2212 7707 bhi check_staged_on ; we're done here, go see if staging should be 7708 ; on or not. 7709 7710 staged_early_done: A0F7 B6A7 7711 lda tmp22 ; overshot so use the value we saved earlier 7712 ;sta pw_staged ; store here in case staged_same not executed A0F9 200C 7713 bra ss_s 7714 7715 staged_same: 7716 ; gradual transition is off or the transition is done, set the done bit msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 71 MC68HC908GP32 User Bootloader 7717 ; so the count stops A0FB C60107 7718 lda pw_stagedh A0FE C7010B 7719 sta pw_staged2h A101 C60108 7720 lda pw_stagedl A104 C7010C 7721 sta pw_staged2l 7722 ss_s: 7723 ;sta pw_staged2 A107 1A6D 7724 bset StgTransDone,EnhancedBits6 7725 7726 *************************************************************************** 7727 ** 7728 ** Check for injector staging - RPE 7729 ** 7730 ** Staged based on kpa, rpm, or map - selectable via config13 bits 6,7 7731 ** 7732 ** If >= STGTRANS, staged mode on 7733 ** If <= (STGTRANS - STGDELTA), staged mode off 7734 ** STGDELTA provides user-definable hysteresis to prevent 'chattering' during 7735 ** transition phase. 7736 ** 7737 *************************************************************************** 7738 check_staged_on: A109 C6E04C 7739 lda feature5_f A10C A508 7740 bit #stagedModeb A10E 260F 7741 bne LastCheck ; If this bit is set then not RPM 7742 A110 C6E050 7743 lda STGTRANS_f ; RPM-based staging A113 B14D 7744 cmp rpm A115 2332 7745 bls STAGED_ON A117 C0E051 7746 sub STGDELTA_f A11A B14D 7747 cmp rpm A11C 2445 7748 bhs STAGED_OFF A11E 81 7749 rts 7750 7751 LastCheck: A11F C6E04C 7752 lda feature5_f A122 A504 7753 bit #stagedb A124 2712 7754 beq MAPSTAGED ; If this bit is set then not TPS 7755 A126 B647 7756 lda tps ; TPS-based staging A128 C1E050 7757 cmp STGTRANS_f A12B 241C 7758 bhs STAGED_ON A12D C6E050 7759 lda STGTRANS_f A130 C0E051 7760 sub STGDELTA_f A133 B147 7761 cmp tps A135 242C 7762 bhs STAGED_OFF A137 81 7763 rts 7764 7765 MAPSTAGED: ; Must be MAP Based staging A138 C6E050 7766 lda STGTRANS_f A13B C10110 7767 cmp engineLoad ; was kpa A13E 2309 7768 bls STAGED_ON A140 C0E051 7769 sub STGDELTA_f A143 C10110 7770 cmp engineLoad ; was kpa A146 241B 7771 bhs STAGED_OFF A148 81 7772 rts 7773 7774 STAGED_ON: ; set staged bit to 1 A149 0D6714 7775 brclr StagedMAP2nd,feature7,cont_staged_on A14C 0F6711 7776 brclr StagedAnd,feature7,cont_staged_on 7777 ; if here, both parameters must be on to turn on staging 7778 7779 check_2nd_param: A14F C6E3B4 7780 lda Stg2ndParmKPA_f A152 C10110 7781 cmp engineLoad ; was kpa A155 2309 7782 bls cont_staged_on A157 C0E3B5 7783 sub Stg2ndParmDlt_f A15A C10110 7784 cmp engineLoad ; was kpa A15D 240C 7785 bhs cont_staged_off A15F 81 7786 rts ;shouldn't get here 7787 7788 cont_staged_on: A160 1668 7789 bset REStaging,EnhancedBits A162 81 7790 rts 7791 7792 STAGED_OFF: ; clear bit A163 0D6705 7793 brclr StagedMAP2nd,feature7,cont_staged_off 7794 ; if we get here, we need to see if And is on, because if it is 7795 ; we want to turn off staging... if it isn't, we want to see 7796 ; if staging should be on A166 0E6702 7797 brset StagedAnd,feature7,cont_staged_off A169 20E4 7798 bra check_2nd_param 7799 7800 cont_staged_off: A16B 1768 7801 bclr REStaging,EnhancedBits A16D 4F 7802 clra A16E C7010D 7803 sta stgTransitionCnt ; staged is off, clear the staging 7804 ; transition count A171 C7010B 7805 sta pw_staged2h A174 C7010C 7806 sta pw_staged2l A177 1B6D 7807 bclr StgTransDone,EnhancedBits6 A179 81 7808 rts 7809 7810 7811 7812 7813 **************************************************************** 7814 7815 VE_STEP_4: A17A 4E9E92 7816 mov tmp13,liX1 ; rpm low A17D 4E9F93 7817 mov tmp14,liX2 ; rpm high A180 4EA094 7818 mov tmp15,liY1 ; ve low A183 4EA195 7819 mov tmp16,liY2 ; ve high A186 4E4D96 7820 mov rpm,liX A189 CDD51E 7821 jsr LinInterp A18C 4E97A4 7822 mov tmp6,tmp19 ; ve at lower kPa/alpha bound 7823 7824 VE_STEP_5: A18F 4E9E92 7825 mov tmp13,liX1 ; rpm low A192 4E9F93 7826 mov tmp14,liX2 ; rpm high A195 4EA294 7827 mov tmp17,liY1 ; ve low A198 4EA395 7828 mov tmp18,liY2 ; ve high A19B 4E4D96 7829 mov rpm,liX A19E CDD51E 7830 jsr LinInterp A1A1 4E979C 7831 mov tmp6,tmp11 ; ve at upper kPa/alpha bound 7832 7833 VE_STEP_6: A1A4 4E9A92 7834 mov tmp9,liX1 ; kPa/alpha low A1A7 4E9B93 7835 mov tmp10,liX2 ; kPa/alpha high A1AA 4EA494 7836 mov tmp19,liY1 ; ve low A1AD 4E9C95 7837 mov tmp11,liY2 ; ve high A1B0 B6D8 7838 lda kpa_n A1B2 B796 7839 sta liX A1B4 CDD51E 7840 jsr LinInterp A1B7 81 7841 rts 7842 7843 ****************************************************** 7844 ** Boost Controller table lookup macros 7845 ;these lookup macros are messed up because they refer to the 7846 ;wrong page and the ram lookup is from the wrong place 7847 ; because that will return the wrong data 7848 ; 022i - commented out until they get fixed 7849 7850 ; boost control TABLE 1 A1B8 7851 $MACRO bc1X ; gets a byte from page8 or RAM. 7852 ; On entry X contains index. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 72 MC68HC908GP32 User Bootloader 7853 ; Returns byte in A 7854 ; lda page 7855 ; cmp #08T ; it isn't in page !!!! 7856 ; bne ve7xf 7857 ; lda VE_r,x 7858 ; bra ve7xc 7859 ve7xf: lda bc_kpa_f,x 7860 ve7xc: A1B8 7861 $MACROEND 7862 7863 ; boost control TABLE 2 A1B8 7864 $MACRO bc2X ; gets a byte from page8 or RAM. 7865 ; On entry X contains index. 7866 ; Returns byte in A 7867 ; lda page 7868 ; cmp #08T 7869 ; bne ve8xf 7870 ; lda VE_r,x 7871 ; bra ve8xc 7872 ve8xf: lda bc_dc_f,x 7873 ve8xc: A1B8 7874 $MACROEND 7875 7876 ; boost control TABLE 3 for 7877 ; switching boost table on the run A1B8 7878 $MACRO bc3X ; gets a byte from page8 or RAM. 7879 ; On entry X contains index. 7880 ; Returns byte in A 7881 ; lda page 7882 ; cmp #08T 7883 ; bne ve9xf 7884 ; lda VE_r,x 7885 ; bra ve9xc 7886 ve9xf: lda bc3_kpa_f,x 7887 ve9xc: A1B8 7888 $MACROEND 7889 7890 ; rotary trailing split ; switching boost table on the run A1B8 7891 $MACRO rs1X ; gets a byte from flash or RAM. 7892 ; On entry X contains index. 7893 ; Returns byte in A 7894 ;just work from flash for now 7895 lda page 7896 cmp #07T 7897 bne rs1xf 7898 lda {VE_r+split_f-flash_table7},x ; offset into ram copy 7899 bra rs1xc 7900 rs1xf: lda split_f,x 7901 rs1xc: A1B8 7902 $MACROEND 7903 7904 *************** 7905 ; a few boost bits up here to be relative 7906 boostZero: A1B8 4F 7907 clra A1B9 B7CC 7908 sta bcDC 7909 boostDone_dupe: A1BB 81 7910 rts 7911 7912 *************************************************************************** 7913 ** Boost Controller 7914 ** 7915 ** Sets bcDC to current pwm duty cycle for boost control. Current 7916 ** implementation assumes Audi-style solenoid plumbing, such that 7917 ** zero DC reduces boost as much as possible, while 100% DC 7918 ** increases boost as much as possible. Added change to direction option 7919 ** for 100%DC = decrease boost. 7920 ** 7921 ** The closed loop calc is 7922 ** output = output + (kpaTarget-kpa)*pGain - (kpa-kpaLast)*dGain 7923 ** 7924 ** kpaTarget is the target boost looked up on 6x6 (rpm,tps) map 7925 ** 7926 ** if kpaTarget-kpa > diff max then output is lookup up on open loop 6x6 (rpm,tps) map 7927 ** 7928 *************************************************************************** 7929 A1BC 7930 bcSetPoint equ tmp6 A1BC 7931 bcDelta equ tmp7 A1BC 7932 bcP equ tmp8 7933 7934 CalcBoostDC: 7935 A1BC B6C9 7936 lda kpa A1BE B1C8 7937 cmp Pambient A1C0 25F6 7938 blo boostZero ; If no boost sensed, don't burn 7939 ; up the solenoid. 7940 ; is this good or bad?? 7941 A1C2 B6D2 7942 lda bcCtlClock ; RTC-based updates. 7943 ; Would it be better to use engine revs A1C4 C1E00F 7944 cmp bcUpdate_f ; See if our clock has expired A1C7 25F2 7945 blo boostDone_dupe A1C9 3FD2 7946 clr bcCtlClock 7947 7948 ************************************************************************** 7949 ** Compute the target boost value based upon TPS and RPM 6x6 table 7950 ************************************************************************** 7951 7952 ; boost control ALWAYS page 8 A1CB 4E47D8 7953 mov tps,kpa_n ; (kpa_n also used in VE_STEP4) 7954 7955 ; brclr BoostTable3,feature8,BoostT1 A1CE C6E074 7956 lda feature8_f A1D1 A504 7957 bit #BoostTable3b A1D3 2703 7958 beq BoostT1 7959 A1D5 030330 7960 brclr NosIn,portd,Table3_Boost; If using Boost Table 3 and input 7961 ; low then its time to use it 7962 7963 ;bc1_STEP_1: 7964 BoostT1: A1D8 45E72A 7965 ldhx #TPSRANGEbc_f A1DB 3592 7966 sthx tmp1 A1DD 6E0594 7967 mov #$05,tmp3 ; 6x6 A1E0 4ED895 7968 mov kpa_n,tmp4 A1E3 CDD503 7969 jsr tableLookup A1E6 4E9699 7970 mov tmp5,tmp8 ; Index A1E9 4E929A 7971 mov tmp1,tmp9 ; X1 A1EC 4E939B 7972 mov tmp2,tmp10 ; X2 7973 7974 bc1_STEP_2: A1EF 45E724 7975 ldhx #RPMRANGEbc_f A1F2 3592 7976 sthx tmp1 A1F4 6E0594 7977 mov #$05,tmp3 ; 6x6 A1F7 4E4D95 7978 mov rpm,tmp4 A1FA CDD503 7979 jsr tableLookup A1FD 4E969C 7980 mov tmp5,tmp11 ; Index A200 4E929E 7981 mov tmp1,tmp13 ; X1 A203 4E939F 7982 mov tmp2,tmp14 ; X2 A206 2002 7983 bra bc1_STEP_3 7984 7985 Table3_Boost: A208 202F 7986 bra Table3_Boost_J ; Jump 7987 7988 bc1_STEP_3: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 73 MC68HC908GP32 User Bootloader A20A 8C 7989 clrh A20B AE06 7990 ldx #$06 ; 6x6 A20D B699 7991 lda tmp8 A20F 4A 7992 deca A210 42 7993 mul A211 BB9C 7994 add tmp11 A213 4A 7995 deca A214 97 7996 tax A215 macro 7997 bc1X A215 D6E700 7998 VE7XF: LDA BC_KPA_F,X 7999 VE7XC: A218 B7A0 8000 sta tmp15 A21A 5C 8001 incx A21B macro 8002 bc1X A21B D6E700 8003 VE7XF: LDA BC_KPA_F,X 8004 VE7XC: A21E B7A1 8005 sta tmp16 A220 AE06 8006 ldx #$06 ; 6x6 A222 B699 8007 lda tmp8 A224 42 8008 mul A225 BB9C 8009 add tmp11 A227 4A 8010 deca A228 97 8011 tax A229 macro 8012 bc1X A229 D6E700 8013 VE7XF: LDA BC_KPA_F,X 8014 VE7XC: A22C B7A2 8015 sta tmp17 A22E 5C 8016 incx A22F macro 8017 bc1X A22F D6E700 8018 VE7XF: LDA BC_KPA_F,X 8019 VE7XC: A232 B7A3 8020 sta tmp18 8021 A234 CDA17A 8022 jsr VE_STEP_4 A237 2030 8023 bra No_BTable_3_J 8024 ; result in tmp6, equ'd above to be bcSetPoint 8025 8026 ***************************************************************************** 8027 ** Extra Boost Target Table put in for switching over on the run 8028 ***************************************************************************** 8029 ; bc3_STEP_1: 8030 Table3_Boost_J: A239 45E78A 8031 ldhx #TPSRANGE3bc_f A23C 3592 8032 sthx tmp1 A23E 6E0594 8033 mov #$05,tmp3 ; 6x6 A241 4ED895 8034 mov kpa_n,tmp4 A244 CDD503 8035 jsr tableLookup A247 4E9699 8036 mov tmp5,tmp8 ; Index A24A 4E929A 8037 mov tmp1,tmp9 ; X1 A24D 4E939B 8038 mov tmp2,tmp10 ; X2 8039 8040 bc3_STEP_2: A250 45E784 8041 ldhx #RPMRANGE3bc_f A253 3592 8042 sthx tmp1 A255 6E0594 8043 mov #$05,tmp3 ; 6x6 A258 4E4D95 8044 mov rpm,tmp4 A25B CDD503 8045 jsr tableLookup A25E 4E969C 8046 mov tmp5,tmp11 ; Index A261 4E929E 8047 mov tmp1,tmp13 ; X1 A264 4E939F 8048 mov tmp2,tmp14 ; X2 A267 2002 8049 bra bc3_STEP_3 8050 8051 No_BTable_3_J: A269 202D 8052 bra No_BTable_3 ; Jump 8053 8054 bc3_STEP_3: A26B 8C 8055 clrh A26C AE06 8056 ldx #$06 ; 6x6 A26E B699 8057 lda tmp8 A270 4A 8058 deca A271 42 8059 mul A272 BB9C 8060 add tmp11 A274 4A 8061 deca A275 97 8062 tax A276 macro 8063 bc3X A276 D6E760 8064 VE9XF: LDA BC3_KPA_F,X 8065 VE9XC: A279 B7A0 8066 sta tmp15 A27B 5C 8067 incx A27C macro 8068 bc3X A27C D6E760 8069 VE9XF: LDA BC3_KPA_F,X 8070 VE9XC: A27F B7A1 8071 sta tmp16 A281 AE06 8072 ldx #$06 ; 6x6 A283 B699 8073 lda tmp8 A285 42 8074 mul A286 BB9C 8075 add tmp11 A288 4A 8076 deca A289 97 8077 tax A28A macro 8078 bc3X A28A D6E760 8079 VE9XF: LDA BC3_KPA_F,X 8080 VE9XC: A28D B7A2 8081 sta tmp17 A28F 5C 8082 incx A290 macro 8083 bc3X A290 D6E760 8084 VE9XF: LDA BC3_KPA_F,X 8085 VE9XC: A293 B7A3 8086 sta tmp18 A295 CDA17A 8087 jsr VE_STEP_4 8088 8089 No_BTable_3: 8090 ; result in tmp6, equ'd above to 8091 ; be bcSetPoint 8092 ***************************************************************************** 8093 ** Compute a delta for the current duty cycle. 8094 ***************************************************************************** 8095 ; The real boost controller, 8096 ; compute delta. A298 B697 8097 lda bcSetPoint A29A B0FE 8098 sub KnockBoost ; Subtract boost target with knock 8099 ; detection boost value A29C B797 8100 sta bcSetPoint 8101 8102 ***************************************************************************** 8103 ** 8104 ** Remove 1 psi of boost per user defined amount of IAT when IAT 8105 ** above setpoint 8106 ** 8107 ***************************************************************************** A29E 3FD9 8108 clr tmp31 A2A0 C6E087 8109 lda iatBoostSt_f A2A3 2735 8110 beq noBoostIAT ; If zero then dont go any further. A2A5 C6E088 8111 lda iatBoost_f ; load the temp per 1 psi to remove. A2A8 2730 8112 beq noBoostIAT ; If zero then dont go any further. A2AA 44 8113 lsra ; Shift bit pattern to the right 8114 ; (Divide by 2) A2AB 2401 8115 bcc no_carry_B ; Check if carry bit clear, 8116 ; skip increment 8117 A2AD 4C 8118 inca ; otherwise, increment accumulator 8119 8120 no_carry_B: A2AE B7DA 8121 sta tmp32 ; Stores half the iatDeg 8122 A2B0 B647 8123 lda tps A2B2 C1E089 8124 cmp tpsBooIAT_f ; Setpoint of tps for boost reduction msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 74 MC68HC908GP32 User Bootloader A2B5 2523 8125 blo noBoostIAT 8126 A2B7 C60104 8127 lda airTemp ; Actual IAT Temp A2BA C1E087 8128 cmp iatBoostSt_f ; Setpoint for start of Boost removal A2BD 251B 8129 blo noBoostIAT 8130 A2BF C0E087 8131 sub iatBoostSt_f ; How much higher are we? 8132 ; Leaves difference in accumulator A2C2 8C 8133 clrh ; Zero out high 8 bits of 16-bit 8134 ; H:X register 8135 ; Accumulator contains low 8 bits A2C3 CEE088 8136 ldx iatBoost_f ; Set divisor A2C6 52 8137 div ; (H:A) /X -> A, with rem in H 8138 A2C7 97 8139 tax ; Move quotient to index register A2C8 8B 8140 pshh ; Transfer remainder to accumulator A2C9 86 8141 pula A2CA B1DA 8142 cmp tmp32 ; See if the remainder is more 8143 ; than half of divisor A2CC 2501 8144 blo FinishBIAT A2CE 5C 8145 incx ; It was a big remainder, round up. 8146 FinishBIAT: A2CF A607 8147 lda #07T ; Multiply by 7 KPa (1PSI) A2D1 42 8148 mul A2D2 B7D9 8149 sta tmp31 ; Boost to remove A2D4 B697 8150 lda bcSetPoint A2D6 B0D9 8151 sub tmp31 A2D8 B797 8152 sta bcSetPoint ; New boost target 8153 noBoostIAT: 8154 8155 ***************************************************************************** 8156 ** Matt Dupuis idea 8157 ** if abs(target pressure - curr pressure ) > bc_max_diff 8158 ** then use bc_default duty cycle 8159 ** This can now make the controller open loop only by setting the 8160 ** max diff to zero 8161 ***************************************************************************** 8162 A2DA B6C9 8163 lda kpa ; Calc P for our PD controller. A2DC B097 8164 sub bcSetPoint ; result from interpolate tmp6 A2DE 2401 8165 bcc mboostPos A2E0 40 8166 nega 8167 mboostPos: A2E1 C1E07D 8168 cmp bc_max_diff A2E4 2243 8169 bhi boost_fixed 8170 8171 bc_eric: 8172 ;Originated Eric Fahlgren, closed loop method A2E6 1D41 8173 bclr bcTableUse,squirt A2E8 B6C9 8174 lda kpa ; Calc P for our PD controller. A2EA B097 8175 sub bcSetPoint ; result from interpolate tmp6 A2EC 2401 8176 bcc boostPos A2EE 40 8177 nega 8178 boostPos: A2EF CEE010 8179 ldx bcPgain_f ; Proportional Gain in percent, 8180 ; 255=100%. A2F2 42 8181 mul ; returns in x:a A2F3 BF99 8182 stx bcP ; just high byte 8183 ; bcP = abs(kpa-bcSetpoint) * (Pgain / 256) 8184 A2F5 B6C9 8185 lda kpa ; now calc 'kpadot' in here at 8186 ; same rate A2F7 B0CD 8187 sub kpalast A2F9 2401 8188 bcc kpadotPos A2FB 40 8189 nega 8190 kpadotPos: A2FC CEE011 8191 ldx bcDgain_f ; Differential Gain A2FF 42 8192 mul A300 9F 8193 txa A301 40 8194 nega ; = - abs(kpa-kpalast) * (dGain/255) 8195 A302 BB99 8196 add bcP A304 B798 8197 sta bcDelta ; p term - d term 8198 8199 ***************************************************************************** 8200 ** We now have a setpoint and a delta, so adjust the duty cycle. 8201 ***************************************************************************** 8202 A306 B6C9 8203 lda kpa A308 B197 8204 cmp bcSetPoint A30A 250A 8205 blo boostInc ; going up A30C 2000 8206 bra boostDec ; coming down 8207 8208 boostDec: A30E B6CC 8209 lda bcDC A310 B098 8210 sub bcDelta A312 250E 8211 bcs boostZero2 A314 200D 8212 bra boostSet 8213 8214 boostInc: A316 B6CC 8215 lda bcDC A318 BB98 8216 add bcDelta A31A 2502 8217 bcs boostRail A31C 2005 8218 bra boostSet 8219 8220 boostRail: A31E A6FF 8221 lda #255T A320 2001 8222 bra boostSet 8223 8224 boostZero2: A322 4F 8225 clra 8226 8227 boostSet: A323 B7CC 8228 sta bcDC 8229 boostDone: A325 4EC9CD 8230 mov kpa,kpalast A328 81 8231 rts 8232 8233 boost_fixed: 8234 ;lookup fixed duty cycle from table. 'out of range' open loop duty 8235 8236 ;boost control ALWAYS page 8 A329 1C41 8237 bset bcTableUse,squirt A32B 4E47D8 8238 mov tps,kpa_n ; (kpa_n also used in VE_STEP4) 8239 ;bc2_STEP_1: A32E 45E75A 8240 ldhx #TPSRANGEbc_f2 A331 3592 8241 sthx tmp1 A333 6E0594 8242 mov #$05,tmp3 ; 6x6 A336 4ED895 8243 mov kpa_n,tmp4 A339 CDD503 8244 jsr tableLookup A33C 4E9699 8245 mov tmp5,tmp8 ; Index A33F 4E929A 8246 mov tmp1,tmp9 ; Y1 A342 4E939B 8247 mov tmp2,tmp10 ; Y2 8248 8249 bc2_STEP_2: A345 45E754 8250 ldhx #RPMRANGEbc_f2 A348 3592 8251 sthx tmp1 A34A 6E0594 8252 mov #$05,tmp3 ; 6x6 A34D 4E4D95 8253 mov rpm,tmp4 A350 CDD503 8254 jsr tableLookup A353 4E969C 8255 mov tmp5,tmp11 ; Index A356 4E929E 8256 mov tmp1,tmp13 ; X1 A359 4E939F 8257 mov tmp2,tmp14 ; X2 8258 8259 bc2_STEP_3: 8260 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 75 MC68HC908GP32 User Bootloader A35C 8C 8261 clrh A35D AE06 8262 ldx #$06 ; 6x6 A35F B699 8263 lda tmp8 A361 4A 8264 deca A362 42 8265 mul A363 BB9C 8266 add tmp11 A365 4A 8267 deca A366 97 8268 tax A367 macro 8269 bc2X A367 D6E730 8270 VE8XF: LDA BC_DC_F,X 8271 VE8XC: A36A B7A0 8272 sta tmp15 A36C 5C 8273 incx A36D macro 8274 bc2X A36D D6E730 8275 VE8XF: LDA BC_DC_F,X 8276 VE8XC: A370 B7A1 8277 sta tmp16 A372 AE06 8278 ldx #$06 ; 6x6 A374 B699 8279 lda tmp8 A376 42 8280 mul A377 BB9C 8281 add tmp11 A379 4A 8282 deca A37A 97 8283 tax A37B macro 8284 bc2X A37B D6E730 8285 VE8XF: LDA BC_DC_F,X 8286 VE8XC: A37E B7A2 8287 sta tmp17 A380 5C 8288 incx A381 macro 8289 bc2X A381 D6E730 8290 VE8XF: LDA BC_DC_F,X 8291 VE8XC: A384 B7A3 8292 sta tmp18 8293 A386 CDA17A 8294 jsr VE_STEP_4 A389 4E97CC 8295 mov tmp6,bcDC A38C 4EC9CD 8296 mov kpa,kpalast A38F 81 8297 rts 8298 *************************************************************************** 8299 A390 8300 $MACRO TurnAllSpkOff ; gets called in stall or on 8301 ; entering bootloader mode 8302 ;turn spark outputs to inactive 8303 brclr invspk,EnhancedBits4,soin 8304 ; inverting easy, just put all to zero 8305 bclr iasc,porta 8306 bclr sled,portc 8307 bclr wled,portc 8308 bclr aled,portc 8309 bclr Output3,portd 8310 bclr pin10,portc 8311 bclr KnockIn,portd 8312 bra soin_done 8313 soin: ; non inv 8314 brset REUSE_FIDLE,outputpins,soin1 8315 bclr iasc,porta 8316 bra soin2 8317 soin1: bset iasc,porta 8318 soin2: brset REUSE_LED17,outputpins,soin3 8319 bclr sled,portc 8320 bra soin4 8321 soin3: bset sled,portc 8322 soin4: brset REUSE_LED19,outputpins,soin5 8323 bclr aled,portc 8324 bra soin6 8325 soin5: bset aled,portc 8326 soin6: brclr REUSE_LED18,outputpins,soin7 8327 brclr REUSE_LED18_2,outputpins,soin7 8328 bset wled,portc 8329 bra soin8 8330 soin7: bclr wled,portc 8331 soin8: 8332 brclr out3sparkd,feature2,soin9 8333 bset Output3,portd 8334 soin9: 8335 lda feature8_f 8336 bit #spkeopb 8337 beq soin10 8338 bset pin10,portc 8339 soin10: 8340 lda feature8_f 8341 bit #spkfopb 8342 beq soin11 8343 bset KnockIn,portd 8344 soin11: 8345 soin_done: 8346 8347 ;kill the dwell timers too just in case 8348 clr SparkOnLeftah 8349 clr SparkOnLeftal 8350 clr SparkOnLeftbh 8351 clr SparkOnLeftbl 8352 clr SparkOnLeftch 8353 clr SparkOnLeftcl 8354 clr SparkOnLeftdh 8355 clr SparkOnLeftdl 8356 clr SparkOnLefteh 8357 clr SparkOnLeftel 8358 clr SparkOnLeftfh 8359 clr SparkOnLeftfl 8360 A390 8361 $MACROEND 8362 8363 *************************************************************************** 8364 A390 8365 $MACRO SubDwell 8366 lda dwelltmpLop 8367 sub dwellusl ; dwell target calc'd just earlier 8368 sta dwelltmpLop ; temp result 8369 lda dwelltmpHop 8370 sbc dwellush 8371 sta dwelltmpHop 8372 lda dwelltmpXop 8373 sbc #0 8374 sta dwelltmpXop A390 8375 $MACROEND A390 8376 $MACRO DwellRail 8377 ; check if we've gone too low 8378 lda dwelltmpXop 8379 beq dwlnwchk 8380 bit #$80 8381 bne dwlnwrail ; gone negative. Rail. 8382 bra dwlnwok ; X byte>0 so dwell long enough 8383 dwlnwchk: 8384 lda dwelltmpHop 8385 bne dwlnwok ; H byte>0 so dwell long enough 8386 lda dwelltmpLop 8387 cmp mindischg_f 8388 bhs dwlnwok 8389 dwlnwrail: 8390 clr dwelltmpXop ; rail dwell delay at min discharge 8391 clr dwelltmpHop 8392 lda mindischg_f 8393 sta dwelltmpLop 8394 dwlnwok: A390 8395 $MACROEND 8396 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 76 MC68HC908GP32 User Bootloader A390 8397 $MACRO DwellDiv 8398 ;store result. Convert us to 0.1ms 8399 ; don't use udvd32 - wasteful, only need 24/8bit divide 8400 clrh 8401 ldx #100T 8402 lda dwelltmpXop 8403 div ;A rem H = (H:A) / X 8404 sta dwelltmpXms 8405 lda dwelltmpHop 8406 div 8407 sta dwelltmpHms 8408 lda dwelltmpLop 8409 div 8410 sta dwelltmpLms 8411 8412 lda dwelltmpXms 8413 beq dwlldend ; too long, rail to max 8414 lda #255T 8415 sta dwelltmpHms 8416 sta dwelltmpLms 8417 8418 dwlldend: 8419 8420 ;check for high speed when dwell and period may be close 8421 lda dwelltmpHms 8422 bne save_dwell 8423 8424 lda dwelltmpLms 8425 cmp mindischg_f ; check if less than minimum period 8426 bhi save_dwell 8427 dwell_lim: ; target dwell period>available period 8428 clr dwelltmpHms 8429 lda mindischg_f 8430 sta dwelltmpLms ; minimum X x 0.1ms non-dwell time 8431 8432 save_dwell: 8433 ;move calculation variable into variable used by CalcDwellspk 8434 ldhx dwelltmpHms A390 8435 $MACROEND 8436 8437 *************************************************************************** 8438 8439 turnallsparkoff: A390 macro 8440 TurnAllSpkOff A390 0D6B10 8441 BRCLR INVSPK,ENHANCEDBITS4,SOIN A393 1300 8442 BCLR IASC,PORTA A395 1102 8443 BCLR SLED,PORTC A397 1502 8444 BCLR WLED,PORTC A399 1302 8445 BCLR ALED,PORTC A39B 1103 8446 BCLR OUTPUT3,PORTD A39D 1702 8447 BCLR PIN10,PORTC A39F 1503 8448 BCLR KNOCKIN,PORTD A3A1 203E 8449 BRA SOIN_DONE 8450 SOIN: A3A3 006404 8451 BRSET REUSE_FIDLE,OUTPUTPINS,SOIN1 A3A6 1300 8452 BCLR IASC,PORTA A3A8 2002 8453 BRA SOIN2 A3AA 1200 8454 SOIN1: BSET IASC,PORTA A3AC 026404 8455 SOIN2: BRSET REUSE_LED17,OUTPUTPINS,SOIN3 A3AF 1102 8456 BCLR SLED,PORTC A3B1 2002 8457 BRA SOIN4 A3B3 1002 8458 SOIN3: BSET SLED,PORTC A3B5 086404 8459 SOIN4: BRSET REUSE_LED19,OUTPUTPINS,SOIN5 A3B8 1302 8460 BCLR ALED,PORTC A3BA 2002 8461 BRA SOIN6 A3BC 1202 8462 SOIN5: BSET ALED,PORTC A3BE 056407 8463 SOIN6: BRCLR REUSE_LED18,OUTPUTPINS,SOIN7 A3C1 076404 8464 BRCLR REUSE_LED18_2,OUTPUTPINS,SOIN7 A3C4 1402 8465 BSET WLED,PORTC A3C6 2002 8466 BRA SOIN8 A3C8 1502 8467 SOIN7: BCLR WLED,PORTC 8468 SOIN8: A3CA 096602 8469 BRCLR OUT3SPARKD,FEATURE2,SOIN9 A3CD 1003 8470 BSET OUTPUT3,PORTD 8471 SOIN9: A3CF C6E074 8472 LDA FEATURE8_F A3D2 A508 8473 BIT #SPKEOPB A3D4 2702 8474 BEQ SOIN10 A3D6 1602 8475 BSET PIN10,PORTC 8476 SOIN10: A3D8 C6E074 8477 LDA FEATURE8_F A3DB A510 8478 BIT #SPKFOPB A3DD 2702 8479 BEQ SOIN11 A3DF 1403 8480 BSET KNOCKIN,PORTD 8481 SOIN11: 8482 SOIN_DONE: A3E1 3FB1 8483 CLR SPARKONLEFTAH A3E3 3FB2 8484 CLR SPARKONLEFTAL A3E5 3FB3 8485 CLR SPARKONLEFTBH A3E7 3FB4 8486 CLR SPARKONLEFTBL A3E9 3FB5 8487 CLR SPARKONLEFTCH A3EB 3FB6 8488 CLR SPARKONLEFTCL A3ED 3FB7 8489 CLR SPARKONLEFTDH A3EF 3FB8 8490 CLR SPARKONLEFTDL A3F1 3FB9 8491 CLR SPARKONLEFTEH A3F3 3FBA 8492 CLR SPARKONLEFTEL A3F5 3FBB 8493 CLR SPARKONLEFTFH A3F7 3FBC 8494 CLR SPARKONLEFTFL A3F9 81 8495 rts 8496 *************************************************************************** 8497 * Spark and Dwell stuff 8498 * Some bits moved out of interrupt routines to save a few ticks 8499 *************************************************************************** 8500 * The following table is a dwell period vs battery voltage correction table 8501 * derived from 8502 * T = -L/R * ln(1- RI/V) 8503 *************************************************************************** 8504 A3FA 33445566 8505 dwelltv: db 51T,68T,85T,102T,119T,136T ; 6v,8v,10v,12v,14v,16v 7788 A400 FA7C5440 8506 dwelltf: db 250T,124T,84T,64T,51T,44T 332C 8507 ;Values in table are /4 (i.e. 250 = 250/256*4 = x 3.9) 8508 8509 misc_spark: A406 004200 8510 brset running,engine,hei7_spd ; skip next check 8511 ;if not running then make sure all spark outputs are OFF 8512 ;this is a bandaid, but better safe than sorry 8513 ; TurnAllSpkOff ; macro to stop them all - moved to mainloop 8514 ; 8515 hei7_spd: 8516 ;moved from Sparktime - set/clr HEI7 output A409 0F6312 8517 brclr HEI7,personality,dwellornot 8518 ;024a changed the logic, now transitions when fully out of crank (+1 second) 8519 ; and over 400rpm A40C 02420D 8520 brset crank,engine,hei7zero 8521 ;cant_crank only gets set when above cranking rpm for over a second A40F 07690A 8522 brclr cant_crank,EnhancedBits2,hei7zero A412 B64D 8523 lda rpm A414 A104 8524 cmp #4T ; hardcoded 400rpm transisition A416 2504 8525 blo hei7zero 8526 hei7five: A418 1302 8527 bclr aled,portc A41A 2002 8528 bra dwellornot 8529 hei7zero: 8530 ;If HEI and low speed set bypass to 0v msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 77 MC68HC908GP32 User Bootloader A41C 1202 8531 bset aled,portc 8532 8533 dwellornot: A41E 036746 8534 brclr dwellcont,feature7,ms_dwell ; skip if not doing real dwell 8535 8536 ;first lookup battery correction factor from above table A421 45A3FA 8537 ldhx #dwelltv A424 3592 8538 sthx tmp1 A426 6E0594 8539 mov #5,tmp3 ; 6 elements A429 4E4895 8540 mov batt,tmp4 A42C CDD503 8541 jsr tableLookup 8542 A42F 8C 8543 clrh A430 BE96 8544 ldx tmp5 A432 D6A400 8545 lda dwelltf,x A435 B795 8546 sta liY2 A437 5A 8547 decx A438 D6A400 8548 lda dwelltf,x A43B B794 8549 sta liY1 A43D B648 8550 lda batt A43F B796 8551 sta liX A441 CDD51E 8552 jsr LinInterp 8553 ;result in tmp6 8554 A444 024205 8555 brset crank,engine,crankdwell 8556 A447 C6E06F 8557 lda dwellrun_f A44A 2003 8558 bra dwell_corr 8559 crankdwell: A44C C6E06E 8560 lda dwellcrank_f 8561 dwell_corr: A44F BE97 8562 ldx tmp6 A451 42 8563 mul ; result in x:a 8564 ;now multiply by 4 as factor table is /4 and dwell in 0.1ms units 8565 A452 48 8566 lsla A453 59 8567 rolx A454 2504 8568 bcs max_dwell 8569 A456 48 8570 lsla A457 59 8571 rolx A458 2402 8572 bcc do_dwell_us 8573 8574 max_dwell: A45A AEFF 8575 ldx #255T ; max dwell 25.5ms 8576 do_dwell_us: A45C BFF4 8577 stx dwelldms ; save corrected target dwell 8578 ; (in 0.1ms units) 8579 8580 ;calculate this in us A45E A664 8581 lda #100T A460 42 8582 mul 8583 A461 9B 8584 sei ; no ints while we save these A462 BFF5 8585 stx dwellush ; this is the microsecond duration of coil-on A464 B7F6 8586 sta dwellusl A466 9A 8587 cli 8588 8589 ; we've now calculated target dwell period 8590 8591 ;used by dwell and duty cycle 8592 ms_dwell: A467 9B 8593 sei ; avoid interruption between high/low bytes A468 4EAC93 8594 mov iTimeX,dwelltmpX ; dt-1 A46B 4EAD94 8595 mov iTimeH,dwelltmpH A46E 4EAE95 8596 mov iTimeL,dwelltmpL A471 4EF99D 8597 mov iTimepX,dwelltmpXp ; dt-2 A474 4EFA9E 8598 mov iTimepH,dwelltmpHp A477 4EFB9F 8599 mov iTimepL,dwelltmpLp A47A 9A 8600 cli 8601 8602 ;For a single period, can.. 8603 ;predict this period iTime[this] = itime[last]) + (itime[last] - itime[previous]) 8604 ;calculate acceleration factor (itime[last] - itime[previous]) and store in dwelltmp?ac 8605 ;024n sense changed now +ve is accel, -ve is decel. Unlikely to make any difference, but 8606 ;worth a try 8607 8608 ;025n7, try reversing sense as it was doing more harm than good 8609 ;somehow I'd got the sense wrong. 8610 A47B B69F 8611 lda dwelltmpLp A47D B095 8612 sub dwelltmpL A47F B7A7 8613 sta dwelltmpLac ; ddt A481 B69E 8614 lda dwelltmpHp A483 B294 8615 sbc dwelltmpH A485 B7A6 8616 sta dwelltmpHac A487 B69D 8617 lda dwelltmpXp A489 B293 8618 sbc dwelltmpX A48B B7A5 8619 sta dwelltmpXac 8620 8621 8622 8623 ;when in accel double the correction factor to compensate for increasing 8624 ; advance etc. and to err on the side of a bit more dwell 8625 ; brclr 7,dwelltmpXac,not_dwell_accel ; if positive i.e. decel 8626 ; lsl dwelltmpLac 8627 ; rol dwelltmpHac 8628 ; rol dwelltmpXac 8629 8630 not_dwell_accel: 8631 ;dwelltmp?ac now contains the acceleration factor (-ddt) 8632 ;re-write of this whole next section (025i) 8633 ; instead of doing some calcs and then branching, have one big section of code for each 8634 ; option. Code space isn't a problem. Brain space is! 8635 ; Various code options. 8636 ; "dwell" duty cycle for 1,2,3,4 outputs - this is pretty much the earlier 8637 ; dwell control for 1,2,3,4, rotary2 outputs 8638 8639 A48D 036703 8640 brclr dwellcont,feature7,dwell_duty_calc A490 CCA650 8641 jmp true_dwell_calc 8642 dwell_duty_calc: A493 066B03 8643 brset wspk,EnhancedBits4,wasted_dwell ; wasted spark/multi-outputs 8644 ;just add on (-ddt) A496 CCA5A8 8645 jmp dwlprdcalc 8646 8647 wasted_dwell: 8648 8649 ;see how many periods we want to dwell across 8650 ;Here we'll predict period between sparks on a channel 8651 ; we wait 360 degrees (could be 720 actually if someone does 4cyl COP) 8652 ;Would be desireable to go "back" only enough periods to give greater accuracy 8653 8654 ;for waste spark outputs need to add lots more correction factor 8655 ; 2 outputs = 3x 8656 ; 3 outputs = 6x 8657 ; 4 outputs = 10x 8658 ; all assumes uniform acceleration 8659 ;residue of old code, checks how many outputs 8660 ;for now always calc all periods 8661 8662 ;5th and 6th A499 C6E074 8663 lda feature8_f A49C A510 8664 bit #spkfopb A49E 264F 8665 bne jcd_6dd A4A0 A508 8666 bit #spkeopb msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 78 MC68HC908GP32 User Bootloader A4A2 2648 8667 bne jcd_5dd 8668 ;check if 4th spark output in use A4A4 086642 8669 brset out3sparkd,feature2,jcd_4dd ; if 4 ops 8670 ;check if 3rd spark output in use 8671 ;don't check for 2nd output, wouldn't have got here otherwise A4A7 056448 8672 brclr REUSE_LED18,outputpins,cd_2dd ; want 1 } spark c A4AA 076445 8673 brclr REUSE_LED18_2,outputpins,cd_2dd ; want 1 } 8674 cd_3dd: 8675 ;3 periods = 3dt-1 + 3ddt 8676 ;3x dt-1 8677 ;save a copy in dwelltmp?p A4AD 4E959F 8678 mov dwelltmpL,dwelltmpLp A4B0 4E949E 8679 mov dwelltmpH,dwelltmpHp A4B3 4E939D 8680 mov dwelltmpX,dwelltmpXp 8681 A4B6 3895 8682 lsl dwelltmpL A4B8 3994 8683 rol dwelltmpH A4BA 3993 8684 rol dwelltmpX 8685 A4BC B695 8686 lda dwelltmpL A4BE BB9F 8687 add dwelltmpLp A4C0 B795 8688 sta dwelltmpL A4C2 B694 8689 lda dwelltmpH A4C4 B99E 8690 adc dwelltmpHp A4C6 B794 8691 sta dwelltmpH A4C8 B693 8692 lda dwelltmpX A4CA B99D 8693 adc dwelltmpXp A4CC B793 8694 sta dwelltmpX 8695 8696 ;2x ddt A4CE 38A7 8697 lsl dwelltmpLac A4D0 39A6 8698 rol dwelltmpHac A4D2 39A5 8699 rol dwelltmpXac 8700 ;+ ddt A4D4 B695 8701 lda dwelltmpL A4D6 BBA7 8702 add dwelltmpLac A4D8 B795 8703 sta dwelltmpL A4DA B694 8704 lda dwelltmpH A4DC B9A6 8705 adc dwelltmpHac A4DE B794 8706 sta dwelltmpH A4E0 B693 8707 lda dwelltmpX A4E2 B9A5 8708 adc dwelltmpXac A4E4 B793 8709 sta dwelltmpX 8710 A4E6 CCA5A8 8711 jmp dwlprdcalc 8712 A4E9 CCA501 8713 jcd_4dd: jmp cd_4dd A4EC CCA51C 8714 jcd_5dd: jmp cd_5dd A4EF CCA563 8715 jcd_6dd: jmp cd_6dd 8716 8717 cd_2dd: 8718 ;2 periods = 2dt-1 + 2ddt 8719 ;2x dt-1 A4F2 3895 8720 lsl dwelltmpL A4F4 3994 8721 rol dwelltmpH A4F6 3993 8722 rol dwelltmpX 8723 ;2x ddt A4F8 38A7 8724 lsl dwelltmpLac A4FA 39A6 8725 rol dwelltmpHac A4FC 39A5 8726 rol dwelltmpXac 8727 A4FE CCA5A8 8728 jmp dwlprdcalc 8729 8730 cd_4dd: 8731 ;4 periods = 4dt-1 + 4ddt 8732 ;4x dt-1 A501 3895 8733 lsl dwelltmpL A503 3994 8734 rol dwelltmpH A505 3993 8735 rol dwelltmpX 8736 A507 3895 8737 lsl dwelltmpL A509 3994 8738 rol dwelltmpH A50B 3993 8739 rol dwelltmpX 8740 ;4x ddt A50D 38A7 8741 lsl dwelltmpLac A50F 39A6 8742 rol dwelltmpHac A511 39A5 8743 rol dwelltmpXac 8744 A513 38A7 8745 lsl dwelltmpLac A515 39A6 8746 rol dwelltmpHac A517 39A5 8747 rol dwelltmpXac 8748 8749 A519 CCA5A8 8750 jmp dwlprdcalc 8751 8752 cd_5dd: 8753 ;5 periods = 5dt-1 + 5ddt 8754 ;3x dt-1 8755 ;save a copy in dwelltmp?p A51C 4E959F 8756 mov dwelltmpL,dwelltmpLp A51F 4E949E 8757 mov dwelltmpH,dwelltmpHp A522 4E939D 8758 mov dwelltmpX,dwelltmpXp 8759 A525 3895 8760 lsl dwelltmpL A527 3994 8761 rol dwelltmpH A529 3993 8762 rol dwelltmpX 8763 A52B 3895 8764 lsl dwelltmpL A52D 3994 8765 rol dwelltmpH A52F 3993 8766 rol dwelltmpX 8767 A531 B695 8768 lda dwelltmpL A533 BB9F 8769 add dwelltmpLp A535 B795 8770 sta dwelltmpL A537 B694 8771 lda dwelltmpH A539 B99E 8772 adc dwelltmpHp A53B B794 8773 sta dwelltmpH A53D B693 8774 lda dwelltmpX A53F B99D 8775 adc dwelltmpXp A541 B793 8776 sta dwelltmpX 8777 8778 ;2x ddt A543 38A7 8779 lsl dwelltmpLac A545 39A6 8780 rol dwelltmpHac A547 39A5 8781 rol dwelltmpXac 8782 ;2x ddt A549 38A7 8783 lsl dwelltmpLac A54B 39A6 8784 rol dwelltmpHac A54D 39A5 8785 rol dwelltmpXac 8786 8787 ;+ ddt A54F B695 8788 lda dwelltmpL A551 BBA7 8789 add dwelltmpLac A553 B795 8790 sta dwelltmpL A555 B694 8791 lda dwelltmpH A557 B9A6 8792 adc dwelltmpHac A559 B794 8793 sta dwelltmpH A55B B693 8794 lda dwelltmpX A55D B9A5 8795 adc dwelltmpXac A55F B793 8796 sta dwelltmpX 8797 A561 2045 8798 bra dwlprdcalc 8799 8800 cd_6dd: 8801 ;same as 3dd x 2 8802 ;3 periods = 3dt-1 + 3ddt msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 79 MC68HC908GP32 User Bootloader 8803 ;3x dt-1 8804 ;save a copy in dwelltmp?p A563 4E959F 8805 mov dwelltmpL,dwelltmpLp A566 4E949E 8806 mov dwelltmpH,dwelltmpHp A569 4E939D 8807 mov dwelltmpX,dwelltmpXp 8808 A56C 3895 8809 lsl dwelltmpL A56E 3994 8810 rol dwelltmpH A570 3993 8811 rol dwelltmpX 8812 A572 B695 8813 lda dwelltmpL A574 BB9F 8814 add dwelltmpLp A576 B795 8815 sta dwelltmpL A578 B694 8816 lda dwelltmpH A57A B99E 8817 adc dwelltmpHp A57C B794 8818 sta dwelltmpH A57E B693 8819 lda dwelltmpX A580 B99D 8820 adc dwelltmpXp A582 B793 8821 sta dwelltmpX 8822 8823 ;2x ddt A584 38A7 8824 lsl dwelltmpLac A586 39A6 8825 rol dwelltmpHac A588 39A5 8826 rol dwelltmpXac 8827 ;+ ddt A58A B695 8828 lda dwelltmpL A58C BBA7 8829 add dwelltmpLac A58E B795 8830 sta dwelltmpL A590 B694 8831 lda dwelltmpH A592 B9A6 8832 adc dwelltmpHac A594 B794 8833 sta dwelltmpH A596 B693 8834 lda dwelltmpX A598 B9A5 8835 adc dwelltmpXac A59A B793 8836 sta dwelltmpX 8837 8838 ;double it A59C 3895 8839 lsl dwelltmpL ; high byte A59E 3994 8840 rol dwelltmpH ; Divide by 2 to get 50% dwell A5A0 3993 8841 rol dwelltmpX 8842 ;double it A5A2 38A7 8843 lsl dwelltmpLac A5A4 39A6 8844 rol dwelltmpHac A5A6 39A5 8845 rol dwelltmpXac 8846 8847 ; bra dwlprdcalc 8848 8849 8850 dwlprdcalc: 8851 ;add off the accel factor (-ve) A5A8 B695 8852 lda dwelltmpL A5AA BBA7 8853 add dwelltmpLac A5AC B795 8854 sta dwelltmpL A5AE B694 8855 lda dwelltmpH A5B0 B9A6 8856 adc dwelltmpHac A5B2 B794 8857 sta dwelltmpH A5B4 B693 8858 lda dwelltmpX A5B6 B9A5 8859 adc dwelltmpXac A5B8 B793 8860 sta dwelltmpX 8861 8862 ;dwelltmp? now contains the predicted period between sparks on one ignition channel 8863 ;for single coil this is an ignition event, for wasted spark this is 360 or even 720 8864 ;we've now calculated the full period to dwell over so decide what to do with it 8865 8866 ;save an un-mutilated copy for rotary A5BA 4E93A5 8867 mov dwelltmpX,dwelltmpXac A5BD 4E94A6 8868 mov dwelltmpH,dwelltmpHac A5C0 4E95A7 8869 mov dwelltmpL,dwelltmpLac 8870 A5C3 3493 8871 lsr dwelltmpX ; high byte A5C5 3694 8872 ror dwelltmpH ; Divide by 2 to get 50% dwell A5C7 3695 8873 ror dwelltmpL 8874 ; 8875 ; original MSnS code uses 75%, but there was discussion that 50% might be 8876 ; more suitable for some ignition setups, so I changed it. Now made a 8877 ; config option. 8878 ; A5C9 0C6606 8879 brset dwellduty50,feature2,end_dwell A5CC 3493 8880 lsr dwelltmpX A5CE 3694 8881 ror dwelltmpH A5D0 3695 8882 ror dwelltmpL ; divide by 2 again to get 75% dwell 8883 8884 end_dwell: 8885 ;now convert the precision calculation into a raw 0.1ms value 8886 ;use by both dwell and duty cylce outputs 8887 8888 ; don't use udvd32 - wasteful, only need 24/8bit divide A5D2 8C 8889 clrh A5D3 AE64 8890 ldx #100T A5D5 B693 8891 lda dwelltmpX A5D7 52 8892 div ;A rem H = (H:A) / X A5D8 B793 8893 sta dwelltmpX 8894 8895 ; to drive Saab DI cassette, comment out the following 6 lines and uncomment out the next 4 A5DA B694 8896 lda dwelltmpH A5DC 52 8897 div A5DD B794 8898 sta dwelltmpH A5DF B695 8899 lda dwelltmpL A5E1 52 8900 div A5E2 B795 8901 sta dwelltmpL 8902 ; try to drive Saab DI ;kg 8903 ; clra ;kg 8904 ; sta dwelltmpH ;kg 8905 ; lda #16T ;kg 8906 ; sta dwelltmpL ;kg 8907 A5E4 B693 8908 lda dwelltmpX A5E6 2706 8909 beq dwelldiv_end ; too long, rail to max A5E8 A6FF 8910 lda #255T A5EA B794 8911 sta dwelltmpH A5EC B795 8912 sta dwelltmpL 8913 8914 dwelldiv_end: 8915 8916 ; decide where to save it given new scheme A5EE 5594 8917 ldhx dwelltmpH A5F0 006C22 8918 brset rotary2,EnhancedBits5,sd_1 ; are we doing rotary split A5F3 076B1F 8919 brclr wspk,EnhancedBits4,sd_1 ; or non-wasted, then single output A5F6 C6E074 8920 lda feature8_f A5F9 A510 8921 bit #spkfopb A5FB 2641 8922 bne sd_6 A5FD A508 8923 bit #spkeopb A5FF 262E 8924 bne sd_5 8925 ;check if 4th spark output in use A601 08661E 8926 brset out3sparkd,feature2,sd_4 ; if 4 ops 8927 ;check if 3rd spark output in use 8928 ;don't check for 2nd output, wouldn't have got here otherwise A604 056412 8929 brclr REUSE_LED18,outputpins,sd_2 ; want 1 } spark c A607 07640F 8930 brclr REUSE_LED18_2,outputpins,sd_2 ; want 1 } 8931 sd_3: A60A 35E8 8932 sthx dwelldelay3 A60C 450000 8933 ldhx #0 A60F 35E4 8934 sthx dwelldelay1 A611 35E6 8935 sthx dwelldelay2 A613 2038 8936 bra sd_done 8937 sd_1: A615 35E4 8938 sthx dwelldelay1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 80 MC68HC908GP32 User Bootloader A617 2034 8939 bra sd_done 8940 8941 sd_2: A619 35E6 8942 sthx dwelldelay2 A61B 450000 8943 ldhx #0 A61E 35E4 8944 sthx dwelldelay1 A620 202B 8945 bra sd_done 8946 8947 sd_4: A622 35EA 8948 sthx dwelldelay4 A624 450000 8949 ldhx #0 A627 35E4 8950 sthx dwelldelay1 A629 35E6 8951 sthx dwelldelay2 A62B 35E8 8952 sthx dwelldelay3 A62D 201E 8953 bra sd_done 8954 sd_5: A62F 35EC 8955 sthx dwelldelay5 A631 450000 8956 ldhx #0 A634 35E4 8957 sthx dwelldelay1 A636 35E6 8958 sthx dwelldelay2 A638 35E8 8959 sthx dwelldelay3 A63A 35EA 8960 sthx dwelldelay4 A63C 200F 8961 bra sd_done 8962 sd_6: A63E 35EE 8963 sthx dwelldelay6 A640 450000 8964 ldhx #0 A643 35E4 8965 sthx dwelldelay1 A645 35E6 8966 sthx dwelldelay2 A647 35E8 8967 sthx dwelldelay3 A649 35EA 8968 sthx dwelldelay4 A64B 35EC 8969 sthx dwelldelay5 8970 ; bra sd_done 8971 sd_done: A64D CCAADB 8972 jmp really_done_dwell 8973 8974 8975 8976 true_dwell_calc: 8977 ; One section of code depending on number of spark outputs now 8978 ; so code can apply delay of 1,2,3,4 periods back depending on rpm/advance 8979 ; this is supposed to improve dwell stability at medium speeds when engine conditions 8980 ; could have changed a lot between setting the dwell timer and the dwell starting. 8981 8982 ; Fixed duty cycle doesn't really need this lot as we always "dwell" across the whole time 8983 ; between sparks on one channel. 8984 ; Most of the comments in here are related to real dwell control. 8985 8986 ;dwellduty1 = dt-1 + acc factor - dwell dt-1 + ddt 8987 ;dwellduty2 = dwellduty1 + dt-1 + ac + ac 2dt-1 + 3ddt 8988 ;dwellduty3 = dwellduty2 + dt-1 + ac + 2ac 3dt-1 + 6ddt 8989 ;dwellduty4 = dwellduty3 + dt-1 + 4ac 4dt-1 + 10ddt 8990 8991 ;But the massive loads of correction factor seemed to do more harm than good, 8992 ;dwellduty1 = dt-1 + acc factor - dwell dt-1 + ddt 8993 ;dwellduty2 = dwellduty1 + dt-1 + ac + ac 2dt-1 + 2ddt 8994 ;dwellduty3 = dwellduty2 + dt-1 + ac + 2ac 3dt-1 + 3ddt 8995 ;dwellduty4 = dwellduty3 + dt-1 + 4ac 4dt-1 + 4ddt 8996 8997 ;add off the accel factor (-ve) dt = dt-1 + (-ddt) (predicted next period) A650 B695 8998 lda dwelltmpL ; dt-1 A652 BBA7 8999 add dwelltmpLac ; ac A654 B79F 9000 sta dwelltmpLp ; used if wspk A656 B798 9001 sta dwelltmpLop ; output value A658 B694 9002 lda dwelltmpH A65A B9A6 9003 adc dwelltmpHac A65C B79E 9004 sta dwelltmpHp A65E B797 9005 sta dwelltmpHop A660 B693 9006 lda dwelltmpX A662 B9A5 9007 adc dwelltmpXac A664 B79D 9008 sta dwelltmpXp A666 B796 9009 sta dwelltmpXop 9010 A668 macro 9011 SubDwell ; subtract dwell A668 B698 9012 LDA DWELLTMPLOP A66A B0F6 9013 SUB DWELLUSL A66C B798 9014 STA DWELLTMPLOP A66E B697 9015 LDA DWELLTMPHOP A670 B2F5 9016 SBC DWELLUSH A672 B797 9017 STA DWELLTMPHOP A674 B696 9018 LDA DWELLTMPXOP A676 A200 9019 SBC #0 A678 B796 9020 STA DWELLTMPXOP 9021 A67A 006C03 9022 brset rotary2,EnhancedBits5,cd0 A67D 066B53 9023 brset wspk,EnhancedBits4,cd1_start 9024 9025 cd0: 9026 ;we are either have one spark output or rotary. We dwell across a single period only. A680 macro 9027 DwellRail ; check if negative or less than mindischarge A680 B696 9028 LDA DWELLTMPXOP A682 2706 9029 BEQ DWLNWCHK A684 A580 9030 BIT #$80 A686 260D 9031 BNE DWLNWRAIL A688 2014 9032 BRA DWLNWOK 9033 DWLNWCHK: A68A B697 9034 LDA DWELLTMPHOP A68C 2610 9035 BNE DWLNWOK A68E B698 9036 LDA DWELLTMPLOP A690 C1E08F 9037 CMP MINDISCHG_F A693 2409 9038 BHS DWLNWOK 9039 DWLNWRAIL: A695 3F96 9040 CLR DWELLTMPXOP A697 3F97 9041 CLR DWELLTMPHOP A699 C6E08F 9042 LDA MINDISCHG_F A69C B798 9043 STA DWELLTMPLOP 9044 DWLNWOK: A69E macro 9045 DwellDiv ; convert microseconds to 0.1ms units A69E 8C 9046 CLRH A69F AE64 9047 LDX #100T A6A1 B696 9048 LDA DWELLTMPXOP A6A3 52 9049 DIV A6A4 B799 9050 STA DWELLTMPXMS A6A6 B697 9051 LDA DWELLTMPHOP A6A8 52 9052 DIV A6A9 B79A 9053 STA DWELLTMPHMS A6AB B698 9054 LDA DWELLTMPLOP A6AD 52 9055 DIV A6AE B79B 9056 STA DWELLTMPLMS A6B0 B699 9057 LDA DWELLTMPXMS A6B2 2706 9058 BEQ DWLLDEND A6B4 A6FF 9059 LDA #255T A6B6 B79A 9060 STA DWELLTMPHMS A6B8 B79B 9061 STA DWELLTMPLMS 9062 DWLLDEND: A6BA B69A 9063 LDA DWELLTMPHMS A6BC 260E 9064 BNE SAVE_DWELL A6BE B69B 9065 LDA DWELLTMPLMS A6C0 C1E08F 9066 CMP MINDISCHG_F A6C3 2207 9067 BHI SAVE_DWELL 9068 DWELL_LIM: A6C5 3F9A 9069 CLR DWELLTMPHMS A6C7 C6E08F 9070 LDA MINDISCHG_F A6CA B79B 9071 STA DWELLTMPLMS 9072 SAVE_DWELL: A6CC 559A 9073 LDHX DWELLTMPHMS A6CE 35E4 9074 sthx dwelldelay1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 81 MC68HC908GP32 User Bootloader A6D0 CCAADB 9075 jmp really_done_dwell 9076 9077 cd1_start: 9078 ;check to see if value we _would_ store in dwelldelay1 is negative 9079 ; ie. top bit set A6D3 B696 9080 lda dwelltmpXop A6D5 2B32 9081 bmi cd_1rail ; if pos ok, else set to zero ?? is BMI correct? A6D7 macro 9082 DwellDiv A6D7 8C 9083 CLRH A6D8 AE64 9084 LDX #100T A6DA B696 9085 LDA DWELLTMPXOP A6DC 52 9086 DIV A6DD B799 9087 STA DWELLTMPXMS A6DF B697 9088 LDA DWELLTMPHOP A6E1 52 9089 DIV A6E2 B79A 9090 STA DWELLTMPHMS A6E4 B698 9091 LDA DWELLTMPLOP A6E6 52 9092 DIV A6E7 B79B 9093 STA DWELLTMPLMS A6E9 B699 9094 LDA DWELLTMPXMS A6EB 2706 9095 BEQ DWLLDEND A6ED A6FF 9096 LDA #255T A6EF B79A 9097 STA DWELLTMPHMS A6F1 B79B 9098 STA DWELLTMPLMS 9099 DWLLDEND: A6F3 B69A 9100 LDA DWELLTMPHMS A6F5 260E 9101 BNE SAVE_DWELL A6F7 B69B 9102 LDA DWELLTMPLMS A6F9 C1E08F 9103 CMP MINDISCHG_F A6FC 2207 9104 BHI SAVE_DWELL 9105 DWELL_LIM: A6FE 3F9A 9106 CLR DWELLTMPHMS A700 C6E08F 9107 LDA MINDISCHG_F A703 B79B 9108 STA DWELLTMPLMS 9109 SAVE_DWELL: A705 559A 9110 LDHX DWELLTMPHMS A707 2003 9111 bra cd_1store 9112 cd_1rail: A709 450000 9113 ldhx #0 9114 cd_1store: A70C 35E4 9115 sthx dwelldelay1 9116 cd_2: 9117 ;dd2 = dd1 +dt-1 + ac + ac A70E B69F 9118 lda dwelltmpLp ; period without dwell removed A710 BB95 9119 add dwelltmpL A712 B79F 9120 sta dwelltmpLp ; now 2 periods ready for next calc A714 B798 9121 sta dwelltmpLop A716 B69E 9122 lda dwelltmpHp A718 B994 9123 adc dwelltmpH A71A B79E 9124 sta dwelltmpHp A71C B797 9125 sta dwelltmpHop A71E B69D 9126 lda dwelltmpXp A720 B993 9127 adc dwelltmpX A722 B79D 9128 sta dwelltmpXp A724 B796 9129 sta dwelltmpXop 9130 A726 B698 9131 lda dwelltmpLop A728 BBA7 9132 add dwelltmpLac A72A B798 9133 sta dwelltmpLop A72C B697 9134 lda dwelltmpHop A72E B9A6 9135 adc dwelltmpHac A730 B797 9136 sta dwelltmpHop A732 B696 9137 lda dwelltmpXop A734 B9A5 9138 adc dwelltmpXac A736 B796 9139 sta dwelltmpXop 9140 A738 macro 9141 SubDwell ; subtract dwell A738 B698 9142 LDA DWELLTMPLOP A73A B0F6 9143 SUB DWELLUSL A73C B798 9144 STA DWELLTMPLOP A73E B697 9145 LDA DWELLTMPHOP A740 B2F5 9146 SBC DWELLUSH A742 B797 9147 STA DWELLTMPHOP A744 B696 9148 LDA DWELLTMPXOP A746 A200 9149 SBC #0 A748 B796 9150 STA DWELLTMPXOP 9151 A74A 056405 9152 brclr REUSE_LED18,outputpins,cd2_done ; want 1 } spark c A74D 076402 9153 brclr REUSE_LED18_2,outputpins,cd2_done ; want 1 } A750 2053 9154 bra cd2_cont 9155 cd2_done: A752 macro 9156 DwellRail ; check if negative or less than mindischarge A752 B696 9157 LDA DWELLTMPXOP A754 2706 9158 BEQ DWLNWCHK A756 A580 9159 BIT #$80 A758 260D 9160 BNE DWLNWRAIL A75A 2014 9161 BRA DWLNWOK 9162 DWLNWCHK: A75C B697 9163 LDA DWELLTMPHOP A75E 2610 9164 BNE DWLNWOK A760 B698 9165 LDA DWELLTMPLOP A762 C1E08F 9166 CMP MINDISCHG_F A765 2409 9167 BHS DWLNWOK 9168 DWLNWRAIL: A767 3F96 9169 CLR DWELLTMPXOP A769 3F97 9170 CLR DWELLTMPHOP A76B C6E08F 9171 LDA MINDISCHG_F A76E B798 9172 STA DWELLTMPLOP 9173 DWLNWOK: A770 macro 9174 DwellDiv ; convert microseconds to 0.1ms units A770 8C 9175 CLRH A771 AE64 9176 LDX #100T A773 B696 9177 LDA DWELLTMPXOP A775 52 9178 DIV A776 B799 9179 STA DWELLTMPXMS A778 B697 9180 LDA DWELLTMPHOP A77A 52 9181 DIV A77B B79A 9182 STA DWELLTMPHMS A77D B698 9183 LDA DWELLTMPLOP A77F 52 9184 DIV A780 B79B 9185 STA DWELLTMPLMS A782 B699 9186 LDA DWELLTMPXMS A784 2706 9187 BEQ DWLLDEND A786 A6FF 9188 LDA #255T A788 B79A 9189 STA DWELLTMPHMS A78A B79B 9190 STA DWELLTMPLMS 9191 DWLLDEND: A78C B69A 9192 LDA DWELLTMPHMS A78E 260E 9193 BNE SAVE_DWELL A790 B69B 9194 LDA DWELLTMPLMS A792 C1E08F 9195 CMP MINDISCHG_F A795 2207 9196 BHI SAVE_DWELL 9197 DWELL_LIM: A797 3F9A 9198 CLR DWELLTMPHMS A799 C6E08F 9199 LDA MINDISCHG_F A79C B79B 9200 STA DWELLTMPLMS 9201 SAVE_DWELL: A79E 559A 9202 LDHX DWELLTMPHMS A7A0 35E6 9203 sthx dwelldelay2 9204 ; ldhx #0 9205 ; sthx dwelldelay3 9206 ; sthx dwelldelay4 A7A2 CCAADB 9207 jmp really_done_dwell 9208 9209 cd2_cont: 9210 ;check to see if value we _would_ store in dwelldelay2 is negative msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 82 MC68HC908GP32 User Bootloader 9211 ; ie. top bit set A7A5 B696 9212 lda dwelltmpXop A7A7 2B32 9213 bmi cd_2rail ; if pos ok, else set to zero ?? is BPL correct? A7A9 macro 9214 DwellDiv A7A9 8C 9215 CLRH A7AA AE64 9216 LDX #100T A7AC B696 9217 LDA DWELLTMPXOP A7AE 52 9218 DIV A7AF B799 9219 STA DWELLTMPXMS A7B1 B697 9220 LDA DWELLTMPHOP A7B3 52 9221 DIV A7B4 B79A 9222 STA DWELLTMPHMS A7B6 B698 9223 LDA DWELLTMPLOP A7B8 52 9224 DIV A7B9 B79B 9225 STA DWELLTMPLMS A7BB B699 9226 LDA DWELLTMPXMS A7BD 2706 9227 BEQ DWLLDEND A7BF A6FF 9228 LDA #255T A7C1 B79A 9229 STA DWELLTMPHMS A7C3 B79B 9230 STA DWELLTMPLMS 9231 DWLLDEND: A7C5 B69A 9232 LDA DWELLTMPHMS A7C7 260E 9233 BNE SAVE_DWELL A7C9 B69B 9234 LDA DWELLTMPLMS A7CB C1E08F 9235 CMP MINDISCHG_F A7CE 2207 9236 BHI SAVE_DWELL 9237 DWELL_LIM: A7D0 3F9A 9238 CLR DWELLTMPHMS A7D2 C6E08F 9239 LDA MINDISCHG_F A7D5 B79B 9240 STA DWELLTMPLMS 9241 SAVE_DWELL: A7D7 559A 9242 LDHX DWELLTMPHMS A7D9 2003 9243 bra cd_2store 9244 cd_2rail: A7DB 450000 9245 ldhx #0 9246 cd_2store: A7DE 35E6 9247 sthx dwelldelay2 9248 9249 cd_3: 9250 ;3 periods = 3dt-1 + 3ddt 9251 ;3x dt-1 9252 ;save a copy in dwelltmp?p 9253 A7E0 B69F 9254 lda dwelltmpLp ; period without dwell removed A7E2 BB95 9255 add dwelltmpL A7E4 B79F 9256 sta dwelltmpLp ; now 3 periods ready for next calc A7E6 B798 9257 sta dwelltmpLop A7E8 B69E 9258 lda dwelltmpHp A7EA B994 9259 adc dwelltmpH A7EC B79E 9260 sta dwelltmpHp A7EE B797 9261 sta dwelltmpHop A7F0 B69D 9262 lda dwelltmpXp A7F2 B993 9263 adc dwelltmpX A7F4 B79D 9264 sta dwelltmpXp A7F6 B796 9265 sta dwelltmpXop 9266 A7F8 B698 9267 lda dwelltmpLop A7FA BBA7 9268 add dwelltmpLac A7FC B798 9269 sta dwelltmpLop A7FE B697 9270 lda dwelltmpHop A800 B9A6 9271 adc dwelltmpHac A802 B797 9272 sta dwelltmpHop A804 B696 9273 lda dwelltmpXop A806 B9A5 9274 adc dwelltmpXac A808 B796 9275 sta dwelltmpXop 9276 A80A macro 9277 SubDwell ; subtract dwell A80A B698 9278 LDA DWELLTMPLOP A80C B0F6 9279 SUB DWELLUSL A80E B798 9280 STA DWELLTMPLOP A810 B697 9281 LDA DWELLTMPHOP A812 B2F5 9282 SBC DWELLUSH A814 B797 9283 STA DWELLTMPHOP A816 B696 9284 LDA DWELLTMPXOP A818 A200 9285 SBC #0 A81A B796 9286 STA DWELLTMPXOP 9287 A81C 086653 9288 brset out3sparkd,feature2,cd3_cont ; if 4 outputs 9289 cd3_done: A81F macro 9290 DwellRail ; check if negative or less than mindischarge A81F B696 9291 LDA DWELLTMPXOP A821 2706 9292 BEQ DWLNWCHK A823 A580 9293 BIT #$80 A825 260D 9294 BNE DWLNWRAIL A827 2014 9295 BRA DWLNWOK 9296 DWLNWCHK: A829 B697 9297 LDA DWELLTMPHOP A82B 2610 9298 BNE DWLNWOK A82D B698 9299 LDA DWELLTMPLOP A82F C1E08F 9300 CMP MINDISCHG_F A832 2409 9301 BHS DWLNWOK 9302 DWLNWRAIL: A834 3F96 9303 CLR DWELLTMPXOP A836 3F97 9304 CLR DWELLTMPHOP A838 C6E08F 9305 LDA MINDISCHG_F A83B B798 9306 STA DWELLTMPLOP 9307 DWLNWOK: A83D macro 9308 DwellDiv ; convert microseconds to 0.1ms units A83D 8C 9309 CLRH A83E AE64 9310 LDX #100T A840 B696 9311 LDA DWELLTMPXOP A842 52 9312 DIV A843 B799 9313 STA DWELLTMPXMS A845 B697 9314 LDA DWELLTMPHOP A847 52 9315 DIV A848 B79A 9316 STA DWELLTMPHMS A84A B698 9317 LDA DWELLTMPLOP A84C 52 9318 DIV A84D B79B 9319 STA DWELLTMPLMS A84F B699 9320 LDA DWELLTMPXMS A851 2706 9321 BEQ DWLLDEND A853 A6FF 9322 LDA #255T A855 B79A 9323 STA DWELLTMPHMS A857 B79B 9324 STA DWELLTMPLMS 9325 DWLLDEND: A859 B69A 9326 LDA DWELLTMPHMS A85B 260E 9327 BNE SAVE_DWELL A85D B69B 9328 LDA DWELLTMPLMS A85F C1E08F 9329 CMP MINDISCHG_F A862 2207 9330 BHI SAVE_DWELL 9331 DWELL_LIM: A864 3F9A 9332 CLR DWELLTMPHMS A866 C6E08F 9333 LDA MINDISCHG_F A869 B79B 9334 STA DWELLTMPLMS 9335 SAVE_DWELL: A86B 559A 9336 LDHX DWELLTMPHMS A86D 35E8 9337 sthx dwelldelay3 9338 ; ldhx #0 9339 ; sthx dwelldelay4 A86F CCAADB 9340 jmp really_done_dwell 9341 9342 cd3_cont: 9343 ;check to see if value we _would_ store in dwelldelay3 is negative 9344 ; ie. top bit set A872 B696 9345 lda dwelltmpXop A874 2B32 9346 bmi cd_3rail ; if pos ok, else set to zero ?? is BPL correct? msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 83 MC68HC908GP32 User Bootloader A876 macro 9347 DwellDiv A876 8C 9348 CLRH A877 AE64 9349 LDX #100T A879 B696 9350 LDA DWELLTMPXOP A87B 52 9351 DIV A87C B799 9352 STA DWELLTMPXMS A87E B697 9353 LDA DWELLTMPHOP A880 52 9354 DIV A881 B79A 9355 STA DWELLTMPHMS A883 B698 9356 LDA DWELLTMPLOP A885 52 9357 DIV A886 B79B 9358 STA DWELLTMPLMS A888 B699 9359 LDA DWELLTMPXMS A88A 2706 9360 BEQ DWLLDEND A88C A6FF 9361 LDA #255T A88E B79A 9362 STA DWELLTMPHMS A890 B79B 9363 STA DWELLTMPLMS 9364 DWLLDEND: A892 B69A 9365 LDA DWELLTMPHMS A894 260E 9366 BNE SAVE_DWELL A896 B69B 9367 LDA DWELLTMPLMS A898 C1E08F 9368 CMP MINDISCHG_F A89B 2207 9369 BHI SAVE_DWELL 9370 DWELL_LIM: A89D 3F9A 9371 CLR DWELLTMPHMS A89F C6E08F 9372 LDA MINDISCHG_F A8A2 B79B 9373 STA DWELLTMPLMS 9374 SAVE_DWELL: A8A4 559A 9375 LDHX DWELLTMPHMS A8A6 2003 9376 bra cd_3store 9377 cd_3rail: A8A8 450000 9378 ldhx #0 9379 cd_3store: A8AB 35E8 9380 sthx dwelldelay3 9381 9382 9383 9384 cd_4: 9385 ; suspicion that this calc is not working right 9386 ;4 periods = 4dt-1 + 10ddt 9387 ;double ac factor again to make it -4ddt ; but we wanted -10ddt ?! A8AD 38A7 9388 lsl dwelltmpLac A8AF 39A6 9389 rol dwelltmpHac A8B1 39A5 9390 rol dwelltmpXac 9391 A8B3 B69F 9392 lda dwelltmpLp ; period without dwell removed A8B5 BB95 9393 add dwelltmpL 9394 ; sta dwelltmpLp ; now 4 periods ready for next calc A8B7 B798 9395 sta dwelltmpLop A8B9 B69E 9396 lda dwelltmpHp A8BB B994 9397 adc dwelltmpH 9398 ; sta dwelltmpHp A8BD B797 9399 sta dwelltmpHop A8BF B69D 9400 lda dwelltmpXp A8C1 B993 9401 adc dwelltmpX 9402 ; sta dwelltmpXp A8C3 B796 9403 sta dwelltmpXop 9404 A8C5 B698 9405 lda dwelltmpLop A8C7 BBA7 9406 add dwelltmpLac A8C9 B798 9407 sta dwelltmpLop A8CB B697 9408 lda dwelltmpHop A8CD B9A6 9409 adc dwelltmpHac A8CF B797 9410 sta dwelltmpHop A8D1 B696 9411 lda dwelltmpXop A8D3 B9A5 9412 adc dwelltmpXac A8D5 B796 9413 sta dwelltmpXop 9414 A8D7 macro 9415 SubDwell ; subtract dwell A8D7 B698 9416 LDA DWELLTMPLOP A8D9 B0F6 9417 SUB DWELLUSL A8DB B798 9418 STA DWELLTMPLOP A8DD B697 9419 LDA DWELLTMPHOP A8DF B2F5 9420 SBC DWELLUSH A8E1 B797 9421 STA DWELLTMPHOP A8E3 B696 9422 LDA DWELLTMPXOP A8E5 A200 9423 SBC #0 A8E7 B796 9424 STA DWELLTMPXOP 9425 A8E9 C6E074 9426 lda feature8_f A8EC A508 9427 bit #spkeopb A8EE 2653 9428 bne cd4_cont ; if 5 outputs 9429 cd4_done: A8F0 macro 9430 DwellRail ; check if negative or less than mindischarge A8F0 B696 9431 LDA DWELLTMPXOP A8F2 2706 9432 BEQ DWLNWCHK A8F4 A580 9433 BIT #$80 A8F6 260D 9434 BNE DWLNWRAIL A8F8 2014 9435 BRA DWLNWOK 9436 DWLNWCHK: A8FA B697 9437 LDA DWELLTMPHOP A8FC 2610 9438 BNE DWLNWOK A8FE B698 9439 LDA DWELLTMPLOP A900 C1E08F 9440 CMP MINDISCHG_F A903 2409 9441 BHS DWLNWOK 9442 DWLNWRAIL: A905 3F96 9443 CLR DWELLTMPXOP A907 3F97 9444 CLR DWELLTMPHOP A909 C6E08F 9445 LDA MINDISCHG_F A90C B798 9446 STA DWELLTMPLOP 9447 DWLNWOK: A90E macro 9448 DwellDiv ; convert microseconds to 0.1ms units A90E 8C 9449 CLRH A90F AE64 9450 LDX #100T A911 B696 9451 LDA DWELLTMPXOP A913 52 9452 DIV A914 B799 9453 STA DWELLTMPXMS A916 B697 9454 LDA DWELLTMPHOP A918 52 9455 DIV A919 B79A 9456 STA DWELLTMPHMS A91B B698 9457 LDA DWELLTMPLOP A91D 52 9458 DIV A91E B79B 9459 STA DWELLTMPLMS A920 B699 9460 LDA DWELLTMPXMS A922 2706 9461 BEQ DWLLDEND A924 A6FF 9462 LDA #255T A926 B79A 9463 STA DWELLTMPHMS A928 B79B 9464 STA DWELLTMPLMS 9465 DWLLDEND: A92A B69A 9466 LDA DWELLTMPHMS A92C 260E 9467 BNE SAVE_DWELL A92E B69B 9468 LDA DWELLTMPLMS A930 C1E08F 9469 CMP MINDISCHG_F A933 2207 9470 BHI SAVE_DWELL 9471 DWELL_LIM: A935 3F9A 9472 CLR DWELLTMPHMS A937 C6E08F 9473 LDA MINDISCHG_F A93A B79B 9474 STA DWELLTMPLMS 9475 SAVE_DWELL: A93C 559A 9476 LDHX DWELLTMPHMS A93E 35EA 9477 sthx dwelldelay4 9478 ; ldhx #0 9479 ; sthx dwelldelay5 A940 CCAADB 9480 jmp really_done_dwell 9481 9482 cd4_cont: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 84 MC68HC908GP32 User Bootloader 9483 ;check to see if value we _would_ store in dwelldelay4 is negative 9484 ; ie. top bit set A943 B696 9485 lda dwelltmpXop A945 2B32 9486 bmi cd_4rail ; if pos ok, else set to zero ?? is BPL correct? A947 macro 9487 DwellDiv A947 8C 9488 CLRH A948 AE64 9489 LDX #100T A94A B696 9490 LDA DWELLTMPXOP A94C 52 9491 DIV A94D B799 9492 STA DWELLTMPXMS A94F B697 9493 LDA DWELLTMPHOP A951 52 9494 DIV A952 B79A 9495 STA DWELLTMPHMS A954 B698 9496 LDA DWELLTMPLOP A956 52 9497 DIV A957 B79B 9498 STA DWELLTMPLMS A959 B699 9499 LDA DWELLTMPXMS A95B 2706 9500 BEQ DWLLDEND A95D A6FF 9501 LDA #255T A95F B79A 9502 STA DWELLTMPHMS A961 B79B 9503 STA DWELLTMPLMS 9504 DWLLDEND: A963 B69A 9505 LDA DWELLTMPHMS A965 260E 9506 BNE SAVE_DWELL A967 B69B 9507 LDA DWELLTMPLMS A969 C1E08F 9508 CMP MINDISCHG_F A96C 2207 9509 BHI SAVE_DWELL 9510 DWELL_LIM: A96E 3F9A 9511 CLR DWELLTMPHMS A970 C6E08F 9512 LDA MINDISCHG_F A973 B79B 9513 STA DWELLTMPLMS 9514 SAVE_DWELL: A975 559A 9515 LDHX DWELLTMPHMS A977 2003 9516 bra cd_4store 9517 cd_4rail: A979 450000 9518 ldhx #0 9519 cd_4store: A97C 35EA 9520 sthx dwelldelay4 9521 9522 cd_5: 9523 ;---------------------- 9524 ;5 periods = 5dt-1 + 10ddt 9525 ;double ac factor again to make it -4ddt ; but we wanted -10ddt ?! A97E 38A7 9526 lsl dwelltmpLac ; really ?? A980 39A6 9527 rol dwelltmpHac A982 39A5 9528 rol dwelltmpXac 9529 A984 B69F 9530 lda dwelltmpLp ; period without dwell removed A986 BB95 9531 add dwelltmpL 9532 ; sta dwelltmpLp ; now 4 periods ready for next calc A988 B798 9533 sta dwelltmpLop A98A B69E 9534 lda dwelltmpHp A98C B994 9535 adc dwelltmpH 9536 ; sta dwelltmpHp A98E B797 9537 sta dwelltmpHop A990 B69D 9538 lda dwelltmpXp A992 B993 9539 adc dwelltmpX 9540 ; sta dwelltmpXp A994 B796 9541 sta dwelltmpXop 9542 A996 B698 9543 lda dwelltmpLop A998 BBA7 9544 add dwelltmpLac A99A B798 9545 sta dwelltmpLop A99C B697 9546 lda dwelltmpHop A99E B9A6 9547 adc dwelltmpHac A9A0 B797 9548 sta dwelltmpHop A9A2 B696 9549 lda dwelltmpXop A9A4 B9A5 9550 adc dwelltmpXac A9A6 B796 9551 sta dwelltmpXop 9552 A9A8 macro 9553 SubDwell ; subtract dwell A9A8 B698 9554 LDA DWELLTMPLOP A9AA B0F6 9555 SUB DWELLUSL A9AC B798 9556 STA DWELLTMPLOP A9AE B697 9557 LDA DWELLTMPHOP A9B0 B2F5 9558 SBC DWELLUSH A9B2 B797 9559 STA DWELLTMPHOP A9B4 B696 9560 LDA DWELLTMPXOP A9B6 A200 9561 SBC #0 A9B8 B796 9562 STA DWELLTMPXOP 9563 A9BA C6E074 9564 lda feature8_f A9BD A510 9565 bit #spkfopb A9BF 2653 9566 bne cd5_cont ; if 6 outputs 9567 cd5_done: A9C1 macro 9568 DwellRail ; check if negative or less than mindischarge A9C1 B696 9569 LDA DWELLTMPXOP A9C3 2706 9570 BEQ DWLNWCHK A9C5 A580 9571 BIT #$80 A9C7 260D 9572 BNE DWLNWRAIL A9C9 2014 9573 BRA DWLNWOK 9574 DWLNWCHK: A9CB B697 9575 LDA DWELLTMPHOP A9CD 2610 9576 BNE DWLNWOK A9CF B698 9577 LDA DWELLTMPLOP A9D1 C1E08F 9578 CMP MINDISCHG_F A9D4 2409 9579 BHS DWLNWOK 9580 DWLNWRAIL: A9D6 3F96 9581 CLR DWELLTMPXOP A9D8 3F97 9582 CLR DWELLTMPHOP A9DA C6E08F 9583 LDA MINDISCHG_F A9DD B798 9584 STA DWELLTMPLOP 9585 DWLNWOK: A9DF macro 9586 DwellDiv ; convert microseconds to 0.1ms units A9DF 8C 9587 CLRH A9E0 AE64 9588 LDX #100T A9E2 B696 9589 LDA DWELLTMPXOP A9E4 52 9590 DIV A9E5 B799 9591 STA DWELLTMPXMS A9E7 B697 9592 LDA DWELLTMPHOP A9E9 52 9593 DIV A9EA B79A 9594 STA DWELLTMPHMS A9EC B698 9595 LDA DWELLTMPLOP A9EE 52 9596 DIV A9EF B79B 9597 STA DWELLTMPLMS A9F1 B699 9598 LDA DWELLTMPXMS A9F3 2706 9599 BEQ DWLLDEND A9F5 A6FF 9600 LDA #255T A9F7 B79A 9601 STA DWELLTMPHMS A9F9 B79B 9602 STA DWELLTMPLMS 9603 DWLLDEND: A9FB B69A 9604 LDA DWELLTMPHMS A9FD 260E 9605 BNE SAVE_DWELL A9FF B69B 9606 LDA DWELLTMPLMS AA01 C1E08F 9607 CMP MINDISCHG_F AA04 2207 9608 BHI SAVE_DWELL 9609 DWELL_LIM: AA06 3F9A 9610 CLR DWELLTMPHMS AA08 C6E08F 9611 LDA MINDISCHG_F AA0B B79B 9612 STA DWELLTMPLMS 9613 SAVE_DWELL: AA0D 559A 9614 LDHX DWELLTMPHMS AA0F 35EC 9615 sthx dwelldelay5 AA11 CCAADB 9616 jmp really_done_dwell 9617 9618 cd5_cont: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 85 MC68HC908GP32 User Bootloader 9619 ;check to see if value we _would_ store in dwelldelay4 is negative 9620 ; ie. top bit set AA14 B696 9621 lda dwelltmpXop AA16 2B32 9622 bmi cd_5rail ; if pos ok, else set to zero ?? is BPL correct? AA18 macro 9623 DwellDiv AA18 8C 9624 CLRH AA19 AE64 9625 LDX #100T AA1B B696 9626 LDA DWELLTMPXOP AA1D 52 9627 DIV AA1E B799 9628 STA DWELLTMPXMS AA20 B697 9629 LDA DWELLTMPHOP AA22 52 9630 DIV AA23 B79A 9631 STA DWELLTMPHMS AA25 B698 9632 LDA DWELLTMPLOP AA27 52 9633 DIV AA28 B79B 9634 STA DWELLTMPLMS AA2A B699 9635 LDA DWELLTMPXMS AA2C 2706 9636 BEQ DWLLDEND AA2E A6FF 9637 LDA #255T AA30 B79A 9638 STA DWELLTMPHMS AA32 B79B 9639 STA DWELLTMPLMS 9640 DWLLDEND: AA34 B69A 9641 LDA DWELLTMPHMS AA36 260E 9642 BNE SAVE_DWELL AA38 B69B 9643 LDA DWELLTMPLMS AA3A C1E08F 9644 CMP MINDISCHG_F AA3D 2207 9645 BHI SAVE_DWELL 9646 DWELL_LIM: AA3F 3F9A 9647 CLR DWELLTMPHMS AA41 C6E08F 9648 LDA MINDISCHG_F AA44 B79B 9649 STA DWELLTMPLMS 9650 SAVE_DWELL: AA46 559A 9651 LDHX DWELLTMPHMS AA48 2003 9652 bra cd_5store 9653 cd_5rail: AA4A 450000 9654 ldhx #0 9655 cd_5store: AA4D 35EC 9656 sthx dwelldelay5 9657 9658 9659 cd_6: 9660 ;---------------------- 9661 ;6 periods = 6dt-1 + ??ddt 9662 ;double ac factor again to make it -4ddt ; but we wanted -10ddt ?! 9663 ;these calculations need some serious thought for 5 & 6 AA4F 38A7 9664 lsl dwelltmpLac ; really ?? AA51 39A6 9665 rol dwelltmpHac AA53 39A5 9666 rol dwelltmpXac 9667 AA55 B69F 9668 lda dwelltmpLp ; period without dwell removed AA57 BB95 9669 add dwelltmpL 9670 ; sta dwelltmpLp ; now 4 periods ready for next calc AA59 B798 9671 sta dwelltmpLop AA5B B69E 9672 lda dwelltmpHp AA5D B994 9673 adc dwelltmpH 9674 ; sta dwelltmpHp AA5F B797 9675 sta dwelltmpHop AA61 B69D 9676 lda dwelltmpXp AA63 B993 9677 adc dwelltmpX 9678 ; sta dwelltmpXp AA65 B796 9679 sta dwelltmpXop 9680 AA67 B698 9681 lda dwelltmpLop AA69 BBA7 9682 add dwelltmpLac AA6B B798 9683 sta dwelltmpLop AA6D B697 9684 lda dwelltmpHop AA6F B9A6 9685 adc dwelltmpHac AA71 B797 9686 sta dwelltmpHop AA73 B696 9687 lda dwelltmpXop AA75 B9A5 9688 adc dwelltmpXac AA77 B796 9689 sta dwelltmpXop 9690 AA79 macro 9691 SubDwell ; subtract dwell AA79 B698 9692 LDA DWELLTMPLOP AA7B B0F6 9693 SUB DWELLUSL AA7D B798 9694 STA DWELLTMPLOP AA7F B697 9695 LDA DWELLTMPHOP AA81 B2F5 9696 SBC DWELLUSH AA83 B797 9697 STA DWELLTMPHOP AA85 B696 9698 LDA DWELLTMPXOP AA87 A200 9699 SBC #0 AA89 B796 9700 STA DWELLTMPXOP 9701 9702 ;cd6_done: AA8B macro 9703 DwellRail ; check if negative or less than mindischarge AA8B B696 9704 LDA DWELLTMPXOP AA8D 2706 9705 BEQ DWLNWCHK AA8F A580 9706 BIT #$80 AA91 260D 9707 BNE DWLNWRAIL AA93 2014 9708 BRA DWLNWOK 9709 DWLNWCHK: AA95 B697 9710 LDA DWELLTMPHOP AA97 2610 9711 BNE DWLNWOK AA99 B698 9712 LDA DWELLTMPLOP AA9B C1E08F 9713 CMP MINDISCHG_F AA9E 2409 9714 BHS DWLNWOK 9715 DWLNWRAIL: AAA0 3F96 9716 CLR DWELLTMPXOP AAA2 3F97 9717 CLR DWELLTMPHOP AAA4 C6E08F 9718 LDA MINDISCHG_F AAA7 B798 9719 STA DWELLTMPLOP 9720 DWLNWOK: AAA9 macro 9721 DwellDiv ; convert microseconds to 0.1ms units AAA9 8C 9722 CLRH AAAA AE64 9723 LDX #100T AAAC B696 9724 LDA DWELLTMPXOP AAAE 52 9725 DIV AAAF B799 9726 STA DWELLTMPXMS AAB1 B697 9727 LDA DWELLTMPHOP AAB3 52 9728 DIV AAB4 B79A 9729 STA DWELLTMPHMS AAB6 B698 9730 LDA DWELLTMPLOP AAB8 52 9731 DIV AAB9 B79B 9732 STA DWELLTMPLMS AABB B699 9733 LDA DWELLTMPXMS AABD 2706 9734 BEQ DWLLDEND AABF A6FF 9735 LDA #255T AAC1 B79A 9736 STA DWELLTMPHMS AAC3 B79B 9737 STA DWELLTMPLMS 9738 DWLLDEND: AAC5 B69A 9739 LDA DWELLTMPHMS AAC7 260E 9740 BNE SAVE_DWELL AAC9 B69B 9741 LDA DWELLTMPLMS AACB C1E08F 9742 CMP MINDISCHG_F AACE 2207 9743 BHI SAVE_DWELL 9744 DWELL_LIM: AAD0 3F9A 9745 CLR DWELLTMPHMS AAD2 C6E08F 9746 LDA MINDISCHG_F AAD5 B79B 9747 STA DWELLTMPLMS 9748 SAVE_DWELL: AAD7 559A 9749 LDHX DWELLTMPHMS AAD9 35EE 9750 sthx dwelldelay6 9751 ; jmp really_done_dwell 9752 9753 really_done_dwell: 9754 ;finally we've calculated everything we need to for dwell and saved it away - phew! msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 86 MC68HC908GP32 User Bootloader 9755 AADB 006C03 9756 brset rotary2,EnhancedBits5,rotary_split ; are we doing rotary split AADE CCABF5 9757 jmp misc_spark_end 9758 ;**************** 9759 ; Rotary trailing split 9760 ; 9761 ; first check if using a fixed split 9762 ;**************** 9763 rotary_split: AAE1 4E9EA6 9764 mov dwelltmpHp,dwelltmpHac ;save delay for rotary AAE4 4E9FA7 9765 mov dwelltmpLp,dwelltmpLac AAE7 C60102 9766 lda page AAEA A107 9767 cmp #7 AAEC 2605 9768 bne fixspl_fl AAEE C60284 9769 lda {VE_r+FixedSplit_f-flash_table7} ; load ram value AAF1 2003 9770 bra fixspl_c AAF3 C6E870 9771 fixspl_fl: lda FixedSplit_f 9772 fixspl_c: AAF6 A103 9773 cmp #$03 AAF8 2505 9774 blo rs_STEP_1 ; Added this as MT doesnt 9775 ; send a perfect 00T AAFA B797 9776 sta tmp6 ; else use this fixed advance AAFC CCAB8A 9777 jmp split_lookup_done 9778 9779 rs_STEP_1: AAFF 45E869 9780 ldhx #KPARANGEsplit_f AB02 3592 9781 sthx tmp1 AB04 6E0594 9782 mov #$05,tmp3 ; 6x6 AB07 4ED895 9783 mov kpa_n,tmp4 AB0A CDD503 9784 jsr tableLookup AB0D 4E9699 9785 mov tmp5,tmp8 ; Index AB10 4E929A 9786 mov tmp1,tmp9 ; X1 AB13 4E939B 9787 mov tmp2,tmp10 ; X2 9788 9789 rs1_STEP_2: AB16 45E863 9790 ldhx #RPMRANGEsplit_f AB19 3592 9791 sthx tmp1 AB1B 6E0594 9792 mov #$05,tmp3 ; 6x6 AB1E 4E4D95 9793 mov rpm,tmp4 AB21 CDD503 9794 jsr tableLookup AB24 4E969C 9795 mov tmp5,tmp11 ; Index AB27 4E929E 9796 mov tmp1,tmp13 ; X1 AB2A 4E939F 9797 mov tmp2,tmp14 ; X2 9798 9799 rs1_STEP_3: AB2D 8C 9800 clrh AB2E AE06 9801 ldx #$06 ; 6x6 AB30 B699 9802 lda tmp8 AB32 4A 9803 deca AB33 42 9804 mul AB34 BB9C 9805 add tmp11 AB36 4A 9806 deca AB37 97 9807 tax AB38 macro 9808 rs1X AB38 C60102 9809 LDA PAGE AB3B A107 9810 CMP #07T AB3D 2605 9811 BNE RS1XF AB3F D60253 9812 LDA {VE_R+SPLIT_F-FLASH_TABLE7},X AB42 2003 9813 BRA RS1XC AB44 D6E83F 9814 RS1XF: LDA SPLIT_F,X 9815 RS1XC: AB47 B7A0 9816 sta tmp15 AB49 5C 9817 incx AB4A macro 9818 rs1X AB4A C60102 9819 LDA PAGE AB4D A107 9820 CMP #07T AB4F 2605 9821 BNE RS1XF AB51 D60253 9822 LDA {VE_R+SPLIT_F-FLASH_TABLE7},X AB54 2003 9823 BRA RS1XC AB56 D6E83F 9824 RS1XF: LDA SPLIT_F,X 9825 RS1XC: AB59 B7A1 9826 sta tmp16 AB5B AE06 9827 ldx #$06 ; 6x6 AB5D B699 9828 lda tmp8 AB5F 42 9829 mul AB60 BB9C 9830 add tmp11 AB62 4A 9831 deca AB63 97 9832 tax AB64 macro 9833 rs1X AB64 C60102 9834 LDA PAGE AB67 A107 9835 CMP #07T AB69 2605 9836 BNE RS1XF AB6B D60253 9837 LDA {VE_R+SPLIT_F-FLASH_TABLE7},X AB6E 2003 9838 BRA RS1XC AB70 D6E83F 9839 RS1XF: LDA SPLIT_F,X 9840 RS1XC: AB73 B7A2 9841 sta tmp17 AB75 5C 9842 incx AB76 macro 9843 rs1X AB76 C60102 9844 LDA PAGE AB79 A107 9845 CMP #07T AB7B 2605 9846 BNE RS1XF AB7D D60253 9847 LDA {VE_R+SPLIT_F-FLASH_TABLE7},X AB80 2003 9848 BRA RS1XC AB82 D6E83F 9849 RS1XF: LDA SPLIT_F,X 9850 RS1XC: AB85 B7A3 9851 sta tmp18 9852 AB87 CDA17A 9853 jsr VE_STEP_4 9854 ; result in tmp6 - contains split degrees (0-255 = 0-89.5 deg) 9855 9856 9857 split_lookup_done: 9858 ;special values 9859 ; 0 deg = no split, simultaneous 9860 ; >20 deg = do not fire trailing at all AB8A B697 9861 lda tmp6 AB8C A155 9862 cmp #85T ; 20deg AB8E 220C 9863 bhi trail_off ; now set >20deg for no trailing AB90 A14A 9864 cmp #74T ; 16deg AB92 2402 9865 bhs sld2 AB94 186C 9866 bset rsh_s,EnhancedBits5 ; set split hysteresis bit 9867 sld2: AB96 A11F 9868 cmp #31T ; (31T = 1 deg) AB98 250A 9869 blo trail_simult 9870 ; lda dwelltmpXac 9871 ; beq trail_split ; only do split if fast enough 9872 ; ;at slow speeds < 537rpm no trailing 9873 ; ; this is a technical limitation because the trailing split would need 9874 ; ; re-writing using the 0.1ms spark as well. No plans to do this at the mo. AB9A 2012 9875 bra trail_split ; changed by KC 9876 9877 trail_off: AB9C 6E5597 9878 mov #85T,tmp6 ; rail calc at 20deg, disabling handled elsewhere AB9F 196C 9879 bclr rsh_s,EnhancedBits5 ; clear split hysteresis bit ABA1 CCABD8 9880 jmp split_calc_done 9881 9882 trail_simult: ABA4 4F 9883 clra ABA5 9B 9884 sei ABA6 B7FC 9885 sta splitdelH ABA8 B7FD 9886 sta splitdelL ABAA 9A 9887 cli ABAB CCABD8 9888 jmp split_calc_done 9889 ; the above gives intermittent spark? so rail at 1 deg minimum 9890 ; mov #31T,tmp6 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 87 MC68HC908GP32 User Bootloader 9891 9892 trail_split: ABAE B697 9893 lda tmp6 ABB0 A01C 9894 sub #28T ; remove 10 deg offset ABB2 B797 9895 sta tmp6 ; can't go neg 9896 9897 ; now convert this split into a delay, leading to trailing 9898 ;dwelltmp?ac contains predicted period = 180 deg 9899 ;divide by 2 to get 90deg time 9900 ; already determined dwelltmpXac is zero above 9901 ABB4 34A6 9902 lsr dwelltmpHac ; not working ?? ABB6 36A7 9903 ror dwelltmpLac ; 9904 9905 rs_mult: 9906 ;nb Sparkdlt? is equ'd to tmp17,18,19 at top 9907 ; Calculate time for delay angle 9908 ; Time for 90 deg * Angle (256=90 deg)/256 ABB8 B697 9909 lda tmp6 ; split angle ABBA BEA7 9910 ldx dwelltmpLac ABBC 42 9911 mul ABBD BF95 9912 stx SparkdltL 9913 ;don't care for A 9914 ABBF B697 9915 lda tmp6 ABC1 BEA6 9916 ldx dwelltmpHac ABC3 42 9917 mul ABC4 BF94 9918 stx SparkdltH ABC6 BB95 9919 add SparkdltL ABC8 B795 9920 sta SparkdltL ABCA 2402 9921 bcc rsm_ok ABCC 3C94 9922 inc SparkdltH 9923 9924 rsm_ok: 9925 ;now we've calculated, save to working vars ABCE 9B 9926 sei ABCF B694 9927 lda SparkdltH ABD1 B7FC 9928 sta splitdelH ABD3 B695 9929 lda SparkdltL ABD5 B7FD 9930 sta splitdelL ABD7 9A 9931 cli 9932 split_calc_done: 9933 ;now do rpm based hysteresis of trailing on/off ABD8 B64D 9934 lda rpm ABDA A107 9935 cmp #7T ABDC 2508 9936 blo spcd2 ABDE A108 9937 cmp #8T ABE0 2508 9938 blo trail_hys_ck ABE2 1A6C 9939 bset rsh_r,EnhancedBits5 ; set rpm hysteresis bit ABE4 2004 9940 bra trail_hys_ck 9941 spcd2: ABE6 1B6C 9942 bclr rsh_r,EnhancedBits5 ; clear rpm hysteresis bit ABE8 2003 9943 bra trail_dwell_kill 9944 trail_hys_ck: ABEA 086C08 9945 brset rsh_s,EnhancedBits5,misc_spark_end 9946 9947 trail_dwell_kill: 9948 ;make sure we don't charge the trailing coil ABED 3FB5 9949 clr SparkOnleftch ABEF 3FB6 9950 clr SparkOnleftcl ABF1 3FB7 9951 clr SparkOnleftdh ABF3 3FB8 9952 clr SparkOnleftdl 9953 9954 misc_spark_end: ABF5 81 9955 rts 9956 9957 *************************************************************************** 9958 ** 9959 ** * * * * Interrupt Section * * * * * 9960 ** 9961 ** Following interrupt service routines: 9962 ** - Timer Overflow 9963 ** - ADC Conversion Complete 9964 ** - IRQ input line transistion from high to low 9965 ** - Serial Communication received character 9966 ** - Serial Communications transmit buffer empty (send another character) 9967 ** 9968 *************************************************************************** 9969 9970 ;First some Macros used within the interrupt sections 9971 ABF6 9972 $MACRO COILNEG 9973 brset REUSE_FIDLE,outputpins,dslsx 9974 brset rotary2,EnhancedBits5,rot2neg ; twin rotor code 9975 brclr TOY_DLI,outputpins,nils ; note, Toyota Multiplex only 9976 ; NON-inverted 9977 brset coilabit,coilsel,fcnita 9978 brset coilbbit,coilsel,fcnitb 9979 brset coilcbit,coilsel,fcnitc 9980 fcnita: 9981 bclr coilb,portc 9982 bclr wled,portc 9983 bra dslsa 9984 fcnitb: 9985 bset coilb,portc 9986 bclr wled,portc 9987 bra dslsa 9988 fcnitc: 9989 bclr coilb,portc 9990 bset wled,portc 9991 bra dslsa 9992 rot2neg: 9993 brset rotaryFDign,feature1,fireFD 9994 brset coilcbit,coilsel,rot2cn 9995 brset coildbit,coilsel,rot2dn 9996 ;either A or B both fire the single leading coil on LED17 9997 bra dslsa 9998 rot2cn: 9999 bclr wled,portc ; select 10000 bset coilb,portc 10001 bra cn_end 10002 rot2dn: 10003 bset wled,portc 10004 bset coilb,portc 10005 bra cn_end 10006 nils: ; normal sparking non inverted 10007 brset coilabit,coilsel,dslsa 10008 brset coilbbit,coilsel,dslsb 10009 brset coilcbit,coilsel,dslsc 10010 brset coildbit,coilsel,dslsd 10011 brset coilebit,coilsel,dslse 10012 brset coilfbit,coilsel,dslsf 10013 bra cn_end ; should never get here 10014 10015 fireFD: 10016 brset coilcbit,coilsel,dslsb 10017 brset coildbit,coilsel,dslsc 10018 10019 dslsa: 10020 bset coila,portc ; Set spark on 10021 bra cn_end 10022 10023 dslsb: 10024 bset coilb,portc ; Set spark on 10025 bra cn_end 10026 dslsc: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 88 MC68HC908GP32 User Bootloader 10027 bset wled,portc ; Set spark on 10028 bra cn_end 10029 dslsd: 10030 bset output3,portd ; Set spark on 10031 bra cn_end 10032 dslse: 10033 bset pin10,portc ; Set spark on 10034 bra cn_end 10035 dslsf: 10036 bset knockin,portd ; Set spark on 10037 bra cn_end 10038 dslsx: 10039 bset iasc,porta 10040 cn_end: ABF6 10041 $MACROEND 10042 10043 *************************************************************************** 10044 ABF6 10045 $MACRO COILPOS 10046 brset REUSE_FIDLE,outputpins,ilsox 10047 brset rotary2,EnhancedBits5,rot2pos 10048 ; note no Toyota, because 10049 ; never inverted - ??? is this right 10050 brset coilabit,coilsel,ilsoa 10051 brset coilbbit,coilsel,ilsob 10052 brset coilcbit,coilsel,ilsoc 10053 brset coildbit,coilsel,ilsod 10054 brset coilebit,coilsel,ilsoe 10055 brset coilfbit,coilsel,ilsof 10056 bra fc_end ; should never get here 10057 rot2pos: 10058 brset rotaryFDign,feature1,chargeFD 10059 brset coilcbit,coilsel,rot2cp 10060 brset coildbit,coilsel,rot2dp 10061 ;either A or B both fire the single leading coil on LED17 10062 bra ilsoa 10063 rot2cp: 10064 ; bclr wled,portc ; select. Commented by KC, b/c there's no 10065 ; rotary inverted... if using stock hardware. 10066 bclr coilb,portc 10067 bra fc_end 10068 rot2dp: 10069 ; bset wled,portc 10070 bclr coilb,portc 10071 bra fc_end 10072 chargeFD: 10073 brset coilcbit,coilsel,ilsoc 10074 brset coildbit,coilsel,ilsob 10075 ilsoa: 10076 bclr coila,portc 10077 bra fc_end 10078 ilsob: 10079 bclr coilb,portc 10080 bra fc_end 10081 ilsoc: 10082 bclr wled,portc 10083 bra fc_end 10084 ilsod: 10085 bclr output3,portd 10086 bra fc_end 10087 ilsoe: 10088 bclr pin10,portc 10089 bra fc_end 10090 ilsof: 10091 bclr knockin,portd 10092 bra fc_end 10093 ilsox: 10094 bclr iasc,porta 10095 fc_end: ABF6 10096 $MACROEND 10097 10098 *************************************************************************** 10099 ** 10100 ** Timer Rollover - Occurs every 1/10 of a millisecond - main timing clock 10101 ** 10102 ** 10103 ** Generate time rates: 10104 ** 1/10 milliseconds 10105 ** 1 milliseconds 10106 ** 1/10 seconds 10107 ** seconds 10108 ** 10109 ** Also, in 1/10 millisecond section, turn on/off injector and 10110 ** check RPM for stall condition 10111 ** In milliseconds section, fire off ADC conversion for next channel (5 total), 10112 ** and wrap back when all channels done 10113 ** 10114 *************************************************************************** 10115 ABF6 10116 $MACRO CalcDwellspk 10117 ; This is now one massive macro. There is a section of code depending on how many spark 10118 ; outputs there are - 1,2,3,4,5,6 10119 ;022g - macro is now used to apply dwelldelay value calculated in main loop. 10120 ; macro only used after spark when mainloop will??? have had time to calc since trigger 10121 brset wspk,EnhancedBits4,wastedwell 10122 ;for single output dwell always use dwelldelay1 10123 ldhx dwelldelay1 10124 brset coilabit,coilsel,dd_a 10125 brset coilbbit,coilsel,dd_b ; surely these will never happen though 10126 brset coilcbit,coilsel,dd_c 10127 brset coildbit,coilsel,dd_d 10128 ; no need to consider 5th, 6th because wpsk will always be set 10129 bra jdd_end ; how? 10130 dd_a: sthx SparkOnLeftah ; Store time to keep output the same 10131 bra jdd_end 10132 dd_b: sthx SparkOnLeftbh ; Store time to keep output the same 10133 bra jdd_end 10134 dd_c: sthx SparkOnLeftch ; Store time to keep output the same 10135 bra jdd_end 10136 dd_d: sthx SparkOnLeftdh ; Store time to keep output the same 10137 jdd_end: jmp dd_end 10138 10139 jwdwell6op: jmp wdwell6op 10140 jwdwell5op: jmp wdwell5op 10141 10142 jwdwell4op: jmp wdwell4op 10143 jwdwell2op: jmp wdwell2op 10144 10145 wastedwell: 10146 ;one section each for 2,3,4,5,6 outputs 10147 ;nothing needed for rotary, it's not considered wasted spark 10148 lda feature8_f 10149 bit #spkfopb 10150 bne jwdwell6op 10151 bit #spkeopb 10152 bne jwdwell5op 10153 10154 brset out3sparkd,feature2,jwdwell4op ; if 4 o/ps 10155 ;check if 3rd spark output in use 10156 ;no need to check for 2nd output, wouldn't have got here otherwise (wspk above) 10157 brclr REUSE_LED18,outputpins,jwdwell2op ; want 1 } spark c 10158 brclr REUSE_LED18_2,outputpins,jwdwell2op ; want 1 } 10159 wdwell3op: 10160 ;first off always store a 360deg dwell delay 10161 ldhx dwelldelay3 ; precalculated to rail at mindischg 10162 brset coilabit,coilsel,wd3a360 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 89 MC68HC908GP32 User Bootloader 10163 brset coilbbit,coilsel,wd3b360 10164 brset coilcbit,coilsel,wd3c360 10165 wd3a360: sthx SparkOnLeftah 10166 bra wd3end360 10167 wd3b360: sthx SparkOnLeftbh 10168 bra wd3end360 10169 wd3c360: sthx SparkOnLeftch 10170 wd3end360: 10171 10172 ;we've now set the 360deg wait, see if we can delay off previous spark (120deg) 10173 lda dwelldelay1 10174 bne wd3ok120 10175 lda dwelldelay1+1 10176 cmp #2 10177 blo wd3skip120 ; check if more than 0.2ms 10178 ; if less then dwell might get missed 10179 wd3ok120: 10180 ldhx dwelldelay1 10181 brset coilabit,coilsel,wd3a120 10182 brset coilbbit,coilsel,wd3b120 10183 brset coilcbit,coilsel,wd3c120 10184 wd3a120: sthx SparkOnLeftbh 10185 bra wd3end120 10186 wd3b120: sthx SparkOnLeftch 10187 bra wd3end120 10188 wd3c120: sthx SparkOnLeftah 10189 wd3end120: 10190 ;;;;;;;;;; jmp dd_end ; always apply all three 10191 10192 wd3skip120: 10193 ;not enough time in 120deg period, see if 240deg will work 10194 lda dwelldelay2 10195 bne wd3ok240 10196 lda dwelldelay2+1 10197 cmp #2 10198 blo wd3end240 ; check if more than 0.2ms 10199 ; if less then dwell might get missed 10200 wd3ok240: 10201 ldhx dwelldelay2 10202 brset coilabit,coilsel,wd3a240 10203 brset coilbbit,coilsel,wd3b240 10204 brset coilcbit,coilsel,wd3c240 10205 wd3a240: sthx SparkOnLeftch 10206 bra wd3end240 10207 wd3b240: sthx SparkOnLeftah 10208 bra wd3end240 10209 wd3c240: sthx SparkOnLeftbh 10210 wd3end240: jmp dd_end 10211 10212 ;**************** 10213 wdwell2op: 10214 ;first off always store a 360deg dwell delay 10215 ldhx dwelldelay2 ; precalculated to rail at mindischg 10216 ;;redundant brset coilabit,coilsel,wd2a360 10217 brset coilbbit,coilsel,wd2b360 10218 wd2a360: sthx SparkOnLeftah 10219 bra wd2end360 10220 wd2b360: sthx SparkOnLeftbh 10221 wd2end360: 10222 ;consider oddfire, do not delay from previous spark 10223 lda SparkConfig1_f 10224 bit #M_SC1oddfire 10225 bne wd2skip 10226 10227 ;we've now set the 360deg wait, see if we can delay off previous spark (180deg) 10228 lda dwelldelay1 10229 bne wd2ok 10230 lda dwelldelay1+1 10231 cmp #2 10232 blo wd2skip ; check if more than 0.2ms 10233 ; if less then dwell might get missed 10234 wd2ok: 10235 ldhx dwelldelay1 10236 brset coilabit,coilsel,wd2a180 10237 brset coilbbit,coilsel,wd2b180 10238 wd2a180: sthx SparkOnLeftbh 10239 bra wd2end180 10240 wd2b180: sthx SparkOnLeftah 10241 wd2end180: 10242 10243 wd2skip: jmp dd_end 10244 10245 ;**************** 10246 10247 wdwell4op: 10248 ;first off always store a 360deg dwell delay 10249 ldhx dwelldelay4 ; precalculated to rail at mindischg 10250 brset coilabit,coilsel,wd4a360 10251 brset coilbbit,coilsel,wd4b360 10252 brset coilcbit,coilsel,wd4c360 10253 brset coildbit,coilsel,wd4d360 10254 wd4a360: sthx SparkOnLeftah 10255 bra wd4end360 10256 wd4b360: sthx SparkOnLeftbh 10257 bra wd4end360 10258 wd4c360: sthx SparkOnLeftch 10259 bra wd4end360 10260 wd4d360: sthx SparkOnLeftdh 10261 wd4end360: 10262 10263 ;consider oddfire, do not delay from previous spark 10264 lda sparkconfig1_f 10265 bit #M_SC1oddfire 10266 bne wd4skip90 10267 10268 ;we've now set the 360deg wait, see if we can delay off previous spark (90deg) 10269 lda dwelldelay1 10270 bne wd4ok90 ; if non zero then long delay so ok 10271 lda dwelldelay1+1 10272 cmp #2 10273 blo wd4skip90 ; check if more than 0.2ms 10274 ; if less, then dwell might get missed 10275 wd4ok90: 10276 ldhx dwelldelay1 10277 brset coilabit,coilsel,wd4a90 10278 brset coilbbit,coilsel,wd4b90 10279 brset coilcbit,coilsel,wd4c90 10280 brset coildbit,coilsel,wd4d90 10281 wd4a90: sthx SparkOnLeftbh 10282 bra wd4end90 10283 wd4b90: sthx SparkOnLeftch 10284 bra wd4end90 10285 wd4c90: sthx SparkOnLeftdh 10286 bra wd4end90 10287 wd4d90: sthx SparkOnLeftah 10288 wd4end90: 10289 ;;; bra dd_end 10290 ;;note! may want to change this so that intermediate periods are set too so that there 10291 ;is a smoother transition from 90deg dwell to 180deg etc. 10292 10293 wd4skip90: 10294 ;not enough time in 90deg period, see if 180deg will work 10295 lda dwelldelay2 10296 bne wd4ok180 10297 lda dwelldelay2+1 10298 cmp #2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 90 MC68HC908GP32 User Bootloader 10299 blo wd4skip180 ; check if more than 0.2ms 10300 ; if less then dwell might get missed 10301 wd4ok180: 10302 ldhx dwelldelay2 10303 brset coilabit,coilsel,wd4a180 10304 brset coilbbit,coilsel,wd4b180 10305 brset coilcbit,coilsel,wd4c180 10306 brset coildbit,coilsel,wd4d180 10307 wd4a180: sthx SparkOnLeftch 10308 bra wd4end180 10309 wd4b180: sthx SparkOnLeftdh 10310 bra wd4end180 10311 wd4c180: sthx SparkOnLeftah 10312 bra wd4end180 10313 wd4d180: sthx SparkOnLeftbh 10314 wd4end180: 10315 ;; bra dd_end 10316 10317 wd4skip180: 10318 ;consider oddfire, do not delay from previous spark 10319 lda sparkconfig1_f 10320 bit #M_SC1oddfire 10321 bne wd4end270 10322 10323 ;not enough time in 180deg period, see if 270deg will work 10324 lda dwelldelay3 10325 bne wd4ok270 10326 lda dwelldelay3+1 10327 cmp #2 10328 blo wd4end270 ; check if more than 0.2ms 10329 ; if less then dwell might get missed 10330 wd4ok270: 10331 ldhx dwelldelay3 10332 brset coilabit,coilsel,wd4a270 10333 brset coilbbit,coilsel,wd4b270 10334 brset coilcbit,coilsel,wd4c270 10335 brset coildbit,coilsel,wd4d270 10336 wd4a270: sthx SparkOnLeftdh 10337 bra wd4end270 10338 wd4b270: sthx SparkOnLeftah 10339 bra wd4end270 10340 wd4c270: sthx SparkOnLeftbh 10341 bra wd4end270 10342 wd4d270: sthx SparkOnLeftch 10343 wd4end270: 10344 jmp dd_end 10345 10346 ;******************* 10347 ; 5 spark outputs, angular names as if V10, will actually be double if 5cyl COP 10348 ;******************* 10349 wdwell5op: 10350 ;first off always store a 360deg dwell delay 10351 ldhx dwelldelay5 ; precalculated to rail at mindischg 10352 brset coilabit,coilsel,wd5a360 10353 brset coilbbit,coilsel,wd5b360 10354 brset coilcbit,coilsel,wd5c360 10355 brset coildbit,coilsel,wd5d360 10356 brset coilebit,coilsel,wd5e360 10357 wd5a360: sthx SparkOnLeftah 10358 bra wd5end360 10359 wd5b360: sthx SparkOnLeftbh 10360 bra wd5end360 10361 wd5c360: sthx SparkOnLeftch 10362 bra wd5end360 10363 wd5d360: sthx SparkOnLeftdh 10364 bra wd5end360 10365 wd5e360: sthx SparkOnLefteh 10366 wd5end360: 10367 ;we've now set the 360deg wait, see if we can delay off previous spark (72deg) 10368 lda dwelldelay1 10369 bne wd5ok72 ; if non zero then long delay so ok 10370 lda dwelldelay1+1 10371 cmp #2 10372 blo wd5skip72 ; check if more than 0.2ms 10373 ; if less, then dwell might get missed 10374 wd5ok72: 10375 ldhx dwelldelay1 10376 brset coilabit,coilsel,wd5a72 10377 brset coilbbit,coilsel,wd5b72 10378 brset coilcbit,coilsel,wd5c72 10379 brset coildbit,coilsel,wd5d72 10380 brset coilebit,coilsel,wd5e72 10381 wd5a72: sthx SparkOnLeftbh 10382 bra wd5end72 10383 wd5b72: sthx SparkOnLeftch 10384 bra wd5end72 10385 wd5c72: sthx SparkOnLeftdh 10386 bra wd5end72 10387 wd5d72: sthx SparkOnLefteh 10388 bra wd5end72 10389 wd5e72: sthx SparkOnLeftah 10390 wd5end72: 10391 ;;; bra dd_end 10392 ;;note! may want to change this so that intermediate periods are set too so that there 10393 ;is a smoother transition from 72deg dwell to 144deg etc. 10394 10395 wd5skip72: 10396 10397 lda dwelldelay2 10398 bne wd5ok144 10399 lda dwelldelay2+1 10400 cmp #2 10401 blo wd5skip144 ; check if more than 0.2ms 10402 ; if less then dwell might get missed 10403 wd5ok144: 10404 ldhx dwelldelay2 10405 brset coilabit,coilsel,wd5a144 10406 brset coilbbit,coilsel,wd5b144 10407 brset coilcbit,coilsel,wd5c144 10408 brset coildbit,coilsel,wd5d144 10409 brset coilebit,coilsel,wd5e144 10410 wd5a144: sthx SparkOnLeftch 10411 bra wd5end144 10412 wd5b144: sthx SparkOnLeftdh 10413 bra wd5end144 10414 wd5c144: sthx SparkOnLefteh 10415 bra wd5end144 10416 wd5d144: sthx SparkOnLeftah 10417 bra wd5end144 10418 wd5e144: sthx SparkOnLeftbh 10419 wd5end144: 10420 ;; bra dd_end 10421 10422 wd5skip144: 10423 ;not enough time in 144deg period, see if 216deg will work 10424 lda dwelldelay3 10425 bne wd5ok216 10426 lda dwelldelay3+1 10427 cmp #2 10428 blo wd5skip216 ; check if more than 0.2ms 10429 ; if less then dwell might get missed 10430 wd5ok216: 10431 ldhx dwelldelay3 10432 brset coilabit,coilsel,wd5a216 10433 brset coilbbit,coilsel,wd5b216 10434 brset coilcbit,coilsel,wd5c216 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 91 MC68HC908GP32 User Bootloader 10435 brset coildbit,coilsel,wd5d216 10436 brset coilebit,coilsel,wd5e216 10437 wd5a216: sthx SparkOnLeftdh 10438 bra wd5end216 10439 wd5b216: sthx SparkOnLefteh 10440 bra wd5end216 10441 wd5c216: sthx SparkOnLeftah 10442 bra wd5end216 10443 wd5d216: sthx SparkOnLeftbh 10444 bra wd5end216 10445 wd5e216: sthx SparkOnLeftch 10446 wd5end216: 10447 ; bra dd_end 10448 10449 wd5skip216: 10450 ;not enough time in 216deg period, see if 288deg will work 10451 lda dwelldelay4 10452 bne wd5ok288 10453 lda dwelldelay4+1 10454 cmp #2 10455 blo wd5skip288 ; check if more than 0.2ms 10456 ; if less then dwell might get missed 10457 wd5ok288: 10458 ldhx dwelldelay4 10459 brset coilabit,coilsel,wd5a288 10460 brset coilbbit,coilsel,wd5b288 10461 brset coilcbit,coilsel,wd5c288 10462 brset coildbit,coilsel,wd5d288 10463 brset coilebit,coilsel,wd5e288 10464 wd5a288: sthx SparkOnLefteh 10465 bra wd5end288 10466 wd5b288: sthx SparkOnLeftah 10467 bra wd5end288 10468 wd5c288: sthx SparkOnLeftbh 10469 bra wd5end288 10470 wd5d288: sthx SparkOnLeftch 10471 bra wd5end288 10472 wd5e288: sthx SparkOnLeftdh 10473 wd5end288: 10474 wd5skip288: 10475 jmp dd_end 10476 10477 ;******************* 10478 ; 6 spark outputs, angular names as if V12, will actually be double if 6cyl COP 10479 ;******************* 10480 wdwell6op: 10481 ;first off always store a 360deg dwell delay 10482 ldhx dwelldelay6 ; precalculated to rail at mindischg 10483 ; brset coilabit,coilsel,wd6a360 10484 brset coilbbit,coilsel,wd6b360 10485 brset coilcbit,coilsel,wd6c360 10486 brset coildbit,coilsel,wd6d360 10487 brset coilebit,coilsel,wd6e360 10488 brset coilfbit,coilsel,wd6f360 10489 wd6a360: sthx SparkOnLeftah 10490 bra wd6end360 10491 wd6b360: sthx SparkOnLeftbh 10492 bra wd6end360 10493 wd6c360: sthx SparkOnLeftch 10494 bra wd6end360 10495 wd6d360: sthx SparkOnLeftdh 10496 bra wd6end360 10497 wd6e360: sthx SparkOnLefteh 10498 bra wd6end360 10499 wd6f360: sthx SparkOnLeftfh 10500 wd6end360: 10501 ;consider oddfire, do not delay from previous spark 10502 lda sparkconfig1_f 10503 bit #M_SC1oddfire 10504 bne wd6skip60 10505 10506 ;we've now set the 360deg wait, see if we can delay off previous spark (60deg) 10507 lda dwelldelay1 10508 bne wd6ok60 ; if non zero then long delay so ok 10509 lda dwelldelay1+1 10510 cmp #5 10511 blo wd6skip60 ; check if more than 0.2ms 10512 ; if less, then dwell might get missed 10513 wd6ok60: 10514 ldhx dwelldelay1 10515 brset coilabit,coilsel,wd6a60 10516 brset coilbbit,coilsel,wd6b60 10517 brset coilcbit,coilsel,wd6c60 10518 brset coildbit,coilsel,wd6d60 10519 brset coilebit,coilsel,wd6e60 10520 brset coilfbit,coilsel,wd6f60 10521 wd6a60: sthx SparkOnLeftbh 10522 bra wd6end60 10523 wd6b60: sthx SparkOnLeftch 10524 bra wd6end60 10525 wd6c60: sthx SparkOnLeftdh 10526 bra wd6end60 10527 wd6d60: sthx SparkOnLefteh 10528 bra wd6end60 10529 wd6e60: sthx SparkOnLeftfh 10530 bra wd6end60 10531 wd6f60: sthx SparkOnLeftah 10532 wd6end60: 10533 ;;; bra dd_end 10534 ;;note! may want to change this so that intermediate periods are set too so that there 10535 ;is a smoother transition from 60deg dwell to 120deg etc. 10536 10537 wd6skip60: 10538 ;not enough time in 60deg period, see if 120deg will work 10539 lda dwelldelay2 10540 bne wd6ok120 10541 lda dwelldelay2+1 10542 cmp #5 10543 blo wd6skip120 ; check if more than 0.2ms 10544 ; if less then dwell might get missed 10545 wd6ok120: 10546 ldhx dwelldelay2 10547 brset coilabit,coilsel,wd6a120 10548 brset coilbbit,coilsel,wd6b120 10549 brset coilcbit,coilsel,wd6c120 10550 brset coildbit,coilsel,wd6d120 10551 brset coilebit,coilsel,wd6e120 10552 brset coilfbit,coilsel,wd6f120 10553 wd6a120: sthx SparkOnLeftch 10554 bra wd6end120 10555 wd6b120: sthx SparkOnLeftdh 10556 bra wd6end120 10557 wd6c120: sthx SparkOnLefteh 10558 bra wd6end120 10559 wd6d120: sthx SparkOnLeftfh 10560 bra wd6end120 10561 wd6e120: sthx SparkOnLeftah 10562 bra wd6end120 10563 wd6f120: sthx SparkOnLeftbh 10564 wd6end120: 10565 ;; bra dd_end 10566 10567 wd6skip120: 10568 ;consider oddfire, do not delay from previous spark 10569 lda sparkconfig1_f 10570 bit #M_SC1oddfire msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 92 MC68HC908GP32 User Bootloader 10571 bne wd6skip180 10572 10573 ;not enough time in 120deg period, see if 180deg will work 10574 lda dwelldelay3 10575 bne wd6ok180 10576 lda dwelldelay3+1 10577 cmp #5 10578 blo wd6skip180 ; check if more than 0.2ms 10579 ; if less then dwell might get missed 10580 wd6ok180: 10581 ldhx dwelldelay3 10582 brset coilabit,coilsel,wd6a180 10583 brset coilbbit,coilsel,wd6b180 10584 brset coilcbit,coilsel,wd6c180 10585 brset coildbit,coilsel,wd6d180 10586 brset coilebit,coilsel,wd6e180 10587 brset coilfbit,coilsel,wd6f180 10588 wd6a180: sthx SparkOnLeftdh 10589 bra wd6end180 10590 wd6b180: sthx SparkOnLefteh 10591 bra wd6end180 10592 wd6c180: sthx SparkOnLeftfh 10593 bra wd6end180 10594 wd6d180: sthx SparkOnLeftah 10595 bra wd6end180 10596 wd6e180: sthx SparkOnLeftbh 10597 bra wd6end180 10598 wd6f180: sthx SparkOnLeftch 10599 wd6end180: 10600 bra dd_end 10601 10602 wd6skip180: 10603 ;not enough time in 180deg period, see if 240deg will work 10604 lda dwelldelay4 10605 bne wd6ok240 10606 lda dwelldelay4+1 10607 cmp #5 10608 blo wd6skip240 ; check if more than 0.2ms 10609 ; if less then dwell might get missed 10610 wd6ok240: 10611 ldhx dwelldelay4 10612 brset coilabit,coilsel,wd6a240 10613 brset coilbbit,coilsel,wd6b240 10614 brset coilcbit,coilsel,wd6c240 10615 brset coildbit,coilsel,wd6d240 10616 brset coilebit,coilsel,wd6e240 10617 brset coilfbit,coilsel,wd6f240 10618 wd6a240: sthx SparkOnLefteh 10619 bra wd6end240 10620 wd6b240: sthx SparkOnLeftfh 10621 bra wd6end240 10622 wd6c240: sthx SparkOnLeftah 10623 bra wd6end240 10624 wd6d240: sthx SparkOnLeftbh 10625 bra wd6end240 10626 wd6e240: sthx SparkOnLeftch 10627 bra wd6end240 10628 wd6f240: sthx SparkOnLeftdh 10629 wd6end240: 10630 ; jmp dd_end 10631 10632 wd6skip240: 10633 ;consider oddfire, do not delay from previous spark 10634 lda sparkconfig1_f 10635 bit #M_SC1oddfire 10636 bne wd6skip300 10637 10638 ;not enough time in 240deg period, see if 300deg will work 10639 lda dwelldelay5 10640 bne wd6ok300 10641 lda dwelldelay5+1 10642 cmp #5 10643 blo wd6skip300 ; check if more than 0.2ms 10644 ; if less then dwell might get missed 10645 wd6ok300: 10646 ldhx dwelldelay5 10647 brset coilabit,coilsel,wd6a300 10648 brset coilbbit,coilsel,wd6b300 10649 brset coilcbit,coilsel,wd6c300 10650 brset coildbit,coilsel,wd6d300 10651 brset coilebit,coilsel,wd6e300 10652 brset coilfbit,coilsel,wd6f300 10653 wd6a300: sthx SparkOnLefteh 10654 bra wd6end300 10655 wd6b300: sthx SparkOnLeftfh 10656 bra wd6end300 10657 wd6c300: sthx SparkOnLeftah 10658 bra wd6end300 10659 wd6d300: sthx SparkOnLeftbh 10660 bra wd6end300 10661 wd6e300: sthx SparkOnLeftch 10662 bra wd6end300 10663 wd6f300: sthx SparkOnLeftdh 10664 wd6end300: 10665 10666 wd6skip300: 10667 10668 10669 dd_end: ABF6 10670 $MACROEND 10671 10672 ******************************************************************************** 10673 ** EDIS control section up here to permit relative jumps in 0.1ms section 10674 ** 2nd EDIS output control 10675 ******************************************************************************** 10676 10677 edis2_fire: ABF6 09644F 10678 brclr REUSE_LED19,outputpins,go_inj_fire2 ; if 2nd output not 10679 ;enabled then skip ABF9 55B1 10680 ldhx SparkOnLeftah ; skip if already zero ABFB 274B 10681 beq go_inj_fire2 10682 ABFD AFFF 10683 aix #-1 ; is it time to start 2nd SAW ABFF 35B1 10684 sthx SparkOnLeftah AC01 650000 10685 cphx #0 AC04 2642 10686 bne go_inj_fire2 ; skip if non-zero 10687 10688 ; start 2nd SAW here and set timer to turn it off AC06 3F6A 10689 clr coilsel AC08 126A 10690 bset coilbbit,coilsel ; only support 2nd spark output 10691 ; assume that other outputs cannot get set AC0A 1662 10692 bset sparkon,revlimbits ; note that spark is on 10693 AC0C 0C6B04 10694 brset invspk,EnhancedBits4,InvSparkOn2 AC0F 1202 10695 bset coilb,portc AC11 2002 10696 bra set_saw_on2 10697 InvSparkOn2: AC13 1302 10698 bclr coilb,portc 10699 10700 set_saw_on2: ; now set timer for SAW on period 10701 ; using sawh/l calculated in main loop 10702 10703 ; Calculate width of SAW pulse 10704 ; grab current timer values - uses same variable as squirt section below. 10705 ; But no cli so ok 10706 ; msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 93 MC68HC908GP32 User Bootloader AC15 B62D 10707 lda T2CNTL ; unlatch low byte AC17 BE2C 10708 ldx T2CNTH AC19 CF0203 10709 stx T2CurrH ; Save current counter value AC1C B62D 10710 lda T2CNTL AC1E C70204 10711 sta T2CurrL ; Save current counter value 10712 AC21 03420F 10713 brclr crank,engine,SAW_COUNTER2 AC24 C6E042 10714 lda feature4_f AC27 A508 10715 bit #multisparkb AC29 2708 10716 beq SAW_COUNTER2 10717 ; brclr multispark,feature4,SAW_COUNTER2 10718 ; at crank we always send 2048us as calibration and multi-spark init AC2B A600 10719 lda #$00 AC2D B7F1 10720 sta sawl AC2F A608 10721 lda #$08 AC31 B7F0 10722 sta sawh 10723 10724 ;Read the calculated width and store in timer 10725 SAW_COUNTER2: AC33 B6F1 10726 lda sawl AC35 CB0204 10727 add T2CurrL AC38 97 10728 tax AC39 B6F0 10729 lda sawh AC3B C90203 10730 adc T2CurrH AC3E B734 10731 sta T2CH1H AC40 BF35 10732 stx T2CH1L 10733 AC42 1161 10734 bclr SparkTrigg,Sparkbits ; Clear spark trigg. Next time we get int turn off SAW 10735 AC44 1F33 10736 bclr TOF,T2SC1 ; clear any pending interrupt AC46 1C33 10737 bset TOIE,T2SC1 ; Enable timer interrupt 10738 go_inj_fire2: AC48 CCB33F 10739 jmp INJ_FIRE_CTL 10740 **** end of 2nd EDIS bit ** 10741 edis2_fire_a: AC4B 20A9 10742 bra edis2_fire ; to permit relative jump below 10743 10744 ****************************************************************************** 10745 ;some timerroll equates - local variables that can only be used with irqs blocked 10746 ;we'll start using itmp00 - itmp0f in here 10747 10748 TIMERROLL: 10749 AC4D 136C 10750 bclr checkbit,EnhancedBits5 AC4F 8B 10751 pshh ; Stack h AC50 B630 10752 lda T2SC0 ; ack the interrupt AC52 1F30 10753 bclr CHxF,T2SC0 ; clear pending bit AC54 B62D 10754 lda T2CNTL ; unlatch any previous read (added JSM) 10755 10756 ;* revised section - from Dan Hiebert's TFI code AC56 5531 10757 ldhx T2CH0H ; Load index register with value 10758 ; in TIM2 CH0 10759 ; register H:L (output compare value) AC58 AF64 10760 aix #100T ; Add decimal 100 (100 uS) AC5A 3531 10761 sthx T2CH0H ; Copy result to TIM2 CH0 register 10762 ;(new output compare value) 10763 ;* end revised section 10764 10765 ;if we are stalled don't increment these or we might skip the wheeldecoder AC5C 014206 10766 brclr running,engine,TIMER_DONE 10767 AC5F 3CF3 10768 inc lowresL ; 16bit 0.1ms timer AC61 2602 10769 bne TIMER_DONE AC63 3CF2 10770 inc lowresH 10771 ; otherwise done 10772 TIMER_DONE: AC65 1D30 10773 bclr TOIE,T2SC0 ; disable 0.1ms interrupt to 10774 ; prevent re-entry AC67 9A 10775 cli ; allow interrupts during the large 10776 ; chunk of code below. This 10777 ; significantly reduces spark 10778 ; jitter. Without it there is 10779 ; ~6deg at 9000rpm 10780 ; only really want IRQ to be allowed 10781 10782 *************************************************************************** 10783 ***************** 0.1 millisecond section ******************************** 10784 *************************************************************************** 10785 AC68 0E662E 10786 brset config_error,feature2,error_exit AC6B 3C7B 10787 inc mms ; bump up 0.1 millisec variable 10788 10789 ; Added for boost control - Hope it doesnt screw up the timer - 10790 ; James will kill me if it does AC6D 01660F 10791 brclr BoostControl,feature2,bcActDone AC70 3CE0 10792 inc mmsDiv ; Counts up to bcFreqDiv. AC72 B6E0 10793 lda mmsDiv ; Counter at multiples of 0.1 ms AC74 C1E00E 10794 cmp bcFreqDiv_f ; 1=39.1 Hz, 2=19.5, 3=13.0 and so on. AC77 2506 10795 blo bcActDone AC79 3FE0 10796 clr mmsDiv AC7B 3CD1 10797 inc bcActClock AC7D B6D1 10798 lda bcActClock 10799 bcActDone: 10800 10801 ;test for NGC enabled AC7F C6E021 10802 lda DTmode_f AC82 A504 10803 bit #NGC_testb AC84 262D 10804 bne ngc_irq 10805 AC86 0C6318 10806 brset TFI,personality,j_tfi_spk AC89 08630F 10807 brset EDIS,personality,go_inj_fire3 AC8C 026315 10808 brset MSNEON,personality,neon_irq AC8F 04632C 10809 brset WHEEL,personality,wheel_irq 10810 AC92 B663 10811 lda personality AC94 2669 10812 bne no_wd_trig ; any other spark modes skip over 2nd irq bits AC96 CCB33F 10813 jmp INJ_FIRE_CTL ; skip this section if not 10814 ; controlling spark 10815 error_exit: AC99 8A 10816 pulh AC9A 80 10817 rti 10818 10819 go_inj_fire3: AC9B 0A63AD 10820 brset DUALEDIS,personality,edis2_fire_a AC9E CCB33F 10821 jmp INJ_FIRE_CTL 10822 10823 j_tfi_spk: ACA1 CCB312 10824 jmp tfi_spk ; branch to next chunk 10825 10826 neon_irq: 10827 ; Neon crank decoding 10828 ; See if we have seen a rising IRQ edge and save it 10829 ACA4 2E59 10830 bil no_wd_trig ACA6 086156 10831 brset rise,sparkbits,no_wd_trig ; only store the rising edge ACA9 1861 10832 bset rise,sparkbits 10833 ACAB 4EF3C0 10834 mov lowresL,SparkTempL ACAE 4EF2BF 10835 mov lowresH,SparkTempH ACB1 204C 10836 bra no_wd_trig ; we've done the Neon bit 10837 10838 ngc_irq: ;for NGC decoder ACB3 2E4A 10839 bil no_wd_trig ACB5 C601FF 10840 lda stL ; count how long the tooth is high ACB8 4C 10841 inca ACB9 C701FF 10842 sta stL msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 94 MC68HC908GP32 User Bootloader ACBC 2041 10843 bra no_wd_trig 10844 10845 wheel_irq: 10846 ;more bloat... check for second "reset" spark input ACBE 01653E 10847 brclr wd_2trig,feature1,no_wd_trig 10848 ACC1 C6E021 10849 lda dtmode_f ACC4 A502 10850 bit #trig2risefallb ACC6 2626 10851 bne wd_risefall ; do rising & falling 10852 ACC8 A501 10853 bit #trig2fallb ACCA 2611 10854 bne wd_inv 10855 10856 ;on rising edge of input reset wheelcount to zero ACCC 086107 10857 brset rise,sparkbits,wd_rise ; already found so see if ready to clear 10858 ;not already in high state so see if pin has been asserted ACCF 09022D 10859 brclr pin11,portc,no_wd_trig ; inactive 10860 ;we've found a rising edge of pin11, so clear wheelcount (tooth zero) and set rise bit ACD2 1861 10861 bset rise,sparkbits ; this bit used to monitor the edge of the input ACD4 2027 10862 bra wd_2_flag 10863 wd_rise: ACD6 080226 10864 brset pin11,portc,no_wd_trig ACD9 1961 10865 bclr rise,sparkbits ACDB 2022 10866 bra no_wd_trig 10867 10868 wd_inv: 10869 ;on falling edge of input reset wheelcount to zero ACDD 086107 10870 brset rise,sparkbits,wd_fall ; already found so see if ready to clear 10871 ;not already in high state so see if pin has been asserted ACE0 09021C 10872 brclr pin11,portc,no_wd_trig ; inactive ACE3 1861 10873 bset rise,sparkbits ACE5 2018 10874 bra no_wd_trig 10875 wd_fall: ACE7 080215 10876 brset pin11,portc,no_wd_trig 10877 ;we've found a falling edge of pin11, so clear wheelcount (tooth zero) and set rise bit ACEA 1961 10878 bclr rise,sparkbits ; this bit used to monitor the edge of the input ACEC 200F 10879 bra wd_2_flag 10880 10881 wd_risefall: 10882 ;on rising and falling edge of input reset wheelcount to zero ACEE 086107 10883 brset rise,sparkbits,wd_rf1 ; was high ACF1 09020B 10884 brclr pin11,portc,no_wd_trig ; still low ACF4 1861 10885 bset rise,sparkbits ACF6 2005 10886 bra wd_2_flag 10887 10888 wd_rf1: ACF8 080204 10889 brset pin11,portc,no_wd_trig ; still high ACFB 1961 10890 bclr rise,sparkbits 10891 ; bra wd_2_flag 10892 10893 wd_2_flag: ACFD 166D 10894 bset trigger2,EnhancedBits6 ; flag the trigger 10895 10896 no_wd_trig: 10897 10898 ; now with multi-dwell check them all each time (how much delay to 10899 ; 0.1ms routine?) this routine is flawed but only slightly - when one 10900 ; coil gets to zero those below don't get decremented so will be 0.1ms 10901 ; late. a jsr would be nice. 10902 ; ACFF 9B 10903 sei ; no ints while we are 10904 ; stealing this variable AD00 4E6AC1 10905 mov coilsel,SparkCarry; temporary 10906 AD03 096B03 10907 brclr indwell,EnhancedBits4,sin_a AD06 006C26 10908 brset rotary2,EnhancedBits5,clr_a_b 10909 10910 sin_a: AD09 55B1 10911 ldhx SparkOnLeftah AD0B 270F 10912 beq sin_b AD0D AFFF 10913 aix #-1 ; is it time to start charging AD0F 35B1 10914 sthx SparkOnLeftah AD11 650000 10915 cphx #0 AD14 2606 10916 bne sin_b AD16 3F6A 10917 clr coilsel AD18 106A 10918 bset coilabit,coilsel AD1A 206D 10919 bra lowspdspk 10920 sin_b: AD1C 55B3 10921 ldhx SparkOnLeftbh AD1E 2716 10922 beq sin_c AD20 AFFF 10923 aix #-1 ; is it time to start charging AD22 35B3 10924 sthx SparkOnLeftbh AD24 650000 10925 cphx #0 AD27 260D 10926 bne sin_c AD29 3F6A 10927 clr coilsel AD2B 126A 10928 bset coilbbit,coilsel AD2D 205A 10929 bra lowspdspk 10930 clr_a_b: AD2F 450000 10931 ldhx #0 AD32 35B1 10932 sthx SparkOnLeftah AD34 35B3 10933 sthx SparkOnLeftbh 10934 sin_c: AD36 55B5 10935 ldhx SparkOnLeftch AD38 270F 10936 beq sin_d AD3A AFFF 10937 aix #-1 ; is it time to start charging AD3C 35B5 10938 sthx SparkOnLeftch AD3E 650000 10939 cphx #0 AD41 2606 10940 bne sin_d AD43 3F6A 10941 clr coilsel AD45 146A 10942 bset coilcbit,coilsel AD47 2040 10943 bra lowspdspk 10944 sin_d: AD49 55B7 10945 ldhx SparkOnLeftdh AD4B 270F 10946 beq sin_e AD4D AFFF 10947 aix #-1 ; is it time to start charging AD4F 35B7 10948 sthx SparkOnLeftdh AD51 650000 10949 cphx #0 AD54 2606 10950 bne sin_e AD56 3F6A 10951 clr coilsel AD58 166A 10952 bset coildbit,coilsel AD5A 202D 10953 bra lowspdspk 10954 10955 sin_e: AD5C 55B9 10956 ldhx SparkOnLefteh AD5E 270F 10957 beq sin_f AD60 AFFF 10958 aix #-1 ; is it time to start charging AD62 35B9 10959 sthx SparkOnLefteh AD64 650000 10960 cphx #0 AD67 2606 10961 bne sin_f AD69 3F6A 10962 clr coilsel AD6B 186A 10963 bset coilebit,coilsel AD6D 201A 10964 bra lowspdspk 10965 sin_f: AD6F 55BB 10966 ldhx SparkOnLeftfh AD71 270F 10967 beq j_CSL AD73 AFFF 10968 aix #-1 ; is it time to start charging AD75 35BB 10969 sthx SparkOnLeftfh AD77 650000 10970 cphx #0 AD7A 2606 10971 bne j_CSL AD7C 3F6A 10972 clr coilsel AD7E 1A6A 10973 bset coilfbit,coilsel AD80 2007 10974 bra lowspdspk 10975 10976 j_CSL: AD82 9A 10977 cli AD83 CCAE77 10978 jmp CHECK_SPARK_LATE msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 95 MC68HC908GP32 User Bootloader 10979 10980 go_inj_fire: AD86 CCB33F 10981 jmp INJ_FIRE_CTL 10982 10983 10984 lowspdspk: AD89 016C12 10985 brclr rotary2,EnhancedBits5,chkindwell AD8C 006A0F 10986 brset coilabit,coilsel,chkindwell AD8F 026A0C 10987 brset coilbbit,coilsel,chkindwell AD92 B6FC 10988 lda splitdelH AD94 A1FF 10989 cmp #$FF ; if trailing is OFF then don't charge coil AD96 276A 10990 beq blssd 10991 lss2: 10992 ; add check for rotary, which checks for coilcbit/coildbit 10993 chkcoilcd: ; make sure that we dwell coil c/d even if indwell. AD98 046A06 10994 brset coilcbit,coilsel,dodwell AD9B 066A03 10995 brset coildbit,coilsel,dodwell 10996 chkindwell: AD9E 086B61 10997 brset indwell,EnhancedBits4,blssd ; if doing hi-res 10998 ; dwell then don't turn on coil now 10999 dodwell: ADA1 1762 11000 bclr sparkon,revlimbits ; spark now off 11001 ;this used to be in SPARKTIME but could have overheated ignitors ADA3 B6D5 11002 lda SparkCutCnt ; Check Spark Counter ADA5 4C 11003 inca ADA6 C1E04E 11004 cmp SparkCutBase_f ; How many sparks to count to ADA9 2502 11005 blo Dont_ResetCnt ADAB A601 11006 lda #01T 11007 Dont_ResetCnt: ADAD B7D5 11008 sta SparkCutCnt ; Store new value to spark counter ADAF 0A6250 11009 brset sparkCut,RevLimBits,blssd ; If in spark cut 11010 ; mode jump past spark 11011 ADB2 0C6B4F 11012 brset invspk,EnhancedBits4,lsspk_inv ; check if noninv or inv spark ADB5 macro 11013 COILPOS ; charge coil for non-inverted ADB5 006448 11014 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX ADB8 006C14 11015 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS ADBB 006A2A 11016 BRSET COILABIT,COILSEL,ILSOA ADBE 026A2B 11017 BRSET COILBBIT,COILSEL,ILSOB ADC1 046A2C 11018 BRSET COILCBIT,COILSEL,ILSOC ADC4 066A2D 11019 BRSET COILDBIT,COILSEL,ILSOD ADC7 086A2E 11020 BRSET COILEBIT,COILSEL,ILSOE ADCA 0A6A2F 11021 BRSET COILFBIT,COILSEL,ILSOF ADCD 2033 11022 BRA FC_END 11023 ROT2POS: ADCF 086510 11024 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD ADD2 046A05 11025 BRSET COILCBIT,COILSEL,ROT2CP ADD5 066A06 11026 BRSET COILDBIT,COILSEL,ROT2DP ADD8 200E 11027 BRA ILSOA 11028 ROT2CP: ADDA 1302 11029 BCLR COILB,PORTC ADDC 2024 11030 BRA FC_END 11031 ROT2DP: ADDE 1302 11032 BCLR COILB,PORTC ADE0 2020 11033 BRA FC_END 11034 CHARGEFD: ADE2 046A0B 11035 BRSET COILCBIT,COILSEL,ILSOC ADE5 066A04 11036 BRSET COILDBIT,COILSEL,ILSOB 11037 ILSOA: ADE8 1102 11038 BCLR COILA,PORTC ADEA 2016 11039 BRA FC_END 11040 ILSOB: ADEC 1302 11041 BCLR COILB,PORTC ADEE 2012 11042 BRA FC_END 11043 ILSOC: ADF0 1502 11044 BCLR WLED,PORTC ADF2 200E 11045 BRA FC_END 11046 ILSOD: ADF4 1103 11047 BCLR OUTPUT3,PORTD ADF6 200A 11048 BRA FC_END 11049 ILSOE: ADF8 1702 11050 BCLR PIN10,PORTC ADFA 2006 11051 BRA FC_END 11052 ILSOF: ADFC 1503 11053 BCLR KNOCKIN,PORTD ADFE 2002 11054 BRA FC_END 11055 ILSOX: AE00 1300 11056 BCLR IASC,PORTA 11057 FC_END: 11058 blssd: AE02 206F 11059 bra lsspk_done 11060 lsspk_inv: AE04 macro 11061 COILNEG ; charge coil for inverted AE04 00646A 11062 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX AE07 006C1E 11063 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG AE0A 0F6432 11064 BRCLR TOY_DLI,OUTPUTPINS,NILS AE0D 006A06 11065 BRSET COILABIT,COILSEL,FCNITA AE10 026A09 11066 BRSET COILBBIT,COILSEL,FCNITB AE13 046A0C 11067 BRSET COILCBIT,COILSEL,FCNITC 11068 FCNITA: AE16 1302 11069 BCLR COILB,PORTC AE18 1502 11070 BCLR WLED,PORTC AE1A 203D 11071 BRA DSLSA 11072 FCNITB: AE1C 1202 11073 BSET COILB,PORTC AE1E 1502 11074 BCLR WLED,PORTC AE20 2037 11075 BRA DSLSA 11076 FCNITC: AE22 1302 11077 BCLR COILB,PORTC AE24 1402 11078 BSET WLED,PORTC AE26 2031 11079 BRA DSLSA 11080 ROT2NEG: AE28 086528 11081 BRSET ROTARYFDIGN,FEATURE1,FIREFD AE2B 046A05 11082 BRSET COILCBIT,COILSEL,ROT2CN AE2E 066A08 11083 BRSET COILDBIT,COILSEL,ROT2DN AE31 2026 11084 BRA DSLSA 11085 ROT2CN: AE33 1502 11086 BCLR WLED,PORTC AE35 1202 11087 BSET COILB,PORTC AE37 203A 11088 BRA CN_END 11089 ROT2DN: AE39 1402 11090 BSET WLED,PORTC AE3B 1202 11091 BSET COILB,PORTC AE3D 2034 11092 BRA CN_END 11093 NILS: AE3F 006A17 11094 BRSET COILABIT,COILSEL,DSLSA AE42 026A18 11095 BRSET COILBBIT,COILSEL,DSLSB AE45 046A19 11096 BRSET COILCBIT,COILSEL,DSLSC AE48 066A1A 11097 BRSET COILDBIT,COILSEL,DSLSD AE4B 086A1B 11098 BRSET COILEBIT,COILSEL,DSLSE AE4E 0A6A1C 11099 BRSET COILFBIT,COILSEL,DSLSF AE51 2020 11100 BRA CN_END 11101 FIREFD: AE53 046A07 11102 BRSET COILCBIT,COILSEL,DSLSB AE56 066A08 11103 BRSET COILDBIT,COILSEL,DSLSC 11104 DSLSA: AE59 1002 11105 BSET COILA,PORTC AE5B 2016 11106 BRA CN_END 11107 DSLSB: AE5D 1202 11108 BSET COILB,PORTC AE5F 2012 11109 BRA CN_END 11110 DSLSC: AE61 1402 11111 BSET WLED,PORTC AE63 200E 11112 BRA CN_END 11113 DSLSD: AE65 1003 11114 BSET OUTPUT3,PORTD msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 96 MC68HC908GP32 User Bootloader AE67 200A 11115 BRA CN_END 11116 DSLSE: AE69 1602 11117 BSET PIN10,PORTC AE6B 2006 11118 BRA CN_END 11119 DSLSF: AE6D 1403 11120 BSET KNOCKIN,PORTD AE6F 2002 11121 BRA CN_END 11122 DSLSX: AE71 1200 11123 BSET IASC,PORTA 11124 CN_END: 11125 lsspk_done: AE73 4EC16A 11126 mov SparkCarry,coilsel; put it back as we found it AE76 9A 11127 cli 11128 11129 CHECK_SPARK_LATE: AE77 05611B 11130 brclr SparkLSpeed,SparkBits,jINJ_FIRE_CTL ; Skip if not low 11131 ; speed sparking AE7A 016118 11132 brclr sparktrigg,sparkbits,jINJ_FIRE_CTL ; Skip if spark 11133 ; already done 11134 11135 ; brclr crank,engine,timebased ; if not cranking don't do 11136 ; ; irq_spark (NEW 021v) 11137 ;Phil R reports problems with this, so try cant_crank instead 11138 ;this will give a 1-2 second delay before timebased is used 11139 ; hopefully this will not be a problem AE7D 066907 11140 brset cant_crank,EnhancedBits2,timebased 11141 AE80 C6E3AD 11142 lda SparkConfig1_f ; check if noninv or inv spark AE83 A504 11143 bit #M_SC1TimCrnk ; Check if spark on time or IRQ 11144 ; return (SparkConfig1 already in A) AE85 2711 11145 beq IRQ_SPARK 11146 11147 timebased: 11148 ;Check if time for spark AE87 B670 11149 lda rpmch AE89 B1AF 11150 cmp SparkDelayH AE8B 2608 11151 bne jINJ_FIRE_CTL AE8D B671 11152 lda rpmcl AE8F B1B0 11153 cmp SparkDelayL AE91 2602 11154 bne jINJ_FIRE_CTL AE93 200B 11155 bra ChkHold 11156 ;** 11157 jINJ_FIRE_CTL: ; convenient place to branch to AE95 CCB33F 11158 jmp INJ_FIRE_CTL 11159 ;** 11160 11161 IRQ_SPARK: AE98 026316 11162 brset MSNEON,personality,irq_spark_neon AE9B 046313 11163 brset WHEEL,personality,irq_spark_neon AE9E 2EF5 11164 bil jINJ_FIRE_CTL ; IRQ still low? then skip 11165 11166 ChkHold: AEA0 1161 11167 bclr sparktrigg,sparkbits ; No more sparks for this IRQ AEA2 026313 11168 brset MSNEON,personality,DoSparkLSpeed AEA5 046310 11169 brset WHEEL,personality,DoSparkLSpeed ; no hold off on wheel decoder AEA8 B6E3 11170 lda wheelcount ; (HoldSpark) 11171 ; Check if spark is held (after 11172 ; stall and restart) AEAA 270C 11173 beq DoSparkLSpeed AEAC 3AE3 11174 dec wheelcount ; (HoldSpark) 11175 ; One spark has been held, x to go AEAE CCB33F 11176 jmp INJ_FIRE_CTL 11177 11178 ; This will not work with wheel decoder, need to use a flag 11179 ; Treat end of third pulse as trigger return 11180 irq_spark_neon: AEB1 0D61E1 11181 brclr trigret,SparkBits,jINJ_FIRE_CTL AEB4 1D61 11182 bclr trigret,SparkBits ; clear it now AEB6 1161 11183 bclr sparktrigg,sparkbits ; No more sparks for this IRQ 11184 11185 DoSparkLSpeed: AEB8 1662 11186 bset sparkon,revlimbits ; spark now on 11187 AEBA 0C6B71 11188 brset invspk,EnhancedBits4,dosls_inv AEBD macro 11189 COILNEG ; macro = fire coil for non-inverted AEBD 00646A 11190 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX AEC0 006C1E 11191 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG AEC3 0F6432 11192 BRCLR TOY_DLI,OUTPUTPINS,NILS AEC6 006A06 11193 BRSET COILABIT,COILSEL,FCNITA AEC9 026A09 11194 BRSET COILBBIT,COILSEL,FCNITB AECC 046A0C 11195 BRSET COILCBIT,COILSEL,FCNITC 11196 FCNITA: AECF 1302 11197 BCLR COILB,PORTC AED1 1502 11198 BCLR WLED,PORTC AED3 203D 11199 BRA DSLSA 11200 FCNITB: AED5 1202 11201 BSET COILB,PORTC AED7 1502 11202 BCLR WLED,PORTC AED9 2037 11203 BRA DSLSA 11204 FCNITC: AEDB 1302 11205 BCLR COILB,PORTC AEDD 1402 11206 BSET WLED,PORTC AEDF 2031 11207 BRA DSLSA 11208 ROT2NEG: AEE1 086528 11209 BRSET ROTARYFDIGN,FEATURE1,FIREFD AEE4 046A05 11210 BRSET COILCBIT,COILSEL,ROT2CN AEE7 066A08 11211 BRSET COILDBIT,COILSEL,ROT2DN AEEA 2026 11212 BRA DSLSA 11213 ROT2CN: AEEC 1502 11214 BCLR WLED,PORTC AEEE 1202 11215 BSET COILB,PORTC AEF0 203A 11216 BRA CN_END 11217 ROT2DN: AEF2 1402 11218 BSET WLED,PORTC AEF4 1202 11219 BSET COILB,PORTC AEF6 2034 11220 BRA CN_END 11221 NILS: AEF8 006A17 11222 BRSET COILABIT,COILSEL,DSLSA AEFB 026A18 11223 BRSET COILBBIT,COILSEL,DSLSB AEFE 046A19 11224 BRSET COILCBIT,COILSEL,DSLSC AF01 066A1A 11225 BRSET COILDBIT,COILSEL,DSLSD AF04 086A1B 11226 BRSET COILEBIT,COILSEL,DSLSE AF07 0A6A1C 11227 BRSET COILFBIT,COILSEL,DSLSF AF0A 2020 11228 BRA CN_END 11229 FIREFD: AF0C 046A07 11230 BRSET COILCBIT,COILSEL,DSLSB AF0F 066A08 11231 BRSET COILDBIT,COILSEL,DSLSC 11232 DSLSA: AF12 1002 11233 BSET COILA,PORTC AF14 2016 11234 BRA CN_END 11235 DSLSB: AF16 1202 11236 BSET COILB,PORTC AF18 2012 11237 BRA CN_END 11238 DSLSC: AF1A 1402 11239 BSET WLED,PORTC AF1C 200E 11240 BRA CN_END 11241 DSLSD: AF1E 1003 11242 BSET OUTPUT3,PORTD AF20 200A 11243 BRA CN_END 11244 DSLSE: AF22 1602 11245 BSET PIN10,PORTC AF24 2006 11246 BRA CN_END 11247 DSLSF: AF26 1403 11248 BSET KNOCKIN,PORTD AF28 2002 11249 BRA CN_END 11250 DSLSX: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 97 MC68HC908GP32 User Bootloader AF2A 1200 11251 BSET IASC,PORTA 11252 CN_END: AF2C 204D 11253 bra dosls_done 11254 dosls_inv: AF2E macro 11255 COILPOS ; macro = fire coil for inverted AF2E 006448 11256 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX AF31 006C14 11257 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS AF34 006A2A 11258 BRSET COILABIT,COILSEL,ILSOA AF37 026A2B 11259 BRSET COILBBIT,COILSEL,ILSOB AF3A 046A2C 11260 BRSET COILCBIT,COILSEL,ILSOC AF3D 066A2D 11261 BRSET COILDBIT,COILSEL,ILSOD AF40 086A2E 11262 BRSET COILEBIT,COILSEL,ILSOE AF43 0A6A2F 11263 BRSET COILFBIT,COILSEL,ILSOF AF46 2033 11264 BRA FC_END 11265 ROT2POS: AF48 086510 11266 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD AF4B 046A05 11267 BRSET COILCBIT,COILSEL,ROT2CP AF4E 066A06 11268 BRSET COILDBIT,COILSEL,ROT2DP AF51 200E 11269 BRA ILSOA 11270 ROT2CP: AF53 1302 11271 BCLR COILB,PORTC AF55 2024 11272 BRA FC_END 11273 ROT2DP: AF57 1302 11274 BCLR COILB,PORTC AF59 2020 11275 BRA FC_END 11276 CHARGEFD: AF5B 046A0B 11277 BRSET COILCBIT,COILSEL,ILSOC AF5E 066A04 11278 BRSET COILDBIT,COILSEL,ILSOB 11279 ILSOA: AF61 1102 11280 BCLR COILA,PORTC AF63 2016 11281 BRA FC_END 11282 ILSOB: AF65 1302 11283 BCLR COILB,PORTC AF67 2012 11284 BRA FC_END 11285 ILSOC: AF69 1502 11286 BCLR WLED,PORTC AF6B 200E 11287 BRA FC_END 11288 ILSOD: AF6D 1103 11289 BCLR OUTPUT3,PORTD AF6F 200A 11290 BRA FC_END 11291 ILSOE: AF71 1702 11292 BCLR PIN10,PORTC AF73 2006 11293 BRA FC_END 11294 ILSOF: AF75 1503 11295 BCLR KNOCKIN,PORTD AF77 2002 11296 BRA FC_END 11297 ILSOX: AF79 1300 11298 BCLR IASC,PORTA 11299 FC_END: 11300 dosls_done: 11301 ; changed - low speed and dwell control, schedule dwell at same time 11302 ; as we schedule the spark to maintain a consistent dwell 11303 ; AF7B 026705 11304 brset dwellcont,feature7,b_INJFC2 ; don't schedule chg time 11305 ; here (low speed) AF7E 0A6602 11306 brset min_dwell,feature2,b_INJFC2 ; don't schedule chg time here AF81 2009 11307 bra dosls_cd 11308 b_INJFC2: AF83 CCB33F 11309 jmp INJ_FIRE_CTL 11310 dosls_fd: 11311 ; if doing dwell control, figure out when to schedule dwell. AF86 034203 11312 brclr crank,engine,dosls_cd AF89 0A66F7 11313 brset min_dwell,feature2,b_INJFC2 ; don't schedule chg time here 11314 ; in dwell mode min_dwell means turn coil to charge at trigger point, 11315 ; but this can give a very long dwell period which won't be good for IGBTs 11316 ; 11317 dosls_cd: AF8C 9B 11318 sei AF8D macro 11319 CalcDwellspk ; Calculate spark on time AF8D 066B2D 11320 BRSET WSPK,ENHANCEDBITS4,WASTEDWELL AF90 55E4 11321 LDHX DWELLDELAY1 AF92 006A0B 11322 BRSET COILABIT,COILSEL,DD_A AF95 026A0C 11323 BRSET COILBBIT,COILSEL,DD_B AF98 046A0D 11324 BRSET COILCBIT,COILSEL,DD_C AF9B 066A0E 11325 BRSET COILDBIT,COILSEL,DD_D AF9E 200E 11326 BRA JDD_END AFA0 35B1 11327 DD_A: STHX SPARKONLEFTAH AFA2 200A 11328 BRA JDD_END AFA4 35B3 11329 DD_B: STHX SPARKONLEFTBH AFA6 2006 11330 BRA JDD_END AFA8 35B5 11331 DD_C: STHX SPARKONLEFTCH AFAA 2002 11332 BRA JDD_END AFAC 35B7 11333 DD_D: STHX SPARKONLEFTDH AFAE CCB30F 11334 JDD_END: JMP DD_END AFB1 CCB1CD 11335 JWDWELL6OP: JMP WDWELL6OP AFB4 CCB0F3 11336 JWDWELL5OP: JMP WDWELL5OP AFB7 CCB054 11337 JWDWELL4OP: JMP WDWELL4OP AFBA CCB027 11338 JWDWELL2OP: JMP WDWELL2OP 11339 WASTEDWELL: AFBD C6E074 11340 LDA FEATURE8_F AFC0 A510 11341 BIT #SPKFOPB AFC2 26ED 11342 BNE JWDWELL6OP AFC4 A508 11343 BIT #SPKEOPB AFC6 26EC 11344 BNE JWDWELL5OP AFC8 0866EC 11345 BRSET OUT3SPARKD,FEATURE2,JWDWELL4OP AFCB 0564EC 11346 BRCLR REUSE_LED18,OUTPUTPINS,JWDWELL2OP AFCE 0764E9 11347 BRCLR REUSE_LED18_2,OUTPUTPINS,JWDWELL2OP 11348 WDWELL3OP: AFD1 55E8 11349 LDHX DWELLDELAY3 AFD3 006A06 11350 BRSET COILABIT,COILSEL,WD3A360 AFD6 026A07 11351 BRSET COILBBIT,COILSEL,WD3B360 AFD9 046A08 11352 BRSET COILCBIT,COILSEL,WD3C360 AFDC 35B1 11353 WD3A360: STHX SPARKONLEFTAH AFDE 2006 11354 BRA WD3END360 AFE0 35B3 11355 WD3B360: STHX SPARKONLEFTBH AFE2 2002 11356 BRA WD3END360 AFE4 35B5 11357 WD3C360: STHX SPARKONLEFTCH 11358 WD3END360: AFE6 B6E4 11359 LDA DWELLDELAY1 AFE8 2606 11360 BNE WD3OK120 AFEA B6E5 11361 LDA DWELLDELAY1+1 AFEC A102 11362 CMP #2 AFEE 2515 11363 BLO WD3SKIP120 11364 WD3OK120: AFF0 55E4 11365 LDHX DWELLDELAY1 AFF2 006A06 11366 BRSET COILABIT,COILSEL,WD3A120 AFF5 026A07 11367 BRSET COILBBIT,COILSEL,WD3B120 AFF8 046A08 11368 BRSET COILCBIT,COILSEL,WD3C120 AFFB 35B3 11369 WD3A120: STHX SPARKONLEFTBH AFFD 2006 11370 BRA WD3END120 AFFF 35B5 11371 WD3B120: STHX SPARKONLEFTCH B001 2002 11372 BRA WD3END120 B003 35B1 11373 WD3C120: STHX SPARKONLEFTAH 11374 WD3END120: 11375 WD3SKIP120: B005 B6E6 11376 LDA DWELLDELAY2 B007 2606 11377 BNE WD3OK240 B009 B6E7 11378 LDA DWELLDELAY2+1 B00B A102 11379 CMP #2 B00D 2515 11380 BLO WD3END240 11381 WD3OK240: B00F 55E6 11382 LDHX DWELLDELAY2 B011 006A06 11383 BRSET COILABIT,COILSEL,WD3A240 B014 026A07 11384 BRSET COILBBIT,COILSEL,WD3B240 B017 046A08 11385 BRSET COILCBIT,COILSEL,WD3C240 B01A 35B5 11386 WD3A240: STHX SPARKONLEFTCH msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 98 MC68HC908GP32 User Bootloader B01C 2006 11387 BRA WD3END240 B01E 35B1 11388 WD3B240: STHX SPARKONLEFTAH B020 2002 11389 BRA WD3END240 B022 35B3 11390 WD3C240: STHX SPARKONLEFTBH B024 CCB30F 11391 WD3END240: JMP DD_END 11392 WDWELL2OP: B027 55E6 11393 LDHX DWELLDELAY2 B029 026A04 11394 BRSET COILBBIT,COILSEL,WD2B360 B02C 35B1 11395 WD2A360: STHX SPARKONLEFTAH B02E 2002 11396 BRA WD2END360 B030 35B3 11397 WD2B360: STHX SPARKONLEFTBH 11398 WD2END360: B032 C6E3AD 11399 LDA SPARKCONFIG1_F B035 A510 11400 BIT #M_SC1ODDFIRE B037 2618 11401 BNE WD2SKIP B039 B6E4 11402 LDA DWELLDELAY1 B03B 2606 11403 BNE WD2OK B03D B6E5 11404 LDA DWELLDELAY1+1 B03F A102 11405 CMP #2 B041 250E 11406 BLO WD2SKIP 11407 WD2OK: B043 55E4 11408 LDHX DWELLDELAY1 B045 006A03 11409 BRSET COILABIT,COILSEL,WD2A180 B048 026A04 11410 BRSET COILBBIT,COILSEL,WD2B180 B04B 35B3 11411 WD2A180: STHX SPARKONLEFTBH B04D 2002 11412 BRA WD2END180 B04F 35B1 11413 WD2B180: STHX SPARKONLEFTAH 11414 WD2END180: B051 CCB30F 11415 WD2SKIP: JMP DD_END 11416 WDWELL4OP: B054 55EA 11417 LDHX DWELLDELAY4 B056 006A09 11418 BRSET COILABIT,COILSEL,WD4A360 B059 026A0A 11419 BRSET COILBBIT,COILSEL,WD4B360 B05C 046A0B 11420 BRSET COILCBIT,COILSEL,WD4C360 B05F 066A0C 11421 BRSET COILDBIT,COILSEL,WD4D360 B062 35B1 11422 WD4A360: STHX SPARKONLEFTAH B064 200A 11423 BRA WD4END360 B066 35B3 11424 WD4B360: STHX SPARKONLEFTBH B068 2006 11425 BRA WD4END360 B06A 35B5 11426 WD4C360: STHX SPARKONLEFTCH B06C 2002 11427 BRA WD4END360 B06E 35B7 11428 WD4D360: STHX SPARKONLEFTDH 11429 WD4END360: B070 C6E3AD 11430 LDA SPARKCONFIG1_F B073 A510 11431 BIT #M_SC1ODDFIRE B075 2626 11432 BNE WD4SKIP90 B077 B6E4 11433 LDA DWELLDELAY1 B079 2606 11434 BNE WD4OK90 B07B B6E5 11435 LDA DWELLDELAY1+1 B07D A102 11436 CMP #2 B07F 251C 11437 BLO WD4SKIP90 11438 WD4OK90: B081 55E4 11439 LDHX DWELLDELAY1 B083 006A09 11440 BRSET COILABIT,COILSEL,WD4A90 B086 026A0A 11441 BRSET COILBBIT,COILSEL,WD4B90 B089 046A0B 11442 BRSET COILCBIT,COILSEL,WD4C90 B08C 066A0C 11443 BRSET COILDBIT,COILSEL,WD4D90 B08F 35B3 11444 WD4A90: STHX SPARKONLEFTBH B091 200A 11445 BRA WD4END90 B093 35B5 11446 WD4B90: STHX SPARKONLEFTCH B095 2006 11447 BRA WD4END90 B097 35B7 11448 WD4C90: STHX SPARKONLEFTDH B099 2002 11449 BRA WD4END90 B09B 35B1 11450 WD4D90: STHX SPARKONLEFTAH 11451 WD4END90: 11452 WD4SKIP90: B09D B6E6 11453 LDA DWELLDELAY2 B09F 2606 11454 BNE WD4OK180 B0A1 B6E7 11455 LDA DWELLDELAY2+1 B0A3 A102 11456 CMP #2 B0A5 251C 11457 BLO WD4SKIP180 11458 WD4OK180: B0A7 55E6 11459 LDHX DWELLDELAY2 B0A9 006A09 11460 BRSET COILABIT,COILSEL,WD4A180 B0AC 026A0A 11461 BRSET COILBBIT,COILSEL,WD4B180 B0AF 046A0B 11462 BRSET COILCBIT,COILSEL,WD4C180 B0B2 066A0C 11463 BRSET COILDBIT,COILSEL,WD4D180 B0B5 35B5 11464 WD4A180: STHX SPARKONLEFTCH B0B7 200A 11465 BRA WD4END180 B0B9 35B7 11466 WD4B180: STHX SPARKONLEFTDH B0BB 2006 11467 BRA WD4END180 B0BD 35B1 11468 WD4C180: STHX SPARKONLEFTAH B0BF 2002 11469 BRA WD4END180 B0C1 35B3 11470 WD4D180: STHX SPARKONLEFTBH 11471 WD4END180: 11472 WD4SKIP180: B0C3 C6E3AD 11473 LDA SPARKCONFIG1_F B0C6 A510 11474 BIT #M_SC1ODDFIRE B0C8 2626 11475 BNE WD4END270 B0CA B6E8 11476 LDA DWELLDELAY3 B0CC 2606 11477 BNE WD4OK270 B0CE B6E9 11478 LDA DWELLDELAY3+1 B0D0 A102 11479 CMP #2 B0D2 251C 11480 BLO WD4END270 11481 WD4OK270: B0D4 55E8 11482 LDHX DWELLDELAY3 B0D6 006A09 11483 BRSET COILABIT,COILSEL,WD4A270 B0D9 026A0A 11484 BRSET COILBBIT,COILSEL,WD4B270 B0DC 046A0B 11485 BRSET COILCBIT,COILSEL,WD4C270 B0DF 066A0C 11486 BRSET COILDBIT,COILSEL,WD4D270 B0E2 35B7 11487 WD4A270: STHX SPARKONLEFTDH B0E4 200A 11488 BRA WD4END270 B0E6 35B1 11489 WD4B270: STHX SPARKONLEFTAH B0E8 2006 11490 BRA WD4END270 B0EA 35B3 11491 WD4C270: STHX SPARKONLEFTBH B0EC 2002 11492 BRA WD4END270 B0EE 35B5 11493 WD4D270: STHX SPARKONLEFTCH 11494 WD4END270: B0F0 CCB30F 11495 JMP DD_END 11496 WDWELL5OP: B0F3 55EC 11497 LDHX DWELLDELAY5 B0F5 006A0C 11498 BRSET COILABIT,COILSEL,WD5A360 B0F8 026A0D 11499 BRSET COILBBIT,COILSEL,WD5B360 B0FB 046A0E 11500 BRSET COILCBIT,COILSEL,WD5C360 B0FE 066A0F 11501 BRSET COILDBIT,COILSEL,WD5D360 B101 086A10 11502 BRSET COILEBIT,COILSEL,WD5E360 B104 35B1 11503 WD5A360: STHX SPARKONLEFTAH B106 200E 11504 BRA WD5END360 B108 35B3 11505 WD5B360: STHX SPARKONLEFTBH B10A 200A 11506 BRA WD5END360 B10C 35B5 11507 WD5C360: STHX SPARKONLEFTCH B10E 2006 11508 BRA WD5END360 B110 35B7 11509 WD5D360: STHX SPARKONLEFTDH B112 2002 11510 BRA WD5END360 B114 35B9 11511 WD5E360: STHX SPARKONLEFTEH 11512 WD5END360: B116 B6E4 11513 LDA DWELLDELAY1 B118 2606 11514 BNE WD5OK72 B11A B6E5 11515 LDA DWELLDELAY1+1 B11C A102 11516 CMP #2 B11E 2523 11517 BLO WD5SKIP72 11518 WD5OK72: B120 55E4 11519 LDHX DWELLDELAY1 B122 006A0C 11520 BRSET COILABIT,COILSEL,WD5A72 B125 026A0D 11521 BRSET COILBBIT,COILSEL,WD5B72 B128 046A0E 11522 BRSET COILCBIT,COILSEL,WD5C72 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 99 MC68HC908GP32 User Bootloader B12B 066A0F 11523 BRSET COILDBIT,COILSEL,WD5D72 B12E 086A10 11524 BRSET COILEBIT,COILSEL,WD5E72 B131 35B3 11525 WD5A72: STHX SPARKONLEFTBH B133 200E 11526 BRA WD5END72 B135 35B5 11527 WD5B72: STHX SPARKONLEFTCH B137 200A 11528 BRA WD5END72 B139 35B7 11529 WD5C72: STHX SPARKONLEFTDH B13B 2006 11530 BRA WD5END72 B13D 35B9 11531 WD5D72: STHX SPARKONLEFTEH B13F 2002 11532 BRA WD5END72 B141 35B1 11533 WD5E72: STHX SPARKONLEFTAH 11534 WD5END72: 11535 WD5SKIP72: B143 B6E6 11536 LDA DWELLDELAY2 B145 2606 11537 BNE WD5OK144 B147 B6E7 11538 LDA DWELLDELAY2+1 B149 A102 11539 CMP #2 B14B 2523 11540 BLO WD5SKIP144 11541 WD5OK144: B14D 55E6 11542 LDHX DWELLDELAY2 B14F 006A0C 11543 BRSET COILABIT,COILSEL,WD5A144 B152 026A0D 11544 BRSET COILBBIT,COILSEL,WD5B144 B155 046A0E 11545 BRSET COILCBIT,COILSEL,WD5C144 B158 066A0F 11546 BRSET COILDBIT,COILSEL,WD5D144 B15B 086A10 11547 BRSET COILEBIT,COILSEL,WD5E144 B15E 35B5 11548 WD5A144: STHX SPARKONLEFTCH B160 200E 11549 BRA WD5END144 B162 35B7 11550 WD5B144: STHX SPARKONLEFTDH B164 200A 11551 BRA WD5END144 B166 35B9 11552 WD5C144: STHX SPARKONLEFTEH B168 2006 11553 BRA WD5END144 B16A 35B1 11554 WD5D144: STHX SPARKONLEFTAH B16C 2002 11555 BRA WD5END144 B16E 35B3 11556 WD5E144: STHX SPARKONLEFTBH 11557 WD5END144: 11558 WD5SKIP144: B170 B6E8 11559 LDA DWELLDELAY3 B172 2606 11560 BNE WD5OK216 B174 B6E9 11561 LDA DWELLDELAY3+1 B176 A102 11562 CMP #2 B178 2523 11563 BLO WD5SKIP216 11564 WD5OK216: B17A 55E8 11565 LDHX DWELLDELAY3 B17C 006A0C 11566 BRSET COILABIT,COILSEL,WD5A216 B17F 026A0D 11567 BRSET COILBBIT,COILSEL,WD5B216 B182 046A0E 11568 BRSET COILCBIT,COILSEL,WD5C216 B185 066A0F 11569 BRSET COILDBIT,COILSEL,WD5D216 B188 086A10 11570 BRSET COILEBIT,COILSEL,WD5E216 B18B 35B7 11571 WD5A216: STHX SPARKONLEFTDH B18D 200E 11572 BRA WD5END216 B18F 35B9 11573 WD5B216: STHX SPARKONLEFTEH B191 200A 11574 BRA WD5END216 B193 35B1 11575 WD5C216: STHX SPARKONLEFTAH B195 2006 11576 BRA WD5END216 B197 35B3 11577 WD5D216: STHX SPARKONLEFTBH B199 2002 11578 BRA WD5END216 B19B 35B5 11579 WD5E216: STHX SPARKONLEFTCH 11580 WD5END216: 11581 WD5SKIP216: B19D B6EA 11582 LDA DWELLDELAY4 B19F 2606 11583 BNE WD5OK288 B1A1 B6EB 11584 LDA DWELLDELAY4+1 B1A3 A102 11585 CMP #2 B1A5 2523 11586 BLO WD5SKIP288 11587 WD5OK288: B1A7 55EA 11588 LDHX DWELLDELAY4 B1A9 006A0C 11589 BRSET COILABIT,COILSEL,WD5A288 B1AC 026A0D 11590 BRSET COILBBIT,COILSEL,WD5B288 B1AF 046A0E 11591 BRSET COILCBIT,COILSEL,WD5C288 B1B2 066A0F 11592 BRSET COILDBIT,COILSEL,WD5D288 B1B5 086A10 11593 BRSET COILEBIT,COILSEL,WD5E288 B1B8 35B9 11594 WD5A288: STHX SPARKONLEFTEH B1BA 200E 11595 BRA WD5END288 B1BC 35B1 11596 WD5B288: STHX SPARKONLEFTAH B1BE 200A 11597 BRA WD5END288 B1C0 35B3 11598 WD5C288: STHX SPARKONLEFTBH B1C2 2006 11599 BRA WD5END288 B1C4 35B5 11600 WD5D288: STHX SPARKONLEFTCH B1C6 2002 11601 BRA WD5END288 B1C8 35B7 11602 WD5E288: STHX SPARKONLEFTDH 11603 WD5END288: 11604 WD5SKIP288: B1CA CCB30F 11605 JMP DD_END 11606 WDWELL6OP: B1CD 55EE 11607 LDHX DWELLDELAY6 B1CF 026A10 11608 BRSET COILBBIT,COILSEL,WD6B360 B1D2 046A11 11609 BRSET COILCBIT,COILSEL,WD6C360 B1D5 066A12 11610 BRSET COILDBIT,COILSEL,WD6D360 B1D8 086A13 11611 BRSET COILEBIT,COILSEL,WD6E360 B1DB 0A6A14 11612 BRSET COILFBIT,COILSEL,WD6F360 B1DE 35B1 11613 WD6A360: STHX SPARKONLEFTAH B1E0 2012 11614 BRA WD6END360 B1E2 35B3 11615 WD6B360: STHX SPARKONLEFTBH B1E4 200E 11616 BRA WD6END360 B1E6 35B5 11617 WD6C360: STHX SPARKONLEFTCH B1E8 200A 11618 BRA WD6END360 B1EA 35B7 11619 WD6D360: STHX SPARKONLEFTDH B1EC 2006 11620 BRA WD6END360 B1EE 35B9 11621 WD6E360: STHX SPARKONLEFTEH B1F0 2002 11622 BRA WD6END360 B1F2 35BB 11623 WD6F360: STHX SPARKONLEFTFH 11624 WD6END360: B1F4 C6E3AD 11625 LDA SPARKCONFIG1_F B1F7 A510 11626 BIT #M_SC1ODDFIRE B1F9 2634 11627 BNE WD6SKIP60 B1FB B6E4 11628 LDA DWELLDELAY1 B1FD 2606 11629 BNE WD6OK60 B1FF B6E5 11630 LDA DWELLDELAY1+1 B201 A105 11631 CMP #5 B203 252A 11632 BLO WD6SKIP60 11633 WD6OK60: B205 55E4 11634 LDHX DWELLDELAY1 B207 006A0F 11635 BRSET COILABIT,COILSEL,WD6A60 B20A 026A10 11636 BRSET COILBBIT,COILSEL,WD6B60 B20D 046A11 11637 BRSET COILCBIT,COILSEL,WD6C60 B210 066A12 11638 BRSET COILDBIT,COILSEL,WD6D60 B213 086A13 11639 BRSET COILEBIT,COILSEL,WD6E60 B216 0A6A14 11640 BRSET COILFBIT,COILSEL,WD6F60 B219 35B3 11641 WD6A60: STHX SPARKONLEFTBH B21B 2012 11642 BRA WD6END60 B21D 35B5 11643 WD6B60: STHX SPARKONLEFTCH B21F 200E 11644 BRA WD6END60 B221 35B7 11645 WD6C60: STHX SPARKONLEFTDH B223 200A 11646 BRA WD6END60 B225 35B9 11647 WD6D60: STHX SPARKONLEFTEH B227 2006 11648 BRA WD6END60 B229 35BB 11649 WD6E60: STHX SPARKONLEFTFH B22B 2002 11650 BRA WD6END60 B22D 35B1 11651 WD6F60: STHX SPARKONLEFTAH 11652 WD6END60: 11653 WD6SKIP60: B22F B6E6 11654 LDA DWELLDELAY2 B231 2606 11655 BNE WD6OK120 B233 B6E7 11656 LDA DWELLDELAY2+1 B235 A105 11657 CMP #5 B237 252A 11658 BLO WD6SKIP120 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 100 MC68HC908GP32 User Bootloader 11659 WD6OK120: B239 55E6 11660 LDHX DWELLDELAY2 B23B 006A0F 11661 BRSET COILABIT,COILSEL,WD6A120 B23E 026A10 11662 BRSET COILBBIT,COILSEL,WD6B120 B241 046A11 11663 BRSET COILCBIT,COILSEL,WD6C120 B244 066A12 11664 BRSET COILDBIT,COILSEL,WD6D120 B247 086A13 11665 BRSET COILEBIT,COILSEL,WD6E120 B24A 0A6A14 11666 BRSET COILFBIT,COILSEL,WD6F120 B24D 35B5 11667 WD6A120: STHX SPARKONLEFTCH B24F 2012 11668 BRA WD6END120 B251 35B7 11669 WD6B120: STHX SPARKONLEFTDH B253 200E 11670 BRA WD6END120 B255 35B9 11671 WD6C120: STHX SPARKONLEFTEH B257 200A 11672 BRA WD6END120 B259 35BB 11673 WD6D120: STHX SPARKONLEFTFH B25B 2006 11674 BRA WD6END120 B25D 35B1 11675 WD6E120: STHX SPARKONLEFTAH B25F 2002 11676 BRA WD6END120 B261 35B3 11677 WD6F120: STHX SPARKONLEFTBH 11678 WD6END120: 11679 WD6SKIP120: B263 C6E3AD 11680 LDA SPARKCONFIG1_F B266 A510 11681 BIT #M_SC1ODDFIRE B268 2636 11682 BNE WD6SKIP180 B26A B6E8 11683 LDA DWELLDELAY3 B26C 2606 11684 BNE WD6OK180 B26E B6E9 11685 LDA DWELLDELAY3+1 B270 A105 11686 CMP #5 B272 252C 11687 BLO WD6SKIP180 11688 WD6OK180: B274 55E8 11689 LDHX DWELLDELAY3 B276 006A0F 11690 BRSET COILABIT,COILSEL,WD6A180 B279 026A10 11691 BRSET COILBBIT,COILSEL,WD6B180 B27C 046A11 11692 BRSET COILCBIT,COILSEL,WD6C180 B27F 066A12 11693 BRSET COILDBIT,COILSEL,WD6D180 B282 086A13 11694 BRSET COILEBIT,COILSEL,WD6E180 B285 0A6A14 11695 BRSET COILFBIT,COILSEL,WD6F180 B288 35B7 11696 WD6A180: STHX SPARKONLEFTDH B28A 2012 11697 BRA WD6END180 B28C 35B9 11698 WD6B180: STHX SPARKONLEFTEH B28E 200E 11699 BRA WD6END180 B290 35BB 11700 WD6C180: STHX SPARKONLEFTFH B292 200A 11701 BRA WD6END180 B294 35B1 11702 WD6D180: STHX SPARKONLEFTAH B296 2006 11703 BRA WD6END180 B298 35B3 11704 WD6E180: STHX SPARKONLEFTBH B29A 2002 11705 BRA WD6END180 B29C 35B5 11706 WD6F180: STHX SPARKONLEFTCH 11707 WD6END180: B29E 206F 11708 BRA DD_END 11709 WD6SKIP180: B2A0 B6EA 11710 LDA DWELLDELAY4 B2A2 2606 11711 BNE WD6OK240 B2A4 B6EB 11712 LDA DWELLDELAY4+1 B2A6 A105 11713 CMP #5 B2A8 252A 11714 BLO WD6SKIP240 11715 WD6OK240: B2AA 55EA 11716 LDHX DWELLDELAY4 B2AC 006A0F 11717 BRSET COILABIT,COILSEL,WD6A240 B2AF 026A10 11718 BRSET COILBBIT,COILSEL,WD6B240 B2B2 046A11 11719 BRSET COILCBIT,COILSEL,WD6C240 B2B5 066A12 11720 BRSET COILDBIT,COILSEL,WD6D240 B2B8 086A13 11721 BRSET COILEBIT,COILSEL,WD6E240 B2BB 0A6A14 11722 BRSET COILFBIT,COILSEL,WD6F240 B2BE 35B9 11723 WD6A240: STHX SPARKONLEFTEH B2C0 2012 11724 BRA WD6END240 B2C2 35BB 11725 WD6B240: STHX SPARKONLEFTFH B2C4 200E 11726 BRA WD6END240 B2C6 35B1 11727 WD6C240: STHX SPARKONLEFTAH B2C8 200A 11728 BRA WD6END240 B2CA 35B3 11729 WD6D240: STHX SPARKONLEFTBH B2CC 2006 11730 BRA WD6END240 B2CE 35B5 11731 WD6E240: STHX SPARKONLEFTCH B2D0 2002 11732 BRA WD6END240 B2D2 35B7 11733 WD6F240: STHX SPARKONLEFTDH 11734 WD6END240: 11735 WD6SKIP240: B2D4 C6E3AD 11736 LDA SPARKCONFIG1_F B2D7 A510 11737 BIT #M_SC1ODDFIRE B2D9 2634 11738 BNE WD6SKIP300 B2DB B6EC 11739 LDA DWELLDELAY5 B2DD 2606 11740 BNE WD6OK300 B2DF B6ED 11741 LDA DWELLDELAY5+1 B2E1 A105 11742 CMP #5 B2E3 252A 11743 BLO WD6SKIP300 11744 WD6OK300: B2E5 55EC 11745 LDHX DWELLDELAY5 B2E7 006A0F 11746 BRSET COILABIT,COILSEL,WD6A300 B2EA 026A10 11747 BRSET COILBBIT,COILSEL,WD6B300 B2ED 046A11 11748 BRSET COILCBIT,COILSEL,WD6C300 B2F0 066A12 11749 BRSET COILDBIT,COILSEL,WD6D300 B2F3 086A13 11750 BRSET COILEBIT,COILSEL,WD6E300 B2F6 0A6A14 11751 BRSET COILFBIT,COILSEL,WD6F300 B2F9 35B9 11752 WD6A300: STHX SPARKONLEFTEH B2FB 2012 11753 BRA WD6END300 B2FD 35BB 11754 WD6B300: STHX SPARKONLEFTFH B2FF 200E 11755 BRA WD6END300 B301 35B1 11756 WD6C300: STHX SPARKONLEFTAH B303 200A 11757 BRA WD6END300 B305 35B3 11758 WD6D300: STHX SPARKONLEFTBH B307 2006 11759 BRA WD6END300 B309 35B5 11760 WD6E300: STHX SPARKONLEFTCH B30B 2002 11761 BRA WD6END300 B30D 35B7 11762 WD6F300: STHX SPARKONLEFTDH 11763 WD6END300: 11764 WD6SKIP300: 11765 DD_END: B30F 9A 11766 cli 11767 b_INJFC: B310 202D 11768 bra INJ_FIRE_CTL 11769 11770 ;fresh section for TFI spark to keep things clearer 11771 TFI_spk: 11772 ;if tfi & sparkon & low speed & irq high then follow 11773 ; ??? next line irrelevant ??? commented 027b 20th Nov 05 11774 ; brclr sparkon,revlimbits,INJ_FIRE_CTL ; if output not active then 11775 ; skip 11776 ; brclr sparktrigg,sparkbits,INJ_FIRE_CTL ; if sparktrigg??? 11777 ; not active then skip B312 056104 11778 brclr SparkLSpeed,Sparkbits,tfi_fast ; if not slow then do high 11779 ; speed calc B315 2E28 11780 bil INJ_FIRE_CTL ; if IRQ still low then skip B317 200D 11781 bra tfispkoff ; irq has risen, de-activate output 11782 11783 tfi_fast: 11784 ; if high speed only need to worry about trailing (rising) edge 11785 ; of output as the firing (falling) edge of the output is done 11786 ; by the hi-res timer section 11787 ; B319 55B1 11788 ldhx SparkOnLeftah B31B 2722 11789 beq INJ_FIRE_CTL ; shouldn't happen, but just in case B31D AFFF 11790 aix #-1 B31F 35B1 11791 sthx SparkOnLeftah B321 650000 11792 cphx #0 B324 2619 11793 bne INJ_FIRE_CTL 11794 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 101 MC68HC908GP32 User Bootloader 11795 tfispkoff: B326 1762 11796 bclr sparkon,revlimbits ; spark now off 11797 ; with TFI as envisaged it only really makes sense to have one 11798 ; kind of wiring but keep inverted/non-inverted. Only one output 11799 ; 11800 B328 0D6B0B 11801 brclr invspk,EnhancedBits4,tfioutoff 11802 ;inverted B32B 006404 11803 brset REUSE_FIDLE,outputpins,tfiif B32E 1002 11804 bset coila,portc B330 200D 11805 bra INJ_FIRE_CTL 11806 tfiif: B332 1200 11807 bset iasc,porta B334 2009 11808 bra INJ_FIRE_CTL 11809 11810 tfioutoff: B336 006404 11811 brset REUSE_FIDLE,outputpins,tfiof B339 1102 11812 bclr coila,portc B33B 2002 11813 bra INJ_FIRE_CTL 11814 tfiof: B33D 1300 11815 bclr iasc,porta 11816 ; bra INJ_FIRE_CTL 11817 11818 INJ_FIRE_CTL: 11819 ; moved the injection stuff from here to dosquirt kg 11820 ; brclr WaterInj,feature3,INJF2 11821 ; brset water,porta,inject_water ; If water needed go to 11822 ; inject water 11823 ;sph bra INJF2 11824 ; jmp inj2done 11825 ;inject_water: 11826 ; brset Nitrous,feature1,INJF2 ; If NOS Selected dont turn on 11827 ; ; water pulsed output 11828 ; bset water2,porta ; Turn water injector on with 11829 ; fuel inj 2 11830 ; bra INJF2 ; Carry on as normal 11831 ; jmp inj2done 11832 ;INJF3JMP: 11833 ; bra INJF3 11834 ;;=== Injector #1 - Check for end of Injection === 11835 ;CHK_DONE_1: 11836 ; inc pwrun1 11837 ; lda pwrun1 11838 ; cmp pw1 11839 ; beq OFF_INJ_1 11840 ; brset crank,engine,INJF3 ; do not perform PWM limiting 11841 ; ; when cranking 11842 ;sph not for HR 11843 ; lda pwrun1 11844 ; cmp INJPWMT_f1 11845 ; beq PWM_LIMIT_1 11846 ; bra INJF3 11847 ;CHK_DONE_2JMP: 11848 ; bra CHK_DONE_2 ; Jump added 11849 ;OFF_INJ_1: 11850 ; bclr firing1,squirt 11851 ; bclr sched1,squirt 11852 ; bclr inj1,squirt 11853 ;sph dont need this for HR code 11854 ; bclr 7,PORTA ; ** Flyback Damper - turn off X0 11855 ; bset inject1,portd ; ^* * * Turn Off Injector #1 11856 ; (inverted drive) 11857 ; mov #T1Timerstop,T1SC 11858 ; mov #t1scx_NO_PWM,T1SC0 11859 ; mov #Timergo_NO_INT,T1SC 11860 11861 ; bra INJF3 11862 ; jmp INJF3 11863 ;PWM_LIMIT_1: 11864 ; mov #T1Timerstop,T1SC 11865 ; mov #T1SCX_PWM,T1SC0 11866 ; mov #Timergo_NO_INT,T1SC 11867 ; bra INJF3JMP 11868 ; jmp INJF3 11869 11870 ;=== Injector #2 - Check for end of Injection === 11871 ;CHK_DONE_2: 11872 ; inc pwrun2 11873 ; lda pwrun2 11874 ; cmp pw2 11875 ; beq OFF_INJ_2 11876 ; brset crank,engine,CHECK_RPM ; do not perform PWM limiting 11877 ; when cranking 11878 ; brclr crank,engine,CKDN2 11879 ; jmp CHECK_RPM 11880 ;CKDN2: 11881 ; lda DTmode_f 11882 ; bit #alt_i2t2 11883 ; beq ckd2single ; dt=0 11884 11885 ;sph not for HR 11886 ; lda pwrun2 ; use PWM settings from second table 11887 ; cmp INJPWMT_f2 11888 ; beq PWM_LIMIT_2 11889 ; bra inj2done 11890 ;ckd2single: 11891 ;sph not for HR 11892 ; lda pwrun2 ; use PWM settings from first table 11893 ; cmp INJPWMT_f1 11894 ; beq PWM_LIMIT_2 11895 ; bra inj2done 11896 11897 ;OFF_INJ_2: 11898 ; bclr firing2,squirt 11899 ; bclr sched2,squirt 11900 ; bclr inj2,squirt 11901 ;sph dont need this for HR code 11902 ; bclr 6,PORTA ; ** Flyback Damper - turn off X1 11903 ; (for Inj 2) 11904 ; bset inject2,portd ; ^* * * Turn Off Injector #2 11905 ; (inverted drive) 11906 ; lda feature3_f 11907 ; bit #WaterInjb 11908 ; beq Dont_Clr_Water2 11909 ; brclr WaterInj,feature3,Dont_Clr_Water2 ; if not using water 11910 ; ; then skip 11911 ; bclr water2,porta ; Turn off water injection pulse 11912 ;Dont_Clr_Water2: 11913 ;; mov #T1Timerstop,T1SC 11914 ;; mov #t1scx_NO_PWM,T1SC1 11915 ;; mov #Timergo_NO_INT,T1SC 11916 ; bra inj2done 11917 ;PWM_LIMIT_2: 11918 ; mov #T1Timerstop,T1SC 11919 ; mov #T1SCX_PWM,T1SC1 11920 ; mov #Timergo_NO_INT,T1SC 11921 11922 ;inj2done: commented as this was moved to dosquirt kg 11923 ;sph test logging 11924 ; brclr toothlog,EnhancedBits5,i_notlog 11925 ;we are logging so record something 11926 ; pshh 11927 ; clrh 11928 ; ldx VE_r+PAGESIZE-2 11929 ; 11930 ; sta VE_r,x msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 102 MC68HC908GP32 User Bootloader 11931 ; incx 11932 ; 11933 ; cmp #2T 11934 ; beq log_inj2 11935 ; 11936 ; lda T1CH0H 11937 ; sta VE_r,x 11938 ; incx 11939 ; lda T1CH0L 11940 ; sta VE_r,x 11941 ; incx 11942 ; jmp cmp_done 11943 ;log_inj2: 11944 ; lda T1CH1H 11945 ; sta VE_r,x 11946 ; incx 11947 ; lda T1CH1L 11948 ; sta VE_r,x 11949 ; incx 11950 ;cmp_done: 11951 ; ;cpx #PAGESIZE-4 11952 ; cpx #PAGESIZE-3 11953 ; blo itl 11954 ; clrx 11955 ; clra ; 0 = 1us units 11956 ; sta VE_r+PAGESIZE-1 11957 ;itl: 11958 ; stx VE_r+PAGESIZE-2 11959 ; pulh 11960 ;i_notlog: B33F 00642D 11961 brset REUSE_FIDLE,outputpins,idleActDone 11962 11963 ***************************************************************************** 11964 ** Idle Control PWM Actuator 11965 ** 11966 ** Runs at 10000/100 = 100 Hz. Must be before RPM check. 11967 ***************************************************************************** 11968 11969 idleActuator: B342 024224 11970 brset crank,engine,idleActOn ; if cranking then keep it 11971 ; shut (rmd changed from off to on) B345 014225 11972 brclr running,engine,idleActOff ; if not running then close it B348 C6E810 11973 lda feature13_f ; skip if on/off mode B34B A501 11974 bit #pwmidleb B34D 270B 11975 beq idleActCheck 11976 B34F 3CD0 11977 inc idleActClock ; Adjust idle PWM count B351 B6D0 11978 lda idleActClock B353 C1E80B 11979 cmp idlefreq_f B356 2602 11980 bne idleActCheck B358 3FD0 11981 clr idleActClock 11982 11983 idleActCheck: B35A B657 11984 lda idleDC B35C A100 11985 cmp #0T B35E 270D 11986 beq idleActOff B360 C1E80B 11987 cmp idlefreq_f ; #255T KG B363 2704 11988 beq idleActOn B365 B1D0 11989 cmp idleActClock B367 2304 11990 bls idleActOff 11991 11992 idleActOn: B369 1200 11993 bset iasc,porta B36B 2002 11994 bra idleActDone 11995 11996 idleActOff: B36D 1300 11997 bclr iasc,porta 11998 11999 idleActDone: 12000 12001 ***************************************************************************** 12002 ** Boost Controller PWM 12003 ** 12004 ** Set bcDC to 0 (0% duty cycle) to 255 (100% DC). PWM frequency is 12005 ** user-defined by bcFreqDiv, see above. 12006 ** 12007 ** 12008 ** 020w3 0% = low boost, 100% = high boost in calculations 12009 ** can invert the output to reverse the sense 12010 ***************************************************************************** 12011 B36F 016620 12012 brclr BoostControl,feature2,doneBoostControl 12013 doBoostControl: B372 B6CC 12014 lda bcDC B374 270D 12015 beq boostOff ; Turn it off, if duty cycle is zero. B376 B1D1 12016 cmp bcActClock B378 2509 12017 blo boostOff 12018 12019 boostOn: B37A C6E05C 12020 lda feature6_f B37D A540 12021 bit #BoostDirb B37F 260F 12022 bne bcClrout 12023 ; brset BoostDir,feature6,bcClrout ; Change dir for high 12024 ; pulsewidth reduce boost B381 2009 12025 bra bcSetout 12026 boostOff: B383 C6E05C 12027 lda feature6_f B386 A540 12028 bit #BoostDirb B388 2602 12029 bne bcSetout 12030 ; brset BoostDir,feature6,bcSetout ; Change dir for high 12031 ; pulsewidth reduce boost B38A 2004 12032 bra bcClrout 12033 12034 bcSetout: B38C 1600 12035 bset boostP,porta B38E 2002 12036 bra doneBoostControl 12037 12038 bcClrout: B390 1700 12039 bclr boostP,porta 12040 12041 doneBoostControl: 12042 12043 ;=======Check RPM Section===== 12044 CHECK_RPM: B392 014217 12045 brclr running,engine,b_ENABLE; Branch if not running 12046 ; right now B395 064108 12047 brset firing1,squirt,CHK_RE_ENABLE B398 0A4105 12048 brset firing2,squirt,CHK_RE_ENABLE B39B 026402 12049 brset REUSE_LED17,outputpins,CHK_RE_ENABLE B39E 1102 12050 bclr sled,portc ; squrt LED is OFF - nothing 12051 ; is injecting 12052 12053 CHK_RE_ENABLE: 12054 ;====== Check for re-enabling of IRQ input pulses B3A0 B66E 12055 lda rpmph ; Get high byte of last rpm interval B3A2 270B 12056 beq RPMLOWBYTECHK ; If zero go ahead check for 12057 ; half interval B3A4 B671 12058 lda rpmcl ; Check current rpm interval B3A6 A180 12059 cmp #128T ; 12.8 milliseconds is maximum 12060 ; (JSM changed this and cause 'stumble') B3A8 270C 12061 beq REARM_IRQ ; time to re-arm IRQ B3AA 204E 12062 bra INCRPMER ; Jump around rpm half interval check 12063 B3AC CCB4DC 12064 b_ENABLE: jmp ENABLE_THE_IRQ 12065 12066 RPMLOWBYTECHK: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 103 MC68HC908GP32 User Bootloader B3AF B66F 12067 lda rpmpl ; Load in the latched previous RPM value B3B1 44 12068 lsra B3B2 B171 12069 cmp rpmcl ; Is it the same value as current RPM Counter? B3B4 2644 12070 bne INCRPMER ; If not then jump around this 12071 12072 REARM_IRQ: 12073 ; Also do tacho output in here to give 50% output duty B3B6 C6E090 12074 lda tachconf_f B3B9 A47F 12075 and #$7f B3BB 272C 12076 beq CHK_REARM 12077 ;tachoff: B3BD 410111 12078 cbeqa #1T,tachoff_x2 B3C0 410212 12079 cbeqa #2T,tachoff_x3 B3C3 410313 12080 cbeqa #3T,tachoff_x4 B3C6 410414 12081 cbeqa #4T,tachoff_x5 B3C9 410515 12082 cbeqa #5T,tachoff_out3 B3CC 410616 12083 cbeqa #6T,tachoff_pin10 B3CF 2018 12084 bra CHK_REARM 12085 tachoff_x2: B3D1 1B00 12086 bclr water,porta B3D3 2014 12087 bra CHK_REARM 12088 tachoff_x3: B3D5 1900 12089 bclr water2,porta B3D7 2010 12090 bra CHK_REARM 12091 tachoff_x4: B3D9 1700 12092 bclr output1,porta B3DB 200C 12093 bra CHK_REARM 12094 tachoff_x5: B3DD 1500 12095 bclr output2,porta B3DF 2008 12096 bra CHK_REARM 12097 tachoff_out3: B3E1 1103 12098 bclr output3,portd B3E3 2004 12099 bra CHK_REARM 12100 tachoff_pin10: B3E5 1702 12101 bclr pin10,portc B3E7 2000 12102 bra CHK_REARM 12103 12104 CHK_REARM: B3E9 02630E 12105 brset MSNEON,personality,INCRPMER ; irq always on in Neon mode B3EC 04630B 12106 brset WHEEL,personality,INCRPMER ; irq always on in Wheel mode 12107 B3EF C6E05C 12108 lda feature6_f B3F2 A504 12109 bit #falsetrigb ; can disable false trigger protection for testing B3F4 2604 12110 bne INCRPMER 12111 B3F6 141D 12112 bset ACK,INTSCR ; clear out any latched interrupts B3F8 131D 12113 bclr IMASK,INTSCR ; enable interrupts again for IRQ 12114 12115 INCRPMER: B3FA 9B 12116 sei B3FB 3C71 12117 inc rpmcl B3FD 2611 12118 bne jCHECK_MMS B3FF 3C70 12119 inc rpmch B401 01420C 12120 brclr running,engine,jCHECK_MMS ; don't do stall check if 12121 ; not running B404 B670 12122 lda rpmch B406 07690A 12123 brclr cant_crank,EnhancedBits2,incrpm_crank ; if we've fully 12124 ; exited crank mode B409 A11E 12125 cmp #30T ; then 0.75 seconds timeout 12126 ; (<360rpm on a 2cyl) (was 0.25s) B40B 2503 12127 blo jCHECK_MMS B40D 9A 12128 cli ; ok, we can be interrupted again 12129 B40E 2008 12130 bra stall B410 CCB4DE 12131 jCHECK_MMS: jmp CHECK_MMS 12132 incrpm_crank: B413 A164 12133 cmp #$64 ; If RPMPH is 100 (or RPMPeriod = 12134 ; 2.5 sec) then engine stalled B415 25F9 12135 blo jCHECK_MMS B417 9A 12136 cli ; ok, we can be interrupted again 12137 stall: B418 3F42 12138 clr engine ; Engine is stalled, clear all 12139 ; in engine B41A 1100 12140 bclr fuelp,porta ; Turn off fuel Pump B41C 3F70 12141 clr rpmch B41E 3F71 12142 clr rpmcl 12143 B420 A600 12144 lda #00T B422 B7E1 12145 sta TCCycles ; If stalled then clear these 3 for Extra B424 B7DD 12146 sta TCAccel ; fuel during cranking B426 1168 12147 bclr NosDcOk,EnhancedBits ; 12148 B428 A6FF 12149 lda #$FF ; changed 025n, was zero. Causing problems with wheel pickup? B42A B7AE 12150 sta iTimeL B42C B7AD 12151 sta iTimeH B42E B7AC 12152 sta iTimeX 12153 12154 ;sph moved pw1 out of 0-page B430 4F 12155 clra 12156 ; sta pw1 ; zero out pulsewidth 12157 ; clr pw2 ; zero out pulsewidth 12158 ;sph for hi-res B431 B74E 12159 sta pwcalch B433 B74F 12160 sta pwcalcl B435 4F 12161 clra B436 B754 12162 sta pwcalc2h B438 B755 12163 sta pwcalc2l 12164 ; removed all pwuse variables 12165 12166 ; ;stop injection - sph 12167 ; mov #TimerstopHR,t1sc ;Stop Timer so it can be set up - reset count to zero 12168 ; mov #ClrOCstateHR,T1SC0 ;Turn on the injector... (inverted drive) 12169 ; mov #ClrOCstateHR,T1SC1 ;Turn on the injector... (inverted drive) 12170 ; kg comment out to test... a zero pwcalch/l should cause pw to be zero B43A 3F4D 12171 clr rpm 12172 B43C 1769 12173 bclr cant_crank,EnhancedBits2 ; if we stalled we can 12174 ; crank again 12175 B43E macro 12176 TurnAllSpkOff ; macro to turn off all spark outputs B43E 0D6B10 12177 BRCLR INVSPK,ENHANCEDBITS4,SOIN B441 1300 12178 BCLR IASC,PORTA B443 1102 12179 BCLR SLED,PORTC B445 1502 12180 BCLR WLED,PORTC B447 1302 12181 BCLR ALED,PORTC B449 1103 12182 BCLR OUTPUT3,PORTD B44B 1702 12183 BCLR PIN10,PORTC B44D 1503 12184 BCLR KNOCKIN,PORTD B44F 203E 12185 BRA SOIN_DONE 12186 SOIN: B451 006404 12187 BRSET REUSE_FIDLE,OUTPUTPINS,SOIN1 B454 1300 12188 BCLR IASC,PORTA B456 2002 12189 BRA SOIN2 B458 1200 12190 SOIN1: BSET IASC,PORTA B45A 026404 12191 SOIN2: BRSET REUSE_LED17,OUTPUTPINS,SOIN3 B45D 1102 12192 BCLR SLED,PORTC B45F 2002 12193 BRA SOIN4 B461 1002 12194 SOIN3: BSET SLED,PORTC B463 086404 12195 SOIN4: BRSET REUSE_LED19,OUTPUTPINS,SOIN5 B466 1302 12196 BCLR ALED,PORTC B468 2002 12197 BRA SOIN6 B46A 1202 12198 SOIN5: BSET ALED,PORTC B46C 056407 12199 SOIN6: BRCLR REUSE_LED18,OUTPUTPINS,SOIN7 B46F 076404 12200 BRCLR REUSE_LED18_2,OUTPUTPINS,SOIN7 B472 1402 12201 BSET WLED,PORTC B474 2002 12202 BRA SOIN8 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 104 MC68HC908GP32 User Bootloader B476 1502 12203 SOIN7: BCLR WLED,PORTC 12204 SOIN8: B478 096602 12205 BRCLR OUT3SPARKD,FEATURE2,SOIN9 B47B 1003 12206 BSET OUTPUT3,PORTD 12207 SOIN9: B47D C6E074 12208 LDA FEATURE8_F B480 A508 12209 BIT #SPKEOPB B482 2702 12210 BEQ SOIN10 B484 1602 12211 BSET PIN10,PORTC 12212 SOIN10: B486 C6E074 12213 LDA FEATURE8_F B489 A510 12214 BIT #SPKFOPB B48B 2702 12215 BEQ SOIN11 B48D 1403 12216 BSET KNOCKIN,PORTD 12217 SOIN11: 12218 SOIN_DONE: B48F 3FB1 12219 CLR SPARKONLEFTAH B491 3FB2 12220 CLR SPARKONLEFTAL B493 3FB3 12221 CLR SPARKONLEFTBH B495 3FB4 12222 CLR SPARKONLEFTBL B497 3FB5 12223 CLR SPARKONLEFTCH B499 3FB6 12224 CLR SPARKONLEFTCL B49B 3FB7 12225 CLR SPARKONLEFTDH B49D 3FB8 12226 CLR SPARKONLEFTDL B49F 3FB9 12227 CLR SPARKONLEFTEH B4A1 3FBA 12228 CLR SPARKONLEFTEL B4A3 3FBB 12229 CLR SPARKONLEFTFH B4A5 3FBC 12230 CLR SPARKONLEFTFL 12231 12232 stall_cont: B4A7 08630B 12233 brset EDIS,personality,pass_store B4AA C6E3A8 12234 lda TriggAngle_f ; Calculate crank delay angle B4AD C0E3AB 12235 sub CrankAngle_f B4B0 AB1C 12236 add #28T ; - -10 deg B4B2 C70103 12237 sta DelayAngle 12238 pass_store: B4B5 C6E3AB 12239 lda CrankAngle_f ; Update spark angle for user interface B4B8 B75A 12240 sta SparkAngle B4BA C6E3AC 12241 lda SparkHoldCyc_f ; Hold spark after stall B4BD B7E3 12242 sta wheelcount ; (HoldSpark) B4BF 026305 12243 brset MSNEON,personality,wc_wheel B4C2 046302 12244 brset WHEEL,personality,wc_wheel B4C5 2015 12245 bra ENABLE_THE_IRQ 12246 wc_wheel: B4C7 6EC3E3 12247 mov #WHEELINIT,wheelcount ; set !sync,holdoff, 3 teeth holdoff B4CA 136D 12248 bclr wsync,EnhancedBits6 B4CC 146D 12249 bset whold,EnhancedBits6 B4CE A600 12250 lda #0 B4D0 B7F0 12251 sta avgtoothh B4D2 B7F1 12252 sta avgtoothl 12253 B4D4 3FF2 12254 clr lowresH ; low res (0.1ms) timer B4D6 3FF3 12255 clr lowresL ; 12256 B4D8 106A 12257 bset coilabit,coilsel B4DA 1862 12258 bset coilerr,RevLimBits 12259 12260 ENABLE_THE_IRQ: B4DC 131D 12261 bclr IMASK,INTSCR ; Enable IRQ 12262 12263 CHECK_MMS: B4DE 9A 12264 cli B4DF B67B 12265 lda mms B4E1 A109 12266 cmp #$09 B4E3 2203 12267 bhi MSEC ;(was #$0A beq) B4E5 CCB613 12268 jmp RTC_DONE 12269 12270 **************************************************************************** 12271 ********************* millisecond section ******************************** 12272 **************************************************************************** 12273 12274 MSEC: 12275 ; brset egoIgnCount,feature1,No_Ego_mSec ; Are we using mSec 12276 ; for ego counter? B4E8 C6E1BC 12277 lda feature14_f1 B4EB A501 12278 bit #egoIgnCountb B4ED 2602 12279 bne No_Ego_mSec B4EF 3C80 12280 inc egocount ; Increment EGO step counter 12281 12282 No_Ego_mSec: 12283 B4F1 3C7C 12284 inc ms ; bump up millisec B4F3 3F7B 12285 clr mms 12286 B4F5 056411 12287 brclr REUSE_LED18,outputpins,FIRE_ADC ; only do this if 12288 ; using as IRQ monitor B4F8 06640E 12289 brset REUSE_LED18_2,outputpins,FIRE_ADC ; not if spark c B4FB 2E04 12290 bil IRQ_LOW ; Check if IRQ pin low B4FD 1502 12291 bclr wled,portc ; Turn OFF IRQ led 12292 B4FF 2008 12293 bra FIRE_ADC 12294 12295 IRQ_LOW: B501 026305 12296 brset MSNEON,personality,FIRE_ADC ; irrelevant B504 046302 12297 brset WHEEL,personality,FIRE_ADC ; irrelevant B507 1402 12298 bset wled,portc ; Turn ON IRQ led (in case of 12299 ; bouncing points or what ever) 12300 12301 FIRE_ADC: 12302 ; Fire off another ADC conversion, channel is pointed to by ADSEL B509 B68C 12303 lda adsel B50B AA40 12304 ora #%01000000 B50D B73C 12305 sta adscr 12306 B50F 3CD2 12307 inc bcCtlClock 12308 12309 MSDONE: 12310 *************************************************************************** 12311 ********************* 1/100 second section ******************************** 12312 *************************************************************************** B511 B67C 12313 lda ms B513 41001D 12314 cbeqa #00,one00th ; surely there's a better/quicker way than this? B516 410A1A 12315 cbeqa #10T,one00th B519 411417 12316 cbeqa #20T,one00th B51C 411E14 12317 cbeqa #30T,one00th B51F 412811 12318 cbeqa #40T,one00th B522 41320E 12319 cbeqa #50T,one00th B525 413C0B 12320 cbeqa #60T,one00th B528 414608 12321 cbeqa #70T,one00th B52B 415005 12322 cbeqa #80T,one00th B52E 415A02 12323 cbeqa #90T,one00th B531 200D 12324 bra end100th 12325 12326 one00th: B533 07030A 12327 brclr Launch,portd,nol_timer ; Button is pressed so skip timer B536 C60109 12328 lda n2olaunchdel B539 2705 12329 beq nol_timer ; already zero B53B A001 12330 sub #1 B53D C70109 12331 sta n2olaunchdel 12332 nol_timer: 12333 12334 ; ;do similar for nitrous fuel hold on 12335 ; brclr ?????,????,non2o_timer ; Nitrous on so skip timer 12336 ; lda n2ohold 12337 ; beq non2o_timer ; already zero 12338 ; sub #1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 105 MC68HC908GP32 User Bootloader 12339 ; sta n2ohold 12340 ;non2o_timer: 12341 12342 end100th: B540 B67C 12343 lda ms B542 A164 12344 cmp #$64 B544 255C 12345 blo RTC_DONEJMP 12346 *************************************************************************** 12347 ********************* 1/10 second section ********************************* 12348 *************************************************************************** 12349 12350 ONETENTH: B546 3F7C 12351 clr ms 12352 ;see if need to restart tooth logger B548 C60102 12353 lda page B54B 41F005 12354 cbeqa #$F0,restart_F0 B54E 41F10F 12355 cbeqa #$F1,restart_F1 B551 201A 12356 bra oneten_notlog 12357 12358 restart_F0: B553 046C17 12359 brset toothlog,EnhancedBits5,oneten_notlog B556 B688 12360 lda txcnt B558 2613 12361 bne oneten_notlog ; if sending data then do not restart B55A 146C 12362 bset toothlog,EnhancedBits5 ; turn logger back on (after send) B55C 176C 12363 bclr triglog,EnhancedBits5 ; turn logger back on (after send) B55E 200D 12364 bra oneten_notlog 12365 12366 restart_F1: B560 066C0A 12367 brset triglog,EnhancedBits5,oneten_notlog B563 B688 12368 lda txcnt B565 2606 12369 bne oneten_notlog ; if sending data then do not restart B567 166C 12370 bset triglog,EnhancedBits5 ; turn logger back on (after send) B569 156C 12371 bclr toothlog,EnhancedBits5 ; turn logger back on (after send) B56B 2000 12372 bra oneten_notlog 12373 12374 oneten_notlog: B56D 3C7D 12375 inc tenth B56F 3CE2 12376 inc Out3Timer B571 B64D 12377 lda rpm B573 C70100 12378 sta rpmlast 12379 B576 B6DB 12380 lda ST2Timer B578 2702 12381 beq ST2Timer_zero B57A 3ADB 12382 dec ST2Timer 12383 ST2Timer_zero: B57C B6DC 12384 lda VE3Timer ; VE Table3 delay timer B57E 2702 12385 beq VE3Timer_zero B580 3ADC 12386 dec VE3Timer 12387 VE3Timer_zero: B582 0C6805 12388 brset UseVE3,EnhancedBits,No_VE3_delay ; Are we running from VE3? B585 C6E05D 12389 lda VE3Delay_f B588 B7DC 12390 sta VE3Timer 12391 No_VE3_delay: B58A 030305 12392 brclr NosIn,portd,No_St2Delay B58D C6E057 12393 lda Spark2Delay_f ; If input not low reset ST2 12394 ; delay timer B590 B7DB 12395 sta ST2Timer 12396 No_St2Delay: 12397 B592 066514 12398 brset taeIgnCount,feature1,No_TPSCount B595 3C7F 12399 inc tpsaclk 12400 12401 ; Save current TPS reading in last_tps variable to compute TPSDOT 12402 ; in acceleration enrichment section 12403 B597 C6E042 12404 lda feature4_f B59A A580 12405 bit #KpaDotSetb B59C 2707 12406 beq tps_dot_mode 12407 ; brclr KpaDotSet,feature4,tps_dot_mode ; If not in KPA dot mode 12408 ;jump past KPa settings B59E B6C9 12409 lda kpa B5A0 2005 12410 bra Kpa_Dot_Mode 12411 ;****** 12412 RTC_DONEJMP: B5A2 CCB613 12413 jmp RTC_DONE 12414 ;****** 12415 tps_dot_mode: B5A5 B647 12416 lda tps 12417 Kpa_Dot_Mode: B5A7 B7CE 12418 sta TPSlast 12419 12420 No_TPSCount: 12421 12422 ; Check Magnus rev limit times 12423 B5A9 B6C2 12424 lda SRevLimTimeLeft ; Check if time left already zero B5AB 2706 12425 beq TimeLeft B5AD 3AC2 12426 dec SRevLimTimeLeft ; Count down time left B5AF 2602 12427 bne TimeLeft ; Time left done B5B1 1262 12428 bset RevLimHSoft,RevLimBits ; Set soft rev limiter fuel cut bit 12429 TimeLeft: 12430 12431 ; increment ALS time, ALS timer B5B3 C6E87F 12432 lda ALS_CONFIG B5B6 A501 12433 bit #%00000001 ; If Anti lag disabled, let's not mess with B5B8 271A 12434 beq NoALSTime ; the bit borrowed from overrun fuel cut. B5BA 060217 12435 brset ALSIn,portc,NoALSTime B5BD C6E875 12436 lda ALS_RPM B5C0 B14D 12437 cmp rpm B5C2 2210 12438 bhi NoALSTime B5C4 C6E87D 12439 lda ALS_TPS B5C7 B147 12440 cmp tps B5C9 2509 12441 blo NoALSTime B5CB C6E881 12442 lda ALS_TIMEOUT B5CE B1D4 12443 cmp OverRunTime B5D0 2302 12444 bls NoALSTime B5D2 3CD4 12445 inc OverRunTime 12446 12447 NoALSTime: 12448 ; end of ALS timer 12449 B5D4 B67D 12450 lda tenth B5D6 A10A 12451 cmp #$0A B5D8 2539 12452 blo RTC_DONE 12453 12454 **************************************************************************** 12455 ********************** seconds section *********************************** 12456 **************************************************************************** 12457 SECONDS: B5DA 3CD4 12458 inc OverRunTime 12459 B5DC 096D07 12460 brclr IdleAdvTimeOK,EnhancedBits6,knock_timer_checks B5DF C6010E 12461 lda idlAdvHld B5E2 4C 12462 inca B5E3 C7010E 12463 sta idlAdvHld 12464 12465 knock_timer_checks: B5E6 B6D6 12466 lda KnockTimLft ; Load the knock timer B5E8 A100 12467 cmp #00T B5EA 2703 12468 beq Secs ; If its zero carry on with seconds B5EC 4A 12469 deca ; If not dec it B5ED B7D6 12470 sta KnocktimLft 12471 Secs: B5EF C6E5B3 12472 lda feature10_f5 B5F2 A501 12473 bit #ASEIgnCountb B5F4 2702 12474 beq sec_cont msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 106 MC68HC908GP32 User Bootloader B5F6 3C81 12475 inc ASEcount 12476 sec_cont: 12477 ; crank mode inhibit 12478 ; make a 1-2 second delay 12479 ; if running and !cranking and !cant_delay then set cant_delay 12480 ; if running and !cranking and cant_delay then set cant_crank 12481 ; else clear cant_delay B5F8 02420E 12482 brset crank,engine,cant_off B5FB 01420B 12483 brclr running,engine,cant_off B5FE 086904 12484 brset cant_delay,EnhancedBits2,cant_set B601 1869 12485 bset cant_delay,EnhancedBits2 B603 2006 12486 bra sec_fin 12487 cant_set: B605 1669 12488 bset cant_crank,EnhancedBits2 B607 2002 12489 bra sec_fin 12490 cant_off: B609 1969 12491 bclr cant_delay,EnhancedBits2 12492 sec_fin: B60B 3F7D 12493 clr tenth B60D 3C40 12494 inc secl ; bump up second count B60F 2602 12495 bne RTC_DONE B611 3C7E 12496 inc sech 12497 12498 RTC_DONE: 12499 ; now check that we haven't already missed the target B613 9B 12500 sei B614 B62D 12501 lda T2CNTL ; unlatch any previous read B616 B62C 12502 lda T2CNTH B618 C701ED 12503 sta itmp00 B61B B62D 12504 lda T2CNTL B61D C701EE 12505 sta itmp01 12506 B620 B632 12507 lda T2CH0L B622 C001EE 12508 sub itmp01 B625 C701F0 12509 sta itmp03 B628 B631 12510 lda T2CH0H B62A C201ED 12511 sbc itmp00 12512 ; sta itmp02 12513 ;assume we need at least 5us? from setting and RTIing before output compare will work B62D 2607 12514 bne RTC_reset ; if high byte non zero then we've already missed it B62F C601F0 12515 lda itmp03 B632 A10A 12516 cmp #10T B634 220F 12517 bhi RTC_DONE2 ; if less than 5us then we are likely to miss it 12518 RTC_reset: B636 C601EE 12519 lda itmp01 B639 AB0A 12520 add #10T ; allow 10us from here to be sure we don't miss it 12521 ; this will cause a "lazy" 0.1ms if it happens often 12522 ; but should eliminate total dropout B63B 97 12523 tax B63C C601ED 12524 lda itmp00 B63F A900 12525 adc #0T B641 B731 12526 sta T2CH0H B643 BF32 12527 stx T2CH0L 12528 12529 RTC_DONE2: 12530 ; bclr TOF,T2SC0 B645 1C30 12531 bset TOIE,T2SC0 ; re-enable 0.1ms interrupt 12532 NOTSPKTIME: ; close branch for below B647 8A 12533 pulh B648 80 12534 rti 12535 12536 *************************************************************************** 12537 ** 12538 ** Spark timing 12539 ** 12540 *************************************************************************** B649 CCBFBA 12541 INT_SPARK_OFFa: jmp INT_SPARK_OFF B64C CCBB1F 12542 j_hires_dwell: jmp hires_dwell 12543 12544 SPARKTIME: B64F 8B 12545 pshh B650 B633 12546 lda T2SC1 ; Read interrupt B652 1F33 12547 bclr CHxF,T2SC1 ; Reset interrupt 12548 B654 0361F0 12549 brclr SparkHSpeed,SparkBits,NOTSPKTIME ; Don't spark 12550 ; on time when going slow B657 086BF2 12551 brset indwell,EnhancedBits4,j_hires_dwell ; start dwell 12552 ; period B65A 086303 12553 brset EDIS,personality,set_spkon B65D 0161E7 12554 brclr SparkTrigg,Sparkbits,NOTSPKTIME ; Should never do this 12555 12556 ;spark cut used to be here, but moved to TIMERROLL to eliminate chance of 12557 ;overheating ignitors when in spark-cut because coils were left switched ON 12558 12559 set_spkon: B660 0161E6 12560 brclr SparkTrigg,Sparkbits,INT_SPARK_OFFa ; Check for 12561 ; spark trigg, used end of pulse 12562 set_spkon2: B663 1662 12563 bset sparkon,revlimbits ; spark now on B665 0C6B71 12564 brset invspk,EnhancedBits4,sson_inv B668 macro 12565 COILNEG ; macro = fire coil for non-inverted B668 00646A 12566 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX B66B 006C1E 12567 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG B66E 0F6432 12568 BRCLR TOY_DLI,OUTPUTPINS,NILS B671 006A06 12569 BRSET COILABIT,COILSEL,FCNITA B674 026A09 12570 BRSET COILBBIT,COILSEL,FCNITB B677 046A0C 12571 BRSET COILCBIT,COILSEL,FCNITC 12572 FCNITA: B67A 1302 12573 BCLR COILB,PORTC B67C 1502 12574 BCLR WLED,PORTC B67E 203D 12575 BRA DSLSA 12576 FCNITB: B680 1202 12577 BSET COILB,PORTC B682 1502 12578 BCLR WLED,PORTC B684 2037 12579 BRA DSLSA 12580 FCNITC: B686 1302 12581 BCLR COILB,PORTC B688 1402 12582 BSET WLED,PORTC B68A 2031 12583 BRA DSLSA 12584 ROT2NEG: B68C 086528 12585 BRSET ROTARYFDIGN,FEATURE1,FIREFD B68F 046A05 12586 BRSET COILCBIT,COILSEL,ROT2CN B692 066A08 12587 BRSET COILDBIT,COILSEL,ROT2DN B695 2026 12588 BRA DSLSA 12589 ROT2CN: B697 1502 12590 BCLR WLED,PORTC B699 1202 12591 BSET COILB,PORTC B69B 203A 12592 BRA CN_END 12593 ROT2DN: B69D 1402 12594 BSET WLED,PORTC B69F 1202 12595 BSET COILB,PORTC B6A1 2034 12596 BRA CN_END 12597 NILS: B6A3 006A17 12598 BRSET COILABIT,COILSEL,DSLSA B6A6 026A18 12599 BRSET COILBBIT,COILSEL,DSLSB B6A9 046A19 12600 BRSET COILCBIT,COILSEL,DSLSC B6AC 066A1A 12601 BRSET COILDBIT,COILSEL,DSLSD B6AF 086A1B 12602 BRSET COILEBIT,COILSEL,DSLSE B6B2 0A6A1C 12603 BRSET COILFBIT,COILSEL,DSLSF B6B5 2020 12604 BRA CN_END 12605 FIREFD: B6B7 046A07 12606 BRSET COILCBIT,COILSEL,DSLSB B6BA 066A08 12607 BRSET COILDBIT,COILSEL,DSLSC 12608 DSLSA: B6BD 1002 12609 BSET COILA,PORTC B6BF 2016 12610 BRA CN_END msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 107 MC68HC908GP32 User Bootloader 12611 DSLSB: B6C1 1202 12612 BSET COILB,PORTC B6C3 2012 12613 BRA CN_END 12614 DSLSC: B6C5 1402 12615 BSET WLED,PORTC B6C7 200E 12616 BRA CN_END 12617 DSLSD: B6C9 1003 12618 BSET OUTPUT3,PORTD B6CB 200A 12619 BRA CN_END 12620 DSLSE: B6CD 1602 12621 BSET PIN10,PORTC B6CF 2006 12622 BRA CN_END 12623 DSLSF: B6D1 1403 12624 BSET KNOCKIN,PORTD B6D3 2002 12625 BRA CN_END 12626 DSLSX: B6D5 1200 12627 BSET IASC,PORTA 12628 CN_END: B6D7 204D 12629 bra SparkOnDone 12630 sson_inv: B6D9 macro 12631 COILPOS ; macro = fire coil for inverted B6D9 006448 12632 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX B6DC 006C14 12633 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS B6DF 006A2A 12634 BRSET COILABIT,COILSEL,ILSOA B6E2 026A2B 12635 BRSET COILBBIT,COILSEL,ILSOB B6E5 046A2C 12636 BRSET COILCBIT,COILSEL,ILSOC B6E8 066A2D 12637 BRSET COILDBIT,COILSEL,ILSOD B6EB 086A2E 12638 BRSET COILEBIT,COILSEL,ILSOE B6EE 0A6A2F 12639 BRSET COILFBIT,COILSEL,ILSOF B6F1 2033 12640 BRA FC_END 12641 ROT2POS: B6F3 086510 12642 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD B6F6 046A05 12643 BRSET COILCBIT,COILSEL,ROT2CP B6F9 066A06 12644 BRSET COILDBIT,COILSEL,ROT2DP B6FC 200E 12645 BRA ILSOA 12646 ROT2CP: B6FE 1302 12647 BCLR COILB,PORTC B700 2024 12648 BRA FC_END 12649 ROT2DP: B702 1302 12650 BCLR COILB,PORTC B704 2020 12651 BRA FC_END 12652 CHARGEFD: B706 046A0B 12653 BRSET COILCBIT,COILSEL,ILSOC B709 066A04 12654 BRSET COILDBIT,COILSEL,ILSOB 12655 ILSOA: B70C 1102 12656 BCLR COILA,PORTC B70E 2016 12657 BRA FC_END 12658 ILSOB: B710 1302 12659 BCLR COILB,PORTC B712 2012 12660 BRA FC_END 12661 ILSOC: B714 1502 12662 BCLR WLED,PORTC B716 200E 12663 BRA FC_END 12664 ILSOD: B718 1103 12665 BCLR OUTPUT3,PORTD B71A 200A 12666 BRA FC_END 12667 ILSOE: B71C 1702 12668 BCLR PIN10,PORTC B71E 2006 12669 BRA FC_END 12670 ILSOF: B720 1503 12671 BCLR KNOCKIN,PORTD B722 2002 12672 BRA FC_END 12673 ILSOX: B724 1300 12674 BCLR IASC,PORTA 12675 FC_END: 12676 SparkOnDone: B726 096306 12677 brclr EDIS,personality,sod_ne B729 CCBC01 12678 jmp set_saw_on B72C CCBAB9 12679 jsod_cd_done: jmp sod_cd_done 12680 12681 sod_ne: B72F 1D33 12682 bclr TOIE,T2SC1 ; Disable interrupts B731 026703 12683 brset dwellcont,feature7,sod_cd B734 0A66F5 12684 brset min_dwell,feature2,jsod_cd_done ; don't schedule 12685 ; here if minimal dwell wanted 12686 sod_cd: B737 macro 12687 CalcDwellspk ; Set spark on time B737 066B2D 12688 BRSET WSPK,ENHANCEDBITS4,WASTEDWELL B73A 55E4 12689 LDHX DWELLDELAY1 B73C 006A0B 12690 BRSET COILABIT,COILSEL,DD_A B73F 026A0C 12691 BRSET COILBBIT,COILSEL,DD_B B742 046A0D 12692 BRSET COILCBIT,COILSEL,DD_C B745 066A0E 12693 BRSET COILDBIT,COILSEL,DD_D B748 200E 12694 BRA JDD_END B74A 35B1 12695 DD_A: STHX SPARKONLEFTAH B74C 200A 12696 BRA JDD_END B74E 35B3 12697 DD_B: STHX SPARKONLEFTBH B750 2006 12698 BRA JDD_END B752 35B5 12699 DD_C: STHX SPARKONLEFTCH B754 2002 12700 BRA JDD_END B756 35B7 12701 DD_D: STHX SPARKONLEFTDH B758 CCBAB9 12702 JDD_END: JMP DD_END B75B CCB977 12703 JWDWELL6OP: JMP WDWELL6OP B75E CCB89D 12704 JWDWELL5OP: JMP WDWELL5OP B761 CCB7FE 12705 JWDWELL4OP: JMP WDWELL4OP B764 CCB7D1 12706 JWDWELL2OP: JMP WDWELL2OP 12707 WASTEDWELL: B767 C6E074 12708 LDA FEATURE8_F B76A A510 12709 BIT #SPKFOPB B76C 26ED 12710 BNE JWDWELL6OP B76E A508 12711 BIT #SPKEOPB B770 26EC 12712 BNE JWDWELL5OP B772 0866EC 12713 BRSET OUT3SPARKD,FEATURE2,JWDWELL4OP B775 0564EC 12714 BRCLR REUSE_LED18,OUTPUTPINS,JWDWELL2OP B778 0764E9 12715 BRCLR REUSE_LED18_2,OUTPUTPINS,JWDWELL2OP 12716 WDWELL3OP: B77B 55E8 12717 LDHX DWELLDELAY3 B77D 006A06 12718 BRSET COILABIT,COILSEL,WD3A360 B780 026A07 12719 BRSET COILBBIT,COILSEL,WD3B360 B783 046A08 12720 BRSET COILCBIT,COILSEL,WD3C360 B786 35B1 12721 WD3A360: STHX SPARKONLEFTAH B788 2006 12722 BRA WD3END360 B78A 35B3 12723 WD3B360: STHX SPARKONLEFTBH B78C 2002 12724 BRA WD3END360 B78E 35B5 12725 WD3C360: STHX SPARKONLEFTCH 12726 WD3END360: B790 B6E4 12727 LDA DWELLDELAY1 B792 2606 12728 BNE WD3OK120 B794 B6E5 12729 LDA DWELLDELAY1+1 B796 A102 12730 CMP #2 B798 2515 12731 BLO WD3SKIP120 12732 WD3OK120: B79A 55E4 12733 LDHX DWELLDELAY1 B79C 006A06 12734 BRSET COILABIT,COILSEL,WD3A120 B79F 026A07 12735 BRSET COILBBIT,COILSEL,WD3B120 B7A2 046A08 12736 BRSET COILCBIT,COILSEL,WD3C120 B7A5 35B3 12737 WD3A120: STHX SPARKONLEFTBH B7A7 2006 12738 BRA WD3END120 B7A9 35B5 12739 WD3B120: STHX SPARKONLEFTCH B7AB 2002 12740 BRA WD3END120 B7AD 35B1 12741 WD3C120: STHX SPARKONLEFTAH 12742 WD3END120: 12743 WD3SKIP120: B7AF B6E6 12744 LDA DWELLDELAY2 B7B1 2606 12745 BNE WD3OK240 B7B3 B6E7 12746 LDA DWELLDELAY2+1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 108 MC68HC908GP32 User Bootloader B7B5 A102 12747 CMP #2 B7B7 2515 12748 BLO WD3END240 12749 WD3OK240: B7B9 55E6 12750 LDHX DWELLDELAY2 B7BB 006A06 12751 BRSET COILABIT,COILSEL,WD3A240 B7BE 026A07 12752 BRSET COILBBIT,COILSEL,WD3B240 B7C1 046A08 12753 BRSET COILCBIT,COILSEL,WD3C240 B7C4 35B5 12754 WD3A240: STHX SPARKONLEFTCH B7C6 2006 12755 BRA WD3END240 B7C8 35B1 12756 WD3B240: STHX SPARKONLEFTAH B7CA 2002 12757 BRA WD3END240 B7CC 35B3 12758 WD3C240: STHX SPARKONLEFTBH B7CE CCBAB9 12759 WD3END240: JMP DD_END 12760 WDWELL2OP: B7D1 55E6 12761 LDHX DWELLDELAY2 B7D3 026A04 12762 BRSET COILBBIT,COILSEL,WD2B360 B7D6 35B1 12763 WD2A360: STHX SPARKONLEFTAH B7D8 2002 12764 BRA WD2END360 B7DA 35B3 12765 WD2B360: STHX SPARKONLEFTBH 12766 WD2END360: B7DC C6E3AD 12767 LDA SPARKCONFIG1_F B7DF A510 12768 BIT #M_SC1ODDFIRE B7E1 2618 12769 BNE WD2SKIP B7E3 B6E4 12770 LDA DWELLDELAY1 B7E5 2606 12771 BNE WD2OK B7E7 B6E5 12772 LDA DWELLDELAY1+1 B7E9 A102 12773 CMP #2 B7EB 250E 12774 BLO WD2SKIP 12775 WD2OK: B7ED 55E4 12776 LDHX DWELLDELAY1 B7EF 006A03 12777 BRSET COILABIT,COILSEL,WD2A180 B7F2 026A04 12778 BRSET COILBBIT,COILSEL,WD2B180 B7F5 35B3 12779 WD2A180: STHX SPARKONLEFTBH B7F7 2002 12780 BRA WD2END180 B7F9 35B1 12781 WD2B180: STHX SPARKONLEFTAH 12782 WD2END180: B7FB CCBAB9 12783 WD2SKIP: JMP DD_END 12784 WDWELL4OP: B7FE 55EA 12785 LDHX DWELLDELAY4 B800 006A09 12786 BRSET COILABIT,COILSEL,WD4A360 B803 026A0A 12787 BRSET COILBBIT,COILSEL,WD4B360 B806 046A0B 12788 BRSET COILCBIT,COILSEL,WD4C360 B809 066A0C 12789 BRSET COILDBIT,COILSEL,WD4D360 B80C 35B1 12790 WD4A360: STHX SPARKONLEFTAH B80E 200A 12791 BRA WD4END360 B810 35B3 12792 WD4B360: STHX SPARKONLEFTBH B812 2006 12793 BRA WD4END360 B814 35B5 12794 WD4C360: STHX SPARKONLEFTCH B816 2002 12795 BRA WD4END360 B818 35B7 12796 WD4D360: STHX SPARKONLEFTDH 12797 WD4END360: B81A C6E3AD 12798 LDA SPARKCONFIG1_F B81D A510 12799 BIT #M_SC1ODDFIRE B81F 2626 12800 BNE WD4SKIP90 B821 B6E4 12801 LDA DWELLDELAY1 B823 2606 12802 BNE WD4OK90 B825 B6E5 12803 LDA DWELLDELAY1+1 B827 A102 12804 CMP #2 B829 251C 12805 BLO WD4SKIP90 12806 WD4OK90: B82B 55E4 12807 LDHX DWELLDELAY1 B82D 006A09 12808 BRSET COILABIT,COILSEL,WD4A90 B830 026A0A 12809 BRSET COILBBIT,COILSEL,WD4B90 B833 046A0B 12810 BRSET COILCBIT,COILSEL,WD4C90 B836 066A0C 12811 BRSET COILDBIT,COILSEL,WD4D90 B839 35B3 12812 WD4A90: STHX SPARKONLEFTBH B83B 200A 12813 BRA WD4END90 B83D 35B5 12814 WD4B90: STHX SPARKONLEFTCH B83F 2006 12815 BRA WD4END90 B841 35B7 12816 WD4C90: STHX SPARKONLEFTDH B843 2002 12817 BRA WD4END90 B845 35B1 12818 WD4D90: STHX SPARKONLEFTAH 12819 WD4END90: 12820 WD4SKIP90: B847 B6E6 12821 LDA DWELLDELAY2 B849 2606 12822 BNE WD4OK180 B84B B6E7 12823 LDA DWELLDELAY2+1 B84D A102 12824 CMP #2 B84F 251C 12825 BLO WD4SKIP180 12826 WD4OK180: B851 55E6 12827 LDHX DWELLDELAY2 B853 006A09 12828 BRSET COILABIT,COILSEL,WD4A180 B856 026A0A 12829 BRSET COILBBIT,COILSEL,WD4B180 B859 046A0B 12830 BRSET COILCBIT,COILSEL,WD4C180 B85C 066A0C 12831 BRSET COILDBIT,COILSEL,WD4D180 B85F 35B5 12832 WD4A180: STHX SPARKONLEFTCH B861 200A 12833 BRA WD4END180 B863 35B7 12834 WD4B180: STHX SPARKONLEFTDH B865 2006 12835 BRA WD4END180 B867 35B1 12836 WD4C180: STHX SPARKONLEFTAH B869 2002 12837 BRA WD4END180 B86B 35B3 12838 WD4D180: STHX SPARKONLEFTBH 12839 WD4END180: 12840 WD4SKIP180: B86D C6E3AD 12841 LDA SPARKCONFIG1_F B870 A510 12842 BIT #M_SC1ODDFIRE B872 2626 12843 BNE WD4END270 B874 B6E8 12844 LDA DWELLDELAY3 B876 2606 12845 BNE WD4OK270 B878 B6E9 12846 LDA DWELLDELAY3+1 B87A A102 12847 CMP #2 B87C 251C 12848 BLO WD4END270 12849 WD4OK270: B87E 55E8 12850 LDHX DWELLDELAY3 B880 006A09 12851 BRSET COILABIT,COILSEL,WD4A270 B883 026A0A 12852 BRSET COILBBIT,COILSEL,WD4B270 B886 046A0B 12853 BRSET COILCBIT,COILSEL,WD4C270 B889 066A0C 12854 BRSET COILDBIT,COILSEL,WD4D270 B88C 35B7 12855 WD4A270: STHX SPARKONLEFTDH B88E 200A 12856 BRA WD4END270 B890 35B1 12857 WD4B270: STHX SPARKONLEFTAH B892 2006 12858 BRA WD4END270 B894 35B3 12859 WD4C270: STHX SPARKONLEFTBH B896 2002 12860 BRA WD4END270 B898 35B5 12861 WD4D270: STHX SPARKONLEFTCH 12862 WD4END270: B89A CCBAB9 12863 JMP DD_END 12864 WDWELL5OP: B89D 55EC 12865 LDHX DWELLDELAY5 B89F 006A0C 12866 BRSET COILABIT,COILSEL,WD5A360 B8A2 026A0D 12867 BRSET COILBBIT,COILSEL,WD5B360 B8A5 046A0E 12868 BRSET COILCBIT,COILSEL,WD5C360 B8A8 066A0F 12869 BRSET COILDBIT,COILSEL,WD5D360 B8AB 086A10 12870 BRSET COILEBIT,COILSEL,WD5E360 B8AE 35B1 12871 WD5A360: STHX SPARKONLEFTAH B8B0 200E 12872 BRA WD5END360 B8B2 35B3 12873 WD5B360: STHX SPARKONLEFTBH B8B4 200A 12874 BRA WD5END360 B8B6 35B5 12875 WD5C360: STHX SPARKONLEFTCH B8B8 2006 12876 BRA WD5END360 B8BA 35B7 12877 WD5D360: STHX SPARKONLEFTDH B8BC 2002 12878 BRA WD5END360 B8BE 35B9 12879 WD5E360: STHX SPARKONLEFTEH 12880 WD5END360: B8C0 B6E4 12881 LDA DWELLDELAY1 B8C2 2606 12882 BNE WD5OK72 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 109 MC68HC908GP32 User Bootloader B8C4 B6E5 12883 LDA DWELLDELAY1+1 B8C6 A102 12884 CMP #2 B8C8 2523 12885 BLO WD5SKIP72 12886 WD5OK72: B8CA 55E4 12887 LDHX DWELLDELAY1 B8CC 006A0C 12888 BRSET COILABIT,COILSEL,WD5A72 B8CF 026A0D 12889 BRSET COILBBIT,COILSEL,WD5B72 B8D2 046A0E 12890 BRSET COILCBIT,COILSEL,WD5C72 B8D5 066A0F 12891 BRSET COILDBIT,COILSEL,WD5D72 B8D8 086A10 12892 BRSET COILEBIT,COILSEL,WD5E72 B8DB 35B3 12893 WD5A72: STHX SPARKONLEFTBH B8DD 200E 12894 BRA WD5END72 B8DF 35B5 12895 WD5B72: STHX SPARKONLEFTCH B8E1 200A 12896 BRA WD5END72 B8E3 35B7 12897 WD5C72: STHX SPARKONLEFTDH B8E5 2006 12898 BRA WD5END72 B8E7 35B9 12899 WD5D72: STHX SPARKONLEFTEH B8E9 2002 12900 BRA WD5END72 B8EB 35B1 12901 WD5E72: STHX SPARKONLEFTAH 12902 WD5END72: 12903 WD5SKIP72: B8ED B6E6 12904 LDA DWELLDELAY2 B8EF 2606 12905 BNE WD5OK144 B8F1 B6E7 12906 LDA DWELLDELAY2+1 B8F3 A102 12907 CMP #2 B8F5 2523 12908 BLO WD5SKIP144 12909 WD5OK144: B8F7 55E6 12910 LDHX DWELLDELAY2 B8F9 006A0C 12911 BRSET COILABIT,COILSEL,WD5A144 B8FC 026A0D 12912 BRSET COILBBIT,COILSEL,WD5B144 B8FF 046A0E 12913 BRSET COILCBIT,COILSEL,WD5C144 B902 066A0F 12914 BRSET COILDBIT,COILSEL,WD5D144 B905 086A10 12915 BRSET COILEBIT,COILSEL,WD5E144 B908 35B5 12916 WD5A144: STHX SPARKONLEFTCH B90A 200E 12917 BRA WD5END144 B90C 35B7 12918 WD5B144: STHX SPARKONLEFTDH B90E 200A 12919 BRA WD5END144 B910 35B9 12920 WD5C144: STHX SPARKONLEFTEH B912 2006 12921 BRA WD5END144 B914 35B1 12922 WD5D144: STHX SPARKONLEFTAH B916 2002 12923 BRA WD5END144 B918 35B3 12924 WD5E144: STHX SPARKONLEFTBH 12925 WD5END144: 12926 WD5SKIP144: B91A B6E8 12927 LDA DWELLDELAY3 B91C 2606 12928 BNE WD5OK216 B91E B6E9 12929 LDA DWELLDELAY3+1 B920 A102 12930 CMP #2 B922 2523 12931 BLO WD5SKIP216 12932 WD5OK216: B924 55E8 12933 LDHX DWELLDELAY3 B926 006A0C 12934 BRSET COILABIT,COILSEL,WD5A216 B929 026A0D 12935 BRSET COILBBIT,COILSEL,WD5B216 B92C 046A0E 12936 BRSET COILCBIT,COILSEL,WD5C216 B92F 066A0F 12937 BRSET COILDBIT,COILSEL,WD5D216 B932 086A10 12938 BRSET COILEBIT,COILSEL,WD5E216 B935 35B7 12939 WD5A216: STHX SPARKONLEFTDH B937 200E 12940 BRA WD5END216 B939 35B9 12941 WD5B216: STHX SPARKONLEFTEH B93B 200A 12942 BRA WD5END216 B93D 35B1 12943 WD5C216: STHX SPARKONLEFTAH B93F 2006 12944 BRA WD5END216 B941 35B3 12945 WD5D216: STHX SPARKONLEFTBH B943 2002 12946 BRA WD5END216 B945 35B5 12947 WD5E216: STHX SPARKONLEFTCH 12948 WD5END216: 12949 WD5SKIP216: B947 B6EA 12950 LDA DWELLDELAY4 B949 2606 12951 BNE WD5OK288 B94B B6EB 12952 LDA DWELLDELAY4+1 B94D A102 12953 CMP #2 B94F 2523 12954 BLO WD5SKIP288 12955 WD5OK288: B951 55EA 12956 LDHX DWELLDELAY4 B953 006A0C 12957 BRSET COILABIT,COILSEL,WD5A288 B956 026A0D 12958 BRSET COILBBIT,COILSEL,WD5B288 B959 046A0E 12959 BRSET COILCBIT,COILSEL,WD5C288 B95C 066A0F 12960 BRSET COILDBIT,COILSEL,WD5D288 B95F 086A10 12961 BRSET COILEBIT,COILSEL,WD5E288 B962 35B9 12962 WD5A288: STHX SPARKONLEFTEH B964 200E 12963 BRA WD5END288 B966 35B1 12964 WD5B288: STHX SPARKONLEFTAH B968 200A 12965 BRA WD5END288 B96A 35B3 12966 WD5C288: STHX SPARKONLEFTBH B96C 2006 12967 BRA WD5END288 B96E 35B5 12968 WD5D288: STHX SPARKONLEFTCH B970 2002 12969 BRA WD5END288 B972 35B7 12970 WD5E288: STHX SPARKONLEFTDH 12971 WD5END288: 12972 WD5SKIP288: B974 CCBAB9 12973 JMP DD_END 12974 WDWELL6OP: B977 55EE 12975 LDHX DWELLDELAY6 B979 026A10 12976 BRSET COILBBIT,COILSEL,WD6B360 B97C 046A11 12977 BRSET COILCBIT,COILSEL,WD6C360 B97F 066A12 12978 BRSET COILDBIT,COILSEL,WD6D360 B982 086A13 12979 BRSET COILEBIT,COILSEL,WD6E360 B985 0A6A14 12980 BRSET COILFBIT,COILSEL,WD6F360 B988 35B1 12981 WD6A360: STHX SPARKONLEFTAH B98A 2012 12982 BRA WD6END360 B98C 35B3 12983 WD6B360: STHX SPARKONLEFTBH B98E 200E 12984 BRA WD6END360 B990 35B5 12985 WD6C360: STHX SPARKONLEFTCH B992 200A 12986 BRA WD6END360 B994 35B7 12987 WD6D360: STHX SPARKONLEFTDH B996 2006 12988 BRA WD6END360 B998 35B9 12989 WD6E360: STHX SPARKONLEFTEH B99A 2002 12990 BRA WD6END360 B99C 35BB 12991 WD6F360: STHX SPARKONLEFTFH 12992 WD6END360: B99E C6E3AD 12993 LDA SPARKCONFIG1_F B9A1 A510 12994 BIT #M_SC1ODDFIRE B9A3 2634 12995 BNE WD6SKIP60 B9A5 B6E4 12996 LDA DWELLDELAY1 B9A7 2606 12997 BNE WD6OK60 B9A9 B6E5 12998 LDA DWELLDELAY1+1 B9AB A105 12999 CMP #5 B9AD 252A 13000 BLO WD6SKIP60 13001 WD6OK60: B9AF 55E4 13002 LDHX DWELLDELAY1 B9B1 006A0F 13003 BRSET COILABIT,COILSEL,WD6A60 B9B4 026A10 13004 BRSET COILBBIT,COILSEL,WD6B60 B9B7 046A11 13005 BRSET COILCBIT,COILSEL,WD6C60 B9BA 066A12 13006 BRSET COILDBIT,COILSEL,WD6D60 B9BD 086A13 13007 BRSET COILEBIT,COILSEL,WD6E60 B9C0 0A6A14 13008 BRSET COILFBIT,COILSEL,WD6F60 B9C3 35B3 13009 WD6A60: STHX SPARKONLEFTBH B9C5 2012 13010 BRA WD6END60 B9C7 35B5 13011 WD6B60: STHX SPARKONLEFTCH B9C9 200E 13012 BRA WD6END60 B9CB 35B7 13013 WD6C60: STHX SPARKONLEFTDH B9CD 200A 13014 BRA WD6END60 B9CF 35B9 13015 WD6D60: STHX SPARKONLEFTEH B9D1 2006 13016 BRA WD6END60 B9D3 35BB 13017 WD6E60: STHX SPARKONLEFTFH B9D5 2002 13018 BRA WD6END60 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 110 MC68HC908GP32 User Bootloader B9D7 35B1 13019 WD6F60: STHX SPARKONLEFTAH 13020 WD6END60: 13021 WD6SKIP60: B9D9 B6E6 13022 LDA DWELLDELAY2 B9DB 2606 13023 BNE WD6OK120 B9DD B6E7 13024 LDA DWELLDELAY2+1 B9DF A105 13025 CMP #5 B9E1 252A 13026 BLO WD6SKIP120 13027 WD6OK120: B9E3 55E6 13028 LDHX DWELLDELAY2 B9E5 006A0F 13029 BRSET COILABIT,COILSEL,WD6A120 B9E8 026A10 13030 BRSET COILBBIT,COILSEL,WD6B120 B9EB 046A11 13031 BRSET COILCBIT,COILSEL,WD6C120 B9EE 066A12 13032 BRSET COILDBIT,COILSEL,WD6D120 B9F1 086A13 13033 BRSET COILEBIT,COILSEL,WD6E120 B9F4 0A6A14 13034 BRSET COILFBIT,COILSEL,WD6F120 B9F7 35B5 13035 WD6A120: STHX SPARKONLEFTCH B9F9 2012 13036 BRA WD6END120 B9FB 35B7 13037 WD6B120: STHX SPARKONLEFTDH B9FD 200E 13038 BRA WD6END120 B9FF 35B9 13039 WD6C120: STHX SPARKONLEFTEH BA01 200A 13040 BRA WD6END120 BA03 35BB 13041 WD6D120: STHX SPARKONLEFTFH BA05 2006 13042 BRA WD6END120 BA07 35B1 13043 WD6E120: STHX SPARKONLEFTAH BA09 2002 13044 BRA WD6END120 BA0B 35B3 13045 WD6F120: STHX SPARKONLEFTBH 13046 WD6END120: 13047 WD6SKIP120: BA0D C6E3AD 13048 LDA SPARKCONFIG1_F BA10 A510 13049 BIT #M_SC1ODDFIRE BA12 2636 13050 BNE WD6SKIP180 BA14 B6E8 13051 LDA DWELLDELAY3 BA16 2606 13052 BNE WD6OK180 BA18 B6E9 13053 LDA DWELLDELAY3+1 BA1A A105 13054 CMP #5 BA1C 252C 13055 BLO WD6SKIP180 13056 WD6OK180: BA1E 55E8 13057 LDHX DWELLDELAY3 BA20 006A0F 13058 BRSET COILABIT,COILSEL,WD6A180 BA23 026A10 13059 BRSET COILBBIT,COILSEL,WD6B180 BA26 046A11 13060 BRSET COILCBIT,COILSEL,WD6C180 BA29 066A12 13061 BRSET COILDBIT,COILSEL,WD6D180 BA2C 086A13 13062 BRSET COILEBIT,COILSEL,WD6E180 BA2F 0A6A14 13063 BRSET COILFBIT,COILSEL,WD6F180 BA32 35B7 13064 WD6A180: STHX SPARKONLEFTDH BA34 2012 13065 BRA WD6END180 BA36 35B9 13066 WD6B180: STHX SPARKONLEFTEH BA38 200E 13067 BRA WD6END180 BA3A 35BB 13068 WD6C180: STHX SPARKONLEFTFH BA3C 200A 13069 BRA WD6END180 BA3E 35B1 13070 WD6D180: STHX SPARKONLEFTAH BA40 2006 13071 BRA WD6END180 BA42 35B3 13072 WD6E180: STHX SPARKONLEFTBH BA44 2002 13073 BRA WD6END180 BA46 35B5 13074 WD6F180: STHX SPARKONLEFTCH 13075 WD6END180: BA48 206F 13076 BRA DD_END 13077 WD6SKIP180: BA4A B6EA 13078 LDA DWELLDELAY4 BA4C 2606 13079 BNE WD6OK240 BA4E B6EB 13080 LDA DWELLDELAY4+1 BA50 A105 13081 CMP #5 BA52 252A 13082 BLO WD6SKIP240 13083 WD6OK240: BA54 55EA 13084 LDHX DWELLDELAY4 BA56 006A0F 13085 BRSET COILABIT,COILSEL,WD6A240 BA59 026A10 13086 BRSET COILBBIT,COILSEL,WD6B240 BA5C 046A11 13087 BRSET COILCBIT,COILSEL,WD6C240 BA5F 066A12 13088 BRSET COILDBIT,COILSEL,WD6D240 BA62 086A13 13089 BRSET COILEBIT,COILSEL,WD6E240 BA65 0A6A14 13090 BRSET COILFBIT,COILSEL,WD6F240 BA68 35B9 13091 WD6A240: STHX SPARKONLEFTEH BA6A 2012 13092 BRA WD6END240 BA6C 35BB 13093 WD6B240: STHX SPARKONLEFTFH BA6E 200E 13094 BRA WD6END240 BA70 35B1 13095 WD6C240: STHX SPARKONLEFTAH BA72 200A 13096 BRA WD6END240 BA74 35B3 13097 WD6D240: STHX SPARKONLEFTBH BA76 2006 13098 BRA WD6END240 BA78 35B5 13099 WD6E240: STHX SPARKONLEFTCH BA7A 2002 13100 BRA WD6END240 BA7C 35B7 13101 WD6F240: STHX SPARKONLEFTDH 13102 WD6END240: 13103 WD6SKIP240: BA7E C6E3AD 13104 LDA SPARKCONFIG1_F BA81 A510 13105 BIT #M_SC1ODDFIRE BA83 2634 13106 BNE WD6SKIP300 BA85 B6EC 13107 LDA DWELLDELAY5 BA87 2606 13108 BNE WD6OK300 BA89 B6ED 13109 LDA DWELLDELAY5+1 BA8B A105 13110 CMP #5 BA8D 252A 13111 BLO WD6SKIP300 13112 WD6OK300: BA8F 55EC 13113 LDHX DWELLDELAY5 BA91 006A0F 13114 BRSET COILABIT,COILSEL,WD6A300 BA94 026A10 13115 BRSET COILBBIT,COILSEL,WD6B300 BA97 046A11 13116 BRSET COILCBIT,COILSEL,WD6C300 BA9A 066A12 13117 BRSET COILDBIT,COILSEL,WD6D300 BA9D 086A13 13118 BRSET COILEBIT,COILSEL,WD6E300 BAA0 0A6A14 13119 BRSET COILFBIT,COILSEL,WD6F300 BAA3 35B9 13120 WD6A300: STHX SPARKONLEFTEH BAA5 2012 13121 BRA WD6END300 BAA7 35BB 13122 WD6B300: STHX SPARKONLEFTFH BAA9 200E 13123 BRA WD6END300 BAAB 35B1 13124 WD6C300: STHX SPARKONLEFTAH BAAD 200A 13125 BRA WD6END300 BAAF 35B3 13126 WD6D300: STHX SPARKONLEFTBH BAB1 2006 13127 BRA WD6END300 BAB3 35B5 13128 WD6E300: STHX SPARKONLEFTCH BAB5 2002 13129 BRA WD6END300 BAB7 35B7 13130 WD6F300: STHX SPARKONLEFTDH 13131 WD6END300: 13132 WD6SKIP300: 13133 DD_END: 13134 sod_cd_done: 13135 ;now check if we should schedule a trailing spark BAB9 006C04 13136 brset rotary2,EnhancedBits5,chktrail 13137 sparktime_exit: BABC 1161 13138 bclr SparkTrigg,Sparkbits ; No more sparks for this IRQ 13139 NOT_SPARK_TIME: BABE 8A 13140 pulh BABF 80 13141 rti 13142 13143 ;if in twin rotor mode, check to see if we should schedule or fire the trailing 13144 chktrail: BAC0 046AF9 13145 brset coilcbit,coilsel,sparktime_exit ; already done - exit BAC3 066AF6 13146 brset coildbit,coilsel,sparktime_exit ; already done - exit 13147 BAC6 026A06 13148 brset coilbbit,coilsel,ctb BAC9 3F6A 13149 clr coilsel BACB 146A 13150 bset coilcbit,coilsel ; was coila, now coilc BACD 2004 13151 bra ct_done 13152 ctb: BACF 3F6A 13153 clr coilsel BAD1 166A 13154 bset coildbit,coilsel ; was coilc, now coild msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 111 MC68HC908GP32 User Bootloader 13155 ct_done: 13156 ; if trailing split off still "fire the coil" now just in case we have 13157 ; already started charging it - don't want to burn out coil as we 13158 ; transition from trailing to no trailing 13159 ; "lowspdspk" code checks and doesn't turn coil on if trailing is off, 13160 ; see that section within 0.1ms 13161 BAD3 096C3A 13162 brclr rsh_s,EnhancedBits5,force_trail_off ; if split out of range then OFF BAD6 0B6C37 13163 brclr rsh_r,EnhancedBits5,force_trail_off ; if rpm out of range then OFF 13164 BAD9 B6FC 13165 lda splitdelH BADB 2707 13166 beq split_min ; is zero so check for short split BADD A1FF 13167 cmp #$FF BADF 260C 13168 bne split_timed BAE1 CCBB10 13169 jmp force_trail_off ; ensure trailing coil off 13170 ;maybe need some hysteresis with this to avoid jittery behaviour 13171 13172 ;check if split < 64us, then fire now 13173 split_min: BAE4 B6FD 13174 lda splitdelL BAE6 A140 13175 cmp #64T ; 64us BAE8 2203 13176 bhi split_timed 13177 ;split_min_set: 13178 ; clr splitdelL 13179 ; mov #64T,splitdelH BAEA CCB663 13180 jmp set_spkon2 ; jump back up to fire next spark 13181 split_timed: BAED B62D 13182 lda T2CNTL ; unlatch low byte 13183 BAEF BE2C 13184 ldx T2CNTH BAF1 CF0203 13185 stx T2CurrH ; Save current counter value BAF4 B62D 13186 lda T2CNTL BAF6 C70204 13187 sta T2CurrL ; Save current counter value 13188 BAF9 C60204 13189 lda T2CurrL BAFC BBFD 13190 add splitdelL BAFE 97 13191 tax BAFF C60203 13192 lda T2CurrH BB02 B9FC 13193 adc splitdelH BB04 B734 13194 sta T2CH1H BB06 BF35 13195 stx T2CH1L 13196 BB08 1061 13197 bset SparkTrigg,Sparkbits ; keep spark enabled 13198 BB0A 1F33 13199 bclr TOF,T2SC1 ; clear any pending interrupt BB0C 1C33 13200 bset TOIE,T2SC1 ; Enable timer interrupt BB0E 8A 13201 pulh BB0F 80 13202 rti 13203 13204 force_trail_off: 13205 ;ensure trailing coil is really off BB10 1402 13206 bset wled,portc BB12 0C6B04 13207 brset invspk,EnhancedBits4,to_inv BB15 1202 13208 bset coilb,portc BB17 2002 13209 bra to_exit BB19 1302 13210 to_inv: bclr coilb,portc 13211 to_exit: BB1B 1161 13212 bclr SparkTrigg,Sparkbits ; No more sparks for this IRQ 13213 ;kill the dwell timers for trailing in the mainloop BB1D 8A 13214 pulh BB1E 80 13215 rti 13216 13217 hires_dwell: 13218 ; never do trailing dwell in "hi-res" so no need to 13219 ; consider trailing here 13220 13221 ;first turn on coil, then reset T2 to spark point saved in sparktargetH/L 13222 ;spark cut- actually cut the coil-on BB1F B6D5 13223 lda SparkCutCnt ; Check Spark Counter BB21 4C 13224 inca BB22 C1E04E 13225 cmp SparkCutBase_f ; How many sparks to count to BB25 2502 13226 blo Dont_ResetCnt2 BB27 A601 13227 lda #01T 13228 Dont_ResetCnt2: BB29 B7D5 13229 sta SparkCutCnt ; Store new value to spark counter BB2B 0A6250 13230 brset sparkCut,RevLimBits,bhrds ; If in spark cut 13231 ; mode jump past spark 13232 BB2E 0C6B4F 13233 brset invspk,EnhancedBits4,hrd_inv BB31 macro 13234 COILPOS ; macro = charge coil for non-inverted BB31 006448 13235 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX BB34 006C14 13236 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS BB37 006A2A 13237 BRSET COILABIT,COILSEL,ILSOA BB3A 026A2B 13238 BRSET COILBBIT,COILSEL,ILSOB BB3D 046A2C 13239 BRSET COILCBIT,COILSEL,ILSOC BB40 066A2D 13240 BRSET COILDBIT,COILSEL,ILSOD BB43 086A2E 13241 BRSET COILEBIT,COILSEL,ILSOE BB46 0A6A2F 13242 BRSET COILFBIT,COILSEL,ILSOF BB49 2033 13243 BRA FC_END 13244 ROT2POS: BB4B 086510 13245 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD BB4E 046A05 13246 BRSET COILCBIT,COILSEL,ROT2CP BB51 066A06 13247 BRSET COILDBIT,COILSEL,ROT2DP BB54 200E 13248 BRA ILSOA 13249 ROT2CP: BB56 1302 13250 BCLR COILB,PORTC BB58 2024 13251 BRA FC_END 13252 ROT2DP: BB5A 1302 13253 BCLR COILB,PORTC BB5C 2020 13254 BRA FC_END 13255 CHARGEFD: BB5E 046A0B 13256 BRSET COILCBIT,COILSEL,ILSOC BB61 066A04 13257 BRSET COILDBIT,COILSEL,ILSOB 13258 ILSOA: BB64 1102 13259 BCLR COILA,PORTC BB66 2016 13260 BRA FC_END 13261 ILSOB: BB68 1302 13262 BCLR COILB,PORTC BB6A 2012 13263 BRA FC_END 13264 ILSOC: BB6C 1502 13265 BCLR WLED,PORTC BB6E 200E 13266 BRA FC_END 13267 ILSOD: BB70 1103 13268 BCLR OUTPUT3,PORTD BB72 200A 13269 BRA FC_END 13270 ILSOE: BB74 1702 13271 BCLR PIN10,PORTC BB76 2006 13272 BRA FC_END 13273 ILSOF: BB78 1503 13274 BCLR KNOCKIN,PORTD BB7A 2002 13275 BRA FC_END 13276 ILSOX: BB7C 1300 13277 BCLR IASC,PORTA 13278 FC_END: 13279 bhrds: BB7E 206F 13280 bra hrd_set 13281 hrd_inv: BB80 macro 13282 COILNEG ; macro = charge coil for inverted BB80 00646A 13283 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX BB83 006C1E 13284 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG BB86 0F6432 13285 BRCLR TOY_DLI,OUTPUTPINS,NILS BB89 006A06 13286 BRSET COILABIT,COILSEL,FCNITA BB8C 026A09 13287 BRSET COILBBIT,COILSEL,FCNITB BB8F 046A0C 13288 BRSET COILCBIT,COILSEL,FCNITC 13289 FCNITA: BB92 1302 13290 BCLR COILB,PORTC msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 112 MC68HC908GP32 User Bootloader BB94 1502 13291 BCLR WLED,PORTC BB96 203D 13292 BRA DSLSA 13293 FCNITB: BB98 1202 13294 BSET COILB,PORTC BB9A 1502 13295 BCLR WLED,PORTC BB9C 2037 13296 BRA DSLSA 13297 FCNITC: BB9E 1302 13298 BCLR COILB,PORTC BBA0 1402 13299 BSET WLED,PORTC BBA2 2031 13300 BRA DSLSA 13301 ROT2NEG: BBA4 086528 13302 BRSET ROTARYFDIGN,FEATURE1,FIREFD BBA7 046A05 13303 BRSET COILCBIT,COILSEL,ROT2CN BBAA 066A08 13304 BRSET COILDBIT,COILSEL,ROT2DN BBAD 2026 13305 BRA DSLSA 13306 ROT2CN: BBAF 1502 13307 BCLR WLED,PORTC BBB1 1202 13308 BSET COILB,PORTC BBB3 203A 13309 BRA CN_END 13310 ROT2DN: BBB5 1402 13311 BSET WLED,PORTC BBB7 1202 13312 BSET COILB,PORTC BBB9 2034 13313 BRA CN_END 13314 NILS: BBBB 006A17 13315 BRSET COILABIT,COILSEL,DSLSA BBBE 026A18 13316 BRSET COILBBIT,COILSEL,DSLSB BBC1 046A19 13317 BRSET COILCBIT,COILSEL,DSLSC BBC4 066A1A 13318 BRSET COILDBIT,COILSEL,DSLSD BBC7 086A1B 13319 BRSET COILEBIT,COILSEL,DSLSE BBCA 0A6A1C 13320 BRSET COILFBIT,COILSEL,DSLSF BBCD 2020 13321 BRA CN_END 13322 FIREFD: BBCF 046A07 13323 BRSET COILCBIT,COILSEL,DSLSB BBD2 066A08 13324 BRSET COILDBIT,COILSEL,DSLSC 13325 DSLSA: BBD5 1002 13326 BSET COILA,PORTC BBD7 2016 13327 BRA CN_END 13328 DSLSB: BBD9 1202 13329 BSET COILB,PORTC BBDB 2012 13330 BRA CN_END 13331 DSLSC: BBDD 1402 13332 BSET WLED,PORTC BBDF 200E 13333 BRA CN_END 13334 DSLSD: BBE1 1003 13335 BSET OUTPUT3,PORTD BBE3 200A 13336 BRA CN_END 13337 DSLSE: BBE5 1602 13338 BSET PIN10,PORTC BBE7 2006 13339 BRA CN_END 13340 DSLSF: BBE9 1403 13341 BSET KNOCKIN,PORTD BBEB 2002 13342 BRA CN_END 13343 DSLSX: BBED 1200 13344 BSET IASC,PORTA 13345 CN_END: 13346 hrd_set: BBEF 196B 13347 bclr indwell,EnhancedBits4 ; turn it off so next 13348 ; sparktime fires coil BBF1 1762 13349 bclr sparkon,revlimbits ; spark now on 13350 ;store pre-calculated spark time into timer and set it off BBF3 B6F7 13351 lda SparkTargetH BBF5 B734 13352 sta T2CH1H BBF7 B6F8 13353 lda SparkTargetL BBF9 B735 13354 sta T2CH1L 13355 BBFB 1F33 13356 bclr TOF,T2SC1 ; clear any pending interrupt BBFD 1C33 13357 bset TOIE,T2SC1 ; Enable timer interrupt 13358 BBFF 8A 13359 pulh BC00 80 13360 rti 13361 13362 set_saw_on: ; now set timer for SAW on period 13363 ; using sawh/l calculated in main loop 13364 13365 ;Calculate width of SAW pulse 13366 ;grab current timer values - uses same variable as squirt section below. But no cli so ok BC01 B62D 13367 lda T2CNTL ; unlatch low byte BC03 BE2C 13368 ldx T2CNTH BC05 CF0203 13369 stx T2CurrH ; Save current counter value BC08 B62D 13370 lda T2CNTL BC0A C70204 13371 sta T2CurrL ; Save current counter value 13372 BC0D 03420C 13373 brclr crank,engine,SAW_COUNTER BC10 C6E042 13374 lda feature4_f BC13 A508 13375 bit #multisparkb BC15 2705 13376 beq SAW_COUNTER 13377 ; brclr multispark,feature4,SAW_COUNTER 13378 13379 ; at crank we always send 2048us as calibration and multi-spark init BC17 3FF1 13380 clr sawl BC19 6E08F0 13381 mov #$08,sawh 13382 13383 ;Read the calculated width and store in timer 13384 SAW_COUNTER: BC1C B6F1 13385 lda sawl BC1E CB0204 13386 add T2CurrL BC21 97 13387 tax BC22 B6F0 13388 lda sawh BC24 C90203 13389 adc T2CurrH BC27 B734 13390 sta T2CH1H BC29 BF35 13391 stx T2CH1L 13392 BC2B 1161 13393 bclr SparkTrigg,Sparkbits ; Clear spark trigg. 13394 ; Next time we get int turn off SAW 13395 BC2D 1F33 13396 bclr TOF,T2SC1 ; clear any pending interrupt BC2F 1C33 13397 bset TOIE,T2SC1 ; Enable timer interrupt 13398 BC31 0A6302 13399 brset DUALEDIS,personality,set_edis2 BC34 8A 13400 pulh BC35 80 13401 rti 13402 set_edis2: BC36 macro 13403 CalcDwellspk ; set time before the other SAW starts BC36 066B2D 13404 BRSET WSPK,ENHANCEDBITS4,WASTEDWELL BC39 55E4 13405 LDHX DWELLDELAY1 BC3B 006A0B 13406 BRSET COILABIT,COILSEL,DD_A BC3E 026A0C 13407 BRSET COILBBIT,COILSEL,DD_B BC41 046A0D 13408 BRSET COILCBIT,COILSEL,DD_C BC44 066A0E 13409 BRSET COILDBIT,COILSEL,DD_D BC47 200E 13410 BRA JDD_END BC49 35B1 13411 DD_A: STHX SPARKONLEFTAH BC4B 200A 13412 BRA JDD_END BC4D 35B3 13413 DD_B: STHX SPARKONLEFTBH BC4F 2006 13414 BRA JDD_END BC51 35B5 13415 DD_C: STHX SPARKONLEFTCH BC53 2002 13416 BRA JDD_END BC55 35B7 13417 DD_D: STHX SPARKONLEFTDH BC57 CCBFB8 13418 JDD_END: JMP DD_END BC5A CCBE76 13419 JWDWELL6OP: JMP WDWELL6OP BC5D CCBD9C 13420 JWDWELL5OP: JMP WDWELL5OP BC60 CCBCFD 13421 JWDWELL4OP: JMP WDWELL4OP BC63 CCBCD0 13422 JWDWELL2OP: JMP WDWELL2OP 13423 WASTEDWELL: BC66 C6E074 13424 LDA FEATURE8_F BC69 A510 13425 BIT #SPKFOPB BC6B 26ED 13426 BNE JWDWELL6OP msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 113 MC68HC908GP32 User Bootloader BC6D A508 13427 BIT #SPKEOPB BC6F 26EC 13428 BNE JWDWELL5OP BC71 0866EC 13429 BRSET OUT3SPARKD,FEATURE2,JWDWELL4OP BC74 0564EC 13430 BRCLR REUSE_LED18,OUTPUTPINS,JWDWELL2OP BC77 0764E9 13431 BRCLR REUSE_LED18_2,OUTPUTPINS,JWDWELL2OP 13432 WDWELL3OP: BC7A 55E8 13433 LDHX DWELLDELAY3 BC7C 006A06 13434 BRSET COILABIT,COILSEL,WD3A360 BC7F 026A07 13435 BRSET COILBBIT,COILSEL,WD3B360 BC82 046A08 13436 BRSET COILCBIT,COILSEL,WD3C360 BC85 35B1 13437 WD3A360: STHX SPARKONLEFTAH BC87 2006 13438 BRA WD3END360 BC89 35B3 13439 WD3B360: STHX SPARKONLEFTBH BC8B 2002 13440 BRA WD3END360 BC8D 35B5 13441 WD3C360: STHX SPARKONLEFTCH 13442 WD3END360: BC8F B6E4 13443 LDA DWELLDELAY1 BC91 2606 13444 BNE WD3OK120 BC93 B6E5 13445 LDA DWELLDELAY1+1 BC95 A102 13446 CMP #2 BC97 2515 13447 BLO WD3SKIP120 13448 WD3OK120: BC99 55E4 13449 LDHX DWELLDELAY1 BC9B 006A06 13450 BRSET COILABIT,COILSEL,WD3A120 BC9E 026A07 13451 BRSET COILBBIT,COILSEL,WD3B120 BCA1 046A08 13452 BRSET COILCBIT,COILSEL,WD3C120 BCA4 35B3 13453 WD3A120: STHX SPARKONLEFTBH BCA6 2006 13454 BRA WD3END120 BCA8 35B5 13455 WD3B120: STHX SPARKONLEFTCH BCAA 2002 13456 BRA WD3END120 BCAC 35B1 13457 WD3C120: STHX SPARKONLEFTAH 13458 WD3END120: 13459 WD3SKIP120: BCAE B6E6 13460 LDA DWELLDELAY2 BCB0 2606 13461 BNE WD3OK240 BCB2 B6E7 13462 LDA DWELLDELAY2+1 BCB4 A102 13463 CMP #2 BCB6 2515 13464 BLO WD3END240 13465 WD3OK240: BCB8 55E6 13466 LDHX DWELLDELAY2 BCBA 006A06 13467 BRSET COILABIT,COILSEL,WD3A240 BCBD 026A07 13468 BRSET COILBBIT,COILSEL,WD3B240 BCC0 046A08 13469 BRSET COILCBIT,COILSEL,WD3C240 BCC3 35B5 13470 WD3A240: STHX SPARKONLEFTCH BCC5 2006 13471 BRA WD3END240 BCC7 35B1 13472 WD3B240: STHX SPARKONLEFTAH BCC9 2002 13473 BRA WD3END240 BCCB 35B3 13474 WD3C240: STHX SPARKONLEFTBH BCCD CCBFB8 13475 WD3END240: JMP DD_END 13476 WDWELL2OP: BCD0 55E6 13477 LDHX DWELLDELAY2 BCD2 026A04 13478 BRSET COILBBIT,COILSEL,WD2B360 BCD5 35B1 13479 WD2A360: STHX SPARKONLEFTAH BCD7 2002 13480 BRA WD2END360 BCD9 35B3 13481 WD2B360: STHX SPARKONLEFTBH 13482 WD2END360: BCDB C6E3AD 13483 LDA SPARKCONFIG1_F BCDE A510 13484 BIT #M_SC1ODDFIRE BCE0 2618 13485 BNE WD2SKIP BCE2 B6E4 13486 LDA DWELLDELAY1 BCE4 2606 13487 BNE WD2OK BCE6 B6E5 13488 LDA DWELLDELAY1+1 BCE8 A102 13489 CMP #2 BCEA 250E 13490 BLO WD2SKIP 13491 WD2OK: BCEC 55E4 13492 LDHX DWELLDELAY1 BCEE 006A03 13493 BRSET COILABIT,COILSEL,WD2A180 BCF1 026A04 13494 BRSET COILBBIT,COILSEL,WD2B180 BCF4 35B3 13495 WD2A180: STHX SPARKONLEFTBH BCF6 2002 13496 BRA WD2END180 BCF8 35B1 13497 WD2B180: STHX SPARKONLEFTAH 13498 WD2END180: BCFA CCBFB8 13499 WD2SKIP: JMP DD_END 13500 WDWELL4OP: BCFD 55EA 13501 LDHX DWELLDELAY4 BCFF 006A09 13502 BRSET COILABIT,COILSEL,WD4A360 BD02 026A0A 13503 BRSET COILBBIT,COILSEL,WD4B360 BD05 046A0B 13504 BRSET COILCBIT,COILSEL,WD4C360 BD08 066A0C 13505 BRSET COILDBIT,COILSEL,WD4D360 BD0B 35B1 13506 WD4A360: STHX SPARKONLEFTAH BD0D 200A 13507 BRA WD4END360 BD0F 35B3 13508 WD4B360: STHX SPARKONLEFTBH BD11 2006 13509 BRA WD4END360 BD13 35B5 13510 WD4C360: STHX SPARKONLEFTCH BD15 2002 13511 BRA WD4END360 BD17 35B7 13512 WD4D360: STHX SPARKONLEFTDH 13513 WD4END360: BD19 C6E3AD 13514 LDA SPARKCONFIG1_F BD1C A510 13515 BIT #M_SC1ODDFIRE BD1E 2626 13516 BNE WD4SKIP90 BD20 B6E4 13517 LDA DWELLDELAY1 BD22 2606 13518 BNE WD4OK90 BD24 B6E5 13519 LDA DWELLDELAY1+1 BD26 A102 13520 CMP #2 BD28 251C 13521 BLO WD4SKIP90 13522 WD4OK90: BD2A 55E4 13523 LDHX DWELLDELAY1 BD2C 006A09 13524 BRSET COILABIT,COILSEL,WD4A90 BD2F 026A0A 13525 BRSET COILBBIT,COILSEL,WD4B90 BD32 046A0B 13526 BRSET COILCBIT,COILSEL,WD4C90 BD35 066A0C 13527 BRSET COILDBIT,COILSEL,WD4D90 BD38 35B3 13528 WD4A90: STHX SPARKONLEFTBH BD3A 200A 13529 BRA WD4END90 BD3C 35B5 13530 WD4B90: STHX SPARKONLEFTCH BD3E 2006 13531 BRA WD4END90 BD40 35B7 13532 WD4C90: STHX SPARKONLEFTDH BD42 2002 13533 BRA WD4END90 BD44 35B1 13534 WD4D90: STHX SPARKONLEFTAH 13535 WD4END90: 13536 WD4SKIP90: BD46 B6E6 13537 LDA DWELLDELAY2 BD48 2606 13538 BNE WD4OK180 BD4A B6E7 13539 LDA DWELLDELAY2+1 BD4C A102 13540 CMP #2 BD4E 251C 13541 BLO WD4SKIP180 13542 WD4OK180: BD50 55E6 13543 LDHX DWELLDELAY2 BD52 006A09 13544 BRSET COILABIT,COILSEL,WD4A180 BD55 026A0A 13545 BRSET COILBBIT,COILSEL,WD4B180 BD58 046A0B 13546 BRSET COILCBIT,COILSEL,WD4C180 BD5B 066A0C 13547 BRSET COILDBIT,COILSEL,WD4D180 BD5E 35B5 13548 WD4A180: STHX SPARKONLEFTCH BD60 200A 13549 BRA WD4END180 BD62 35B7 13550 WD4B180: STHX SPARKONLEFTDH BD64 2006 13551 BRA WD4END180 BD66 35B1 13552 WD4C180: STHX SPARKONLEFTAH BD68 2002 13553 BRA WD4END180 BD6A 35B3 13554 WD4D180: STHX SPARKONLEFTBH 13555 WD4END180: 13556 WD4SKIP180: BD6C C6E3AD 13557 LDA SPARKCONFIG1_F BD6F A510 13558 BIT #M_SC1ODDFIRE BD71 2626 13559 BNE WD4END270 BD73 B6E8 13560 LDA DWELLDELAY3 BD75 2606 13561 BNE WD4OK270 BD77 B6E9 13562 LDA DWELLDELAY3+1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 114 MC68HC908GP32 User Bootloader BD79 A102 13563 CMP #2 BD7B 251C 13564 BLO WD4END270 13565 WD4OK270: BD7D 55E8 13566 LDHX DWELLDELAY3 BD7F 006A09 13567 BRSET COILABIT,COILSEL,WD4A270 BD82 026A0A 13568 BRSET COILBBIT,COILSEL,WD4B270 BD85 046A0B 13569 BRSET COILCBIT,COILSEL,WD4C270 BD88 066A0C 13570 BRSET COILDBIT,COILSEL,WD4D270 BD8B 35B7 13571 WD4A270: STHX SPARKONLEFTDH BD8D 200A 13572 BRA WD4END270 BD8F 35B1 13573 WD4B270: STHX SPARKONLEFTAH BD91 2006 13574 BRA WD4END270 BD93 35B3 13575 WD4C270: STHX SPARKONLEFTBH BD95 2002 13576 BRA WD4END270 BD97 35B5 13577 WD4D270: STHX SPARKONLEFTCH 13578 WD4END270: BD99 CCBFB8 13579 JMP DD_END 13580 WDWELL5OP: BD9C 55EC 13581 LDHX DWELLDELAY5 BD9E 006A0C 13582 BRSET COILABIT,COILSEL,WD5A360 BDA1 026A0D 13583 BRSET COILBBIT,COILSEL,WD5B360 BDA4 046A0E 13584 BRSET COILCBIT,COILSEL,WD5C360 BDA7 066A0F 13585 BRSET COILDBIT,COILSEL,WD5D360 BDAA 086A10 13586 BRSET COILEBIT,COILSEL,WD5E360 BDAD 35B1 13587 WD5A360: STHX SPARKONLEFTAH BDAF 200E 13588 BRA WD5END360 BDB1 35B3 13589 WD5B360: STHX SPARKONLEFTBH BDB3 200A 13590 BRA WD5END360 BDB5 35B5 13591 WD5C360: STHX SPARKONLEFTCH BDB7 2006 13592 BRA WD5END360 BDB9 35B7 13593 WD5D360: STHX SPARKONLEFTDH BDBB 2002 13594 BRA WD5END360 BDBD 35B9 13595 WD5E360: STHX SPARKONLEFTEH 13596 WD5END360: BDBF B6E4 13597 LDA DWELLDELAY1 BDC1 2606 13598 BNE WD5OK72 BDC3 B6E5 13599 LDA DWELLDELAY1+1 BDC5 A102 13600 CMP #2 BDC7 2523 13601 BLO WD5SKIP72 13602 WD5OK72: BDC9 55E4 13603 LDHX DWELLDELAY1 BDCB 006A0C 13604 BRSET COILABIT,COILSEL,WD5A72 BDCE 026A0D 13605 BRSET COILBBIT,COILSEL,WD5B72 BDD1 046A0E 13606 BRSET COILCBIT,COILSEL,WD5C72 BDD4 066A0F 13607 BRSET COILDBIT,COILSEL,WD5D72 BDD7 086A10 13608 BRSET COILEBIT,COILSEL,WD5E72 BDDA 35B3 13609 WD5A72: STHX SPARKONLEFTBH BDDC 200E 13610 BRA WD5END72 BDDE 35B5 13611 WD5B72: STHX SPARKONLEFTCH BDE0 200A 13612 BRA WD5END72 BDE2 35B7 13613 WD5C72: STHX SPARKONLEFTDH BDE4 2006 13614 BRA WD5END72 BDE6 35B9 13615 WD5D72: STHX SPARKONLEFTEH BDE8 2002 13616 BRA WD5END72 BDEA 35B1 13617 WD5E72: STHX SPARKONLEFTAH 13618 WD5END72: 13619 WD5SKIP72: BDEC B6E6 13620 LDA DWELLDELAY2 BDEE 2606 13621 BNE WD5OK144 BDF0 B6E7 13622 LDA DWELLDELAY2+1 BDF2 A102 13623 CMP #2 BDF4 2523 13624 BLO WD5SKIP144 13625 WD5OK144: BDF6 55E6 13626 LDHX DWELLDELAY2 BDF8 006A0C 13627 BRSET COILABIT,COILSEL,WD5A144 BDFB 026A0D 13628 BRSET COILBBIT,COILSEL,WD5B144 BDFE 046A0E 13629 BRSET COILCBIT,COILSEL,WD5C144 BE01 066A0F 13630 BRSET COILDBIT,COILSEL,WD5D144 BE04 086A10 13631 BRSET COILEBIT,COILSEL,WD5E144 BE07 35B5 13632 WD5A144: STHX SPARKONLEFTCH BE09 200E 13633 BRA WD5END144 BE0B 35B7 13634 WD5B144: STHX SPARKONLEFTDH BE0D 200A 13635 BRA WD5END144 BE0F 35B9 13636 WD5C144: STHX SPARKONLEFTEH BE11 2006 13637 BRA WD5END144 BE13 35B1 13638 WD5D144: STHX SPARKONLEFTAH BE15 2002 13639 BRA WD5END144 BE17 35B3 13640 WD5E144: STHX SPARKONLEFTBH 13641 WD5END144: 13642 WD5SKIP144: BE19 B6E8 13643 LDA DWELLDELAY3 BE1B 2606 13644 BNE WD5OK216 BE1D B6E9 13645 LDA DWELLDELAY3+1 BE1F A102 13646 CMP #2 BE21 2523 13647 BLO WD5SKIP216 13648 WD5OK216: BE23 55E8 13649 LDHX DWELLDELAY3 BE25 006A0C 13650 BRSET COILABIT,COILSEL,WD5A216 BE28 026A0D 13651 BRSET COILBBIT,COILSEL,WD5B216 BE2B 046A0E 13652 BRSET COILCBIT,COILSEL,WD5C216 BE2E 066A0F 13653 BRSET COILDBIT,COILSEL,WD5D216 BE31 086A10 13654 BRSET COILEBIT,COILSEL,WD5E216 BE34 35B7 13655 WD5A216: STHX SPARKONLEFTDH BE36 200E 13656 BRA WD5END216 BE38 35B9 13657 WD5B216: STHX SPARKONLEFTEH BE3A 200A 13658 BRA WD5END216 BE3C 35B1 13659 WD5C216: STHX SPARKONLEFTAH BE3E 2006 13660 BRA WD5END216 BE40 35B3 13661 WD5D216: STHX SPARKONLEFTBH BE42 2002 13662 BRA WD5END216 BE44 35B5 13663 WD5E216: STHX SPARKONLEFTCH 13664 WD5END216: 13665 WD5SKIP216: BE46 B6EA 13666 LDA DWELLDELAY4 BE48 2606 13667 BNE WD5OK288 BE4A B6EB 13668 LDA DWELLDELAY4+1 BE4C A102 13669 CMP #2 BE4E 2523 13670 BLO WD5SKIP288 13671 WD5OK288: BE50 55EA 13672 LDHX DWELLDELAY4 BE52 006A0C 13673 BRSET COILABIT,COILSEL,WD5A288 BE55 026A0D 13674 BRSET COILBBIT,COILSEL,WD5B288 BE58 046A0E 13675 BRSET COILCBIT,COILSEL,WD5C288 BE5B 066A0F 13676 BRSET COILDBIT,COILSEL,WD5D288 BE5E 086A10 13677 BRSET COILEBIT,COILSEL,WD5E288 BE61 35B9 13678 WD5A288: STHX SPARKONLEFTEH BE63 200E 13679 BRA WD5END288 BE65 35B1 13680 WD5B288: STHX SPARKONLEFTAH BE67 200A 13681 BRA WD5END288 BE69 35B3 13682 WD5C288: STHX SPARKONLEFTBH BE6B 2006 13683 BRA WD5END288 BE6D 35B5 13684 WD5D288: STHX SPARKONLEFTCH BE6F 2002 13685 BRA WD5END288 BE71 35B7 13686 WD5E288: STHX SPARKONLEFTDH 13687 WD5END288: 13688 WD5SKIP288: BE73 CCBFB8 13689 JMP DD_END 13690 WDWELL6OP: BE76 55EE 13691 LDHX DWELLDELAY6 BE78 026A10 13692 BRSET COILBBIT,COILSEL,WD6B360 BE7B 046A11 13693 BRSET COILCBIT,COILSEL,WD6C360 BE7E 066A12 13694 BRSET COILDBIT,COILSEL,WD6D360 BE81 086A13 13695 BRSET COILEBIT,COILSEL,WD6E360 BE84 0A6A14 13696 BRSET COILFBIT,COILSEL,WD6F360 BE87 35B1 13697 WD6A360: STHX SPARKONLEFTAH BE89 2012 13698 BRA WD6END360 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 115 MC68HC908GP32 User Bootloader BE8B 35B3 13699 WD6B360: STHX SPARKONLEFTBH BE8D 200E 13700 BRA WD6END360 BE8F 35B5 13701 WD6C360: STHX SPARKONLEFTCH BE91 200A 13702 BRA WD6END360 BE93 35B7 13703 WD6D360: STHX SPARKONLEFTDH BE95 2006 13704 BRA WD6END360 BE97 35B9 13705 WD6E360: STHX SPARKONLEFTEH BE99 2002 13706 BRA WD6END360 BE9B 35BB 13707 WD6F360: STHX SPARKONLEFTFH 13708 WD6END360: BE9D C6E3AD 13709 LDA SPARKCONFIG1_F BEA0 A510 13710 BIT #M_SC1ODDFIRE BEA2 2634 13711 BNE WD6SKIP60 BEA4 B6E4 13712 LDA DWELLDELAY1 BEA6 2606 13713 BNE WD6OK60 BEA8 B6E5 13714 LDA DWELLDELAY1+1 BEAA A105 13715 CMP #5 BEAC 252A 13716 BLO WD6SKIP60 13717 WD6OK60: BEAE 55E4 13718 LDHX DWELLDELAY1 BEB0 006A0F 13719 BRSET COILABIT,COILSEL,WD6A60 BEB3 026A10 13720 BRSET COILBBIT,COILSEL,WD6B60 BEB6 046A11 13721 BRSET COILCBIT,COILSEL,WD6C60 BEB9 066A12 13722 BRSET COILDBIT,COILSEL,WD6D60 BEBC 086A13 13723 BRSET COILEBIT,COILSEL,WD6E60 BEBF 0A6A14 13724 BRSET COILFBIT,COILSEL,WD6F60 BEC2 35B3 13725 WD6A60: STHX SPARKONLEFTBH BEC4 2012 13726 BRA WD6END60 BEC6 35B5 13727 WD6B60: STHX SPARKONLEFTCH BEC8 200E 13728 BRA WD6END60 BECA 35B7 13729 WD6C60: STHX SPARKONLEFTDH BECC 200A 13730 BRA WD6END60 BECE 35B9 13731 WD6D60: STHX SPARKONLEFTEH BED0 2006 13732 BRA WD6END60 BED2 35BB 13733 WD6E60: STHX SPARKONLEFTFH BED4 2002 13734 BRA WD6END60 BED6 35B1 13735 WD6F60: STHX SPARKONLEFTAH 13736 WD6END60: 13737 WD6SKIP60: BED8 B6E6 13738 LDA DWELLDELAY2 BEDA 2606 13739 BNE WD6OK120 BEDC B6E7 13740 LDA DWELLDELAY2+1 BEDE A105 13741 CMP #5 BEE0 252A 13742 BLO WD6SKIP120 13743 WD6OK120: BEE2 55E6 13744 LDHX DWELLDELAY2 BEE4 006A0F 13745 BRSET COILABIT,COILSEL,WD6A120 BEE7 026A10 13746 BRSET COILBBIT,COILSEL,WD6B120 BEEA 046A11 13747 BRSET COILCBIT,COILSEL,WD6C120 BEED 066A12 13748 BRSET COILDBIT,COILSEL,WD6D120 BEF0 086A13 13749 BRSET COILEBIT,COILSEL,WD6E120 BEF3 0A6A14 13750 BRSET COILFBIT,COILSEL,WD6F120 BEF6 35B5 13751 WD6A120: STHX SPARKONLEFTCH BEF8 2012 13752 BRA WD6END120 BEFA 35B7 13753 WD6B120: STHX SPARKONLEFTDH BEFC 200E 13754 BRA WD6END120 BEFE 35B9 13755 WD6C120: STHX SPARKONLEFTEH BF00 200A 13756 BRA WD6END120 BF02 35BB 13757 WD6D120: STHX SPARKONLEFTFH BF04 2006 13758 BRA WD6END120 BF06 35B1 13759 WD6E120: STHX SPARKONLEFTAH BF08 2002 13760 BRA WD6END120 BF0A 35B3 13761 WD6F120: STHX SPARKONLEFTBH 13762 WD6END120: 13763 WD6SKIP120: BF0C C6E3AD 13764 LDA SPARKCONFIG1_F BF0F A510 13765 BIT #M_SC1ODDFIRE BF11 2636 13766 BNE WD6SKIP180 BF13 B6E8 13767 LDA DWELLDELAY3 BF15 2606 13768 BNE WD6OK180 BF17 B6E9 13769 LDA DWELLDELAY3+1 BF19 A105 13770 CMP #5 BF1B 252C 13771 BLO WD6SKIP180 13772 WD6OK180: BF1D 55E8 13773 LDHX DWELLDELAY3 BF1F 006A0F 13774 BRSET COILABIT,COILSEL,WD6A180 BF22 026A10 13775 BRSET COILBBIT,COILSEL,WD6B180 BF25 046A11 13776 BRSET COILCBIT,COILSEL,WD6C180 BF28 066A12 13777 BRSET COILDBIT,COILSEL,WD6D180 BF2B 086A13 13778 BRSET COILEBIT,COILSEL,WD6E180 BF2E 0A6A14 13779 BRSET COILFBIT,COILSEL,WD6F180 BF31 35B7 13780 WD6A180: STHX SPARKONLEFTDH BF33 2012 13781 BRA WD6END180 BF35 35B9 13782 WD6B180: STHX SPARKONLEFTEH BF37 200E 13783 BRA WD6END180 BF39 35BB 13784 WD6C180: STHX SPARKONLEFTFH BF3B 200A 13785 BRA WD6END180 BF3D 35B1 13786 WD6D180: STHX SPARKONLEFTAH BF3F 2006 13787 BRA WD6END180 BF41 35B3 13788 WD6E180: STHX SPARKONLEFTBH BF43 2002 13789 BRA WD6END180 BF45 35B5 13790 WD6F180: STHX SPARKONLEFTCH 13791 WD6END180: BF47 206F 13792 BRA DD_END 13793 WD6SKIP180: BF49 B6EA 13794 LDA DWELLDELAY4 BF4B 2606 13795 BNE WD6OK240 BF4D B6EB 13796 LDA DWELLDELAY4+1 BF4F A105 13797 CMP #5 BF51 252A 13798 BLO WD6SKIP240 13799 WD6OK240: BF53 55EA 13800 LDHX DWELLDELAY4 BF55 006A0F 13801 BRSET COILABIT,COILSEL,WD6A240 BF58 026A10 13802 BRSET COILBBIT,COILSEL,WD6B240 BF5B 046A11 13803 BRSET COILCBIT,COILSEL,WD6C240 BF5E 066A12 13804 BRSET COILDBIT,COILSEL,WD6D240 BF61 086A13 13805 BRSET COILEBIT,COILSEL,WD6E240 BF64 0A6A14 13806 BRSET COILFBIT,COILSEL,WD6F240 BF67 35B9 13807 WD6A240: STHX SPARKONLEFTEH BF69 2012 13808 BRA WD6END240 BF6B 35BB 13809 WD6B240: STHX SPARKONLEFTFH BF6D 200E 13810 BRA WD6END240 BF6F 35B1 13811 WD6C240: STHX SPARKONLEFTAH BF71 200A 13812 BRA WD6END240 BF73 35B3 13813 WD6D240: STHX SPARKONLEFTBH BF75 2006 13814 BRA WD6END240 BF77 35B5 13815 WD6E240: STHX SPARKONLEFTCH BF79 2002 13816 BRA WD6END240 BF7B 35B7 13817 WD6F240: STHX SPARKONLEFTDH 13818 WD6END240: 13819 WD6SKIP240: BF7D C6E3AD 13820 LDA SPARKCONFIG1_F BF80 A510 13821 BIT #M_SC1ODDFIRE BF82 2634 13822 BNE WD6SKIP300 BF84 B6EC 13823 LDA DWELLDELAY5 BF86 2606 13824 BNE WD6OK300 BF88 B6ED 13825 LDA DWELLDELAY5+1 BF8A A105 13826 CMP #5 BF8C 252A 13827 BLO WD6SKIP300 13828 WD6OK300: BF8E 55EC 13829 LDHX DWELLDELAY5 BF90 006A0F 13830 BRSET COILABIT,COILSEL,WD6A300 BF93 026A10 13831 BRSET COILBBIT,COILSEL,WD6B300 BF96 046A11 13832 BRSET COILCBIT,COILSEL,WD6C300 BF99 066A12 13833 BRSET COILDBIT,COILSEL,WD6D300 BF9C 086A13 13834 BRSET COILEBIT,COILSEL,WD6E300 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 116 MC68HC908GP32 User Bootloader BF9F 0A6A14 13835 BRSET COILFBIT,COILSEL,WD6F300 BFA2 35B9 13836 WD6A300: STHX SPARKONLEFTEH BFA4 2012 13837 BRA WD6END300 BFA6 35BB 13838 WD6B300: STHX SPARKONLEFTFH BFA8 200E 13839 BRA WD6END300 BFAA 35B1 13840 WD6C300: STHX SPARKONLEFTAH BFAC 200A 13841 BRA WD6END300 BFAE 35B3 13842 WD6D300: STHX SPARKONLEFTBH BFB0 2006 13843 BRA WD6END300 BFB2 35B5 13844 WD6E300: STHX SPARKONLEFTCH BFB4 2002 13845 BRA WD6END300 BFB6 35B7 13846 WD6F300: STHX SPARKONLEFTDH 13847 WD6END300: 13848 WD6SKIP300: 13849 DD_END: BFB8 8A 13850 pulh BFB9 80 13851 rti ; uses 0.1ms timer for 1/2 cycle time 13852 13853 13854 INT_SPARK_OFF: ; this is only used for EDIS so 13855 ; coilc has no meaning (yet!) BFBA 0C6B12 13856 brset invspk,EnhancedBits4,InvSparkOff 13857 BFBD 00640B 13858 brset REUSE_FIDLE,outputpins,stimef2 BFC0 026A04 13859 brset coilbbit,coilsel,stimeb2 BFC3 1102 13860 bclr coila,portc ; Set spark on BFC5 2018 13861 bra SparkOffDone 13862 stimeb2: BFC7 1302 13863 bclr coilb,portc BFC9 2014 13864 bra SparkOffDone 13865 stimef2: BFCB 1300 13866 bclr iasc,porta BFCD 2010 13867 bra SparkOffDone 13868 InvSparkOff: BFCF 00640B 13869 brset REUSE_FIDLE,outputpins,isof2 BFD2 026A04 13870 brset coilbbit,coilsel,isob2 BFD5 1002 13871 bset coila,portc ; Set inverted spark on BFD7 2006 13872 bra SparkOffDone 13873 isob2: BFD9 1202 13874 bset coilb,portc BFDB 2002 13875 bra SparkOffDone 13876 isof2: BFDD 1200 13877 bset iasc,porta 13878 SparkOffDone: BFDF 1161 13879 bclr SparkTrigg,Sparkbits ; No more sparks for this IRQ BFE1 1D33 13880 bclr TOIE,T2SC1 ; Disable interrupts BFE3 8A 13881 pulh BFE4 80 13882 rti 13883 *** end EDIS *** 13884 13885 *************************************************************************** 13886 ** 13887 ** IRQ - Input trigger for new pulse event 13888 ** 13889 ** This line is connected to the input trigger (i.e TACH signal from ignition 13890 ** system), and schedules a new injector shot (injector actually opened in 13891 ** 1/10 timer section above) 13892 ** 13893 ** Wheel encoders now removed (020p2) and available as encoder???.s19 13894 *************************************************************************** 13895 ;as we don't get interrupted can safely use some of burner area 13896 ;but beware that this is non-zero page ram hence slower instructions. 13897 ;if enough ram may put back into ZP for a small speed increase BFE5 13898 stX: equ itmp10 ; temp space used in Neon BFE5 13899 stH: equ itmp11 BFE5 13900 stL: equ itmp12 13901 BFE5 13902 cTimeHcp: equ itmp13 ; copy of predicted period BFE5 13903 cTimeLcp: equ itmp14 13904 BFE5 13905 T2CurrX: equ itmp15 ; value of T2 at start of handler BFE5 13906 T2CurrH: equ itmp16 BFE5 13907 T2CurrL: equ itmp17 13908 BFE5 13909 currtth14h: equ itmp18 ; 1/4 current tooth BFE5 13910 currtth14l: equ itmp19 ; 1/4 current tooth BFE5 13911 avgtth14h: equ itmp1a ; 1/4 avg tooth BFE5 13912 avgtth14l: equ itmp1b ; 1/4 avg tooth 13913 BFE5 13914 avgtth12h: equ itmp1c ; 1/2 of avg tooth BFE5 13915 avgtth12l: equ itmp1d ; 1/2 of avg tooth 13916 BFE5 13917 offsetstep: equ itmp1e ; offset step (used by oddfire) BFE5 13918 offsetang: equ itmp1f ; offset angle (used by oddfire) 13919 13920 DOSQUIRT: BFE5 8B 13921 pshh 13922 ;First thing to do is read the current T2 value 13923 ;this should ensure the maximum spark accuracy. Delay value will be based on timer HERE 13924 ;rather than after all the other missing tooth calcs by the time we reach done_decode BFE6 B62D 13925 lda T2CNTL ; Unlatch any previous reads BFE8 BE2C 13926 ldx T2CNTH BFEA CF0203 13927 stx T2CurrH ; Save current counter value BFED B62D 13928 lda T2CNTL BFEF C70204 13929 sta T2CurrL ; Save current counter value BFF2 B6A8 13930 lda T2CNTX ;sw byte BFF4 A300 13931 cpx #0 BFF6 2604 13932 bne no_rollchk BFF8 036B01 13933 brclr roll2,EnhancedBits4,no_rollchk ; we were't about to rollover 13934 ; a few ms ago or byte already 13935 ; cleared by handler - so skip BFFB 4C 13936 inca ; Missed a rollover so inc top byte 13937 no_rollchk: BFFC C70202 13938 sta T2CurrX 13939 13940 ;new in 029e - surely we must be running if we got an IRQ BFFF 1042 13941 bset running,engine ; Set engine running value 13942 13943 13944 ;check for simulator first C001 046516 13945 brset whlsim,feature1,jwheelsim 13946 C004 026316 13947 brset MSNEON,personality,decode_neon C007 046307 13948 brset WHEEL,personality,jdecode_wheel 13949 ;set just single coil output C00A 3F6A 13950 clr coilsel C00C 106A 13951 bset coilabit,coilsel C00E CCC4C7 13952 jmp done_decode ; everything else that doesn't 13953 ; need wheel decoding 13954 13955 jdecode_wheel: C011 006503 13956 brset wd_2trig,feature1,jdecode_wheel2 C014 CCC1A6 13957 jmp decode_wheel 13958 jdecode_wheel2: C017 CCC11E 13959 jmp decode_wheel2 13960 13961 jwheelsim: C01A CCC0E9 13962 jmp wheelsim 13963 13964 decode_neon: 13965 13966 ;new - are we logging teeth? C01D 056C27 13967 brclr toothlog,EnhancedBits5,n_notlog 13968 ;we are logging so record something C020 8C 13969 clrh C021 CE01CF 13970 ldx VE_r+PAGESIZE-2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 117 MC68HC908GP32 User Bootloader C024 B6BD 13971 lda cTimeH C026 D70114 13972 sta VE_r,x C029 5C 13973 incx C02A B6BE 13974 lda cTimeL C02C D70114 13975 sta VE_r,x C02F 5C 13976 incx C030 A3B9 13977 cpx #PAGESIZE-4 C032 2510 13978 blo ntl C034 5F 13979 clrx C035 C6E05A 13980 lda numteeth_f C038 A117 13981 cmp #23T ; hard coded lowres/highres 13982 ; transition (was 20T) C03A 2204 13983 bhi nth C03C A601 13984 lda #1 ; 1 = 0.1ms units C03E 2001 13985 bra nts 13986 nth: C040 4F 13987 clra ; 0 = 1us units 13988 nts: C041 C701D0 13989 sta VE_r+PAGESIZE-1 13990 ntl: C044 CF01CF 13991 stx VE_r+PAGESIZE-2 13992 n_notlog: 13993 C047 1961 13994 bclr rise,sparkbits ; reset flag so we can detect 13995 ; next rising IRQ edge 13996 ; 020r3 - do all decoding using 0.1ms timer, count the short teeth 13997 ;use lowres timer for calcs 13998 ;cTime is zero page space for faster calcs, holds time since last tooth 13999 ;sH/L is temp storage as we are about to clear lowres C049 B6F3 14000 lda lowresL C04B C701FF 14001 sta stL C04E B7BE 14002 sta cTimeL C050 B6F2 14003 lda lowresH C052 C701FE 14004 sta stH C055 B7BD 14005 sta cTimeH 14006 C057 3FF3 14007 clr lowresL ; reset to zero ready for next 0.1ms int C059 3FF2 14008 clr lowresH 14009 14010 tooth_sync: ; ignore first few pulses C05B 0DE312 14011 brclr 6,wheelcount,tooth_decode2 ; if bit 6 clr then we've 14012 ; done holdoff C05E 3AE3 14013 dec wheelcount C060 2602 14014 bne tooth_rti C062 1DE3 14015 bclr 6,wheelcount 14016 tooth_rti: 14017 ;save gap between teeth C064 C601FF 14018 lda stL C067 B7F1 14019 sta stLp C069 C601FE 14020 lda stH C06C B7F0 14021 sta stHp C06E 8A 14022 pulh C06F 80 14023 rti 14024 14025 tooth_decode2: 14026 C070 1D61 14027 bclr trigret,SparkBits C072 0EE30C 14028 brset 7,wheelcount,tooth_decode3 ; bit 7 is !sync. 14029 ; if not synced then look for 14030 ; the long trigger C075 B6E3 14031 lda wheelcount ; ignore the three short pulses 14032 ; after primary trigger C077 2708 14033 beq tooth_decode3 ; =0 C079 3AE3 14034 dec wheelcount C07B 26E7 14035 bne tooth_rti ; >0 C07D 1C61 14036 bset trigret,SparkBits ; =0, set trigger return C07F 20E3 14037 bra tooth_rti 14038 tooth_decode3: 14039 ; divide this cycle time 2 C081 34BD 14040 lsr cTimeH C083 36BE 14041 ror cTimeL ; was rol - typo! 14042 14043 ;now see if this period/4 > previous C085 B6BD 14044 lda cTimeH C087 B1F0 14045 cmp stHp C089 25D9 14046 blo tooth_rti C08B 2208 14047 bhi tooth_found C08D B6BE 14048 lda cTimeL C08F B1F1 14049 cmp stLp C091 2202 14050 bhi tooth_found C093 20CF 14051 bra tooth_rti 14052 14053 tooth_found: ; this is when we've found the first tooth of the sequence 14054 C095 6E03E3 14055 mov #3T,wheelcount ; clear !sync bit in process 14056 ;move save lowres values into "previous" variable C098 C601FF 14057 lda stL C09B B7F1 14058 sta stLp C09D C601FE 14059 lda stH C0A0 B7F0 14060 sta stHp 14061 14062 ;calculate how long first high pulse was to determine coil pack 14063 ; using SparkTemp to store rising edge time of "irq" to conserve RAM 14064 ; The variable should be safe as it is only used in this interrupt handler 14065 ; The 0.1ms section monitors the irq line and stores the lowresH/L 14066 ; value into SparkTemp if it detects a rising edge. 14067 ; calc how long ago the input went high sparktemp = current - sparktemp 14068 C0A2 C601FF 14069 lda stL C0A5 B0C0 14070 sub SparkTempL C0A7 B7C0 14071 sta SparkTempL C0A9 C601FE 14072 lda stH C0AC B2BF 14073 sbc SparkTempH C0AE B7BF 14074 sta SparkTempH 14075 C0B0 34BD 14076 lsr cTimeH C0B2 36BE 14077 ror cTimeL 14078 14079 ;See if the high pulse > iTimet/4 C0B4 B6BF 14080 lda SparkTempH C0B6 B1BD 14081 cmp cTimeH C0B8 220A 14082 bhi coil_detecta C0BA 251A 14083 blo coil_detectb C0BC B6C0 14084 lda SparkTempL C0BE B1BE 14085 cmp cTimeL C0C0 2202 14086 bhi coil_detecta C0C2 2012 14087 bra coil_detectb 14088 14089 ; sequence detection 14090 ; 14091 coil_detecta: C0C4 086207 14092 brset coilerr,revlimbits,set_a_clr C0C7 026A04 14093 brset coilbbit,coilsel,set_a_clr ; we are expecting this C0CA 1862 14094 bset coilerr,revlimbits ; out of sync once, so ignore 14095 ; and follow instinct C0CC 2014 14096 bra set_b_detect 14097 set_a_clr: C0CE 1962 14098 bclr coilerr,revlimbits ; reset error bit 14099 set_a_detect: C0D0 3F6A 14100 clr coilsel C0D2 106A 14101 bset coilabit,coilsel C0D4 2010 14102 bra j_done_cd 14103 14104 coil_detectb: C0D6 086207 14105 brset coilerr,revlimbits,set_b_clr C0D9 006A04 14106 brset coilabit,coilsel,set_b_clr ; we are expecting this msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 118 MC68HC908GP32 User Bootloader C0DC 1862 14107 bset coilerr,revlimbits ; out of sync once, so ignore 14108 ; and follow instinct C0DE 20F0 14109 bra set_a_detect 14110 set_b_clr: C0E0 1962 14111 bclr coilerr,revlimbits ; reset error bit 14112 set_b_detect: C0E2 3F6A 14113 clr coilsel C0E4 126A 14114 bset coilbbit,coilsel 14115 C0E6 CCC4C7 14116 j_done_cd: jmp done_decode 14117 14118 **************************************************************************** 14119 ** Wheel simulator. Allows any special decoders to be tested on the stim 14120 ** doesn't look for any pattern, just cycles through outputs. Trigger 14121 ** return WILL NOT WORK 14122 ** Flash variable determines how many outputs, use wheelcount as counter 14123 **************************************************************************** 14124 wheelsim: C0E9 B6E3 14125 lda wheelcount C0EB 4C 14126 inca C0EC C1E00D 14127 cmp whlsimcnt C0EF 2601 14128 bne whlsimdecode 14129 whlsimreset: C0F1 4F 14130 clra 14131 whlsimdecode: C0F2 B7E3 14132 sta wheelcount C0F4 3F6A 14133 clr coilsel 14134 ; cbeqa #0,wsda C0F6 410110 14135 cbeqa #1,wsdb C0F9 410211 14136 cbeqa #2,wsdc C0FC 410312 14137 cbeqa #3,wsdd C0FF 410413 14138 cbeqa #4,wsde C102 410514 14139 cbeqa #5,wsdf 14140 ;wsda: C105 106A 14141 bset coilabit,coilsel C107 2012 14142 bra wheelsimdone 14143 wsdb: C109 126A 14144 bset coilbbit,coilsel C10B 200E 14145 bra wheelsimdone 14146 wsdc: C10D 146A 14147 bset coilcbit,coilsel C10F 200A 14148 bra wheelsimdone 14149 wsdd: C111 166A 14150 bset coildbit,coilsel C113 2006 14151 bra wheelsimdone 14152 wsde: C115 186A 14153 bset coilebit,coilsel C117 2002 14154 bra wheelsimdone 14155 wsdf: C119 1A6A 14156 bset coilfbit,coilsel 14157 ; bra wheelsimdone 14158 14159 wheelsimdone: C11B CCC4C7 14160 jmp done_decode 14161 **************************************************************************** 14162 ** Wheel decoder 2. No missing teeth but a second wheel with "reset" tabs 14163 ** 14164 ** The 0.1ms section looks out for the second pulse but we check here too 14165 ** on the rising edge the wheelcount is reset to zero so the next real pulse 14166 ** is tooth no.1 14167 ** This is what the Mazda and Toyota guys are after. 14168 ** Could also be used to do COP on a 4cyl by mounting the "reset" tab on the 14169 ** cam and having two tabs on the crank. 14170 **************************************************************************** 14171 decode_wheel2: 14172 14173 ;repeat check in here, in case two triggers come at once 14174 ;on rising edge of input reset wheelcount to zero C11E 066D30 14175 brset trigger2,EnhancedBits6,no_wd_trig2 ; already found 14176 C121 C6E021 14177 lda dtmode_f C124 A502 14178 bit #trig2risefallb C126 2618 14179 bne wd_risefall2 ; do rising and falling C128 A501 14180 bit #trig2fallb C12A 260A 14181 bne wd_inv2 14182 14183 ;on rising edge of input reset wheelcount to zero C12C 086122 14184 brset rise,sparkbits,no_wd_trig2 ; already high so bail out 14185 ;not already in high state so see if pin has been asserted C12F 09021F 14186 brclr pin11,portc,no_wd_trig2 ; inactive 14187 14188 ;we've found a rising edge of pin11 C132 1861 14189 bset rise,sparkbits ; this bit used to monitor the edge of the input C134 2019 14190 bra wd2_2_flag ; flag the trigger 14191 14192 wd_inv2: 14193 ;on falling edge of input reset wheelcount to zero C136 096118 14194 brclr rise,sparkbits,no_wd_trig2 ; already low so bail out C139 080215 14195 brset pin11,portc,no_wd_trig2 14196 14197 ;we've found a falling edge of pin11 C13C 1961 14198 bclr rise,sparkbits ; this bit used to monitor the edge of the input C13E 200F 14199 bra wd2_2_flag ; flag the trigger 14200 14201 wd_risefall2: 14202 ;on rising and falling edge of input reset wheelcount to zero C140 086107 14203 brset rise,sparkbits,wd2_rf1 ; was high C143 09020B 14204 brclr pin11,portc,no_wd_trig2 ; still low C146 1861 14205 bset rise,sparkbits C148 2005 14206 bra wd2_2_flag 14207 14208 wd2_rf1: C14A 080204 14209 brset pin11,portc,no_wd_trig2 ; still high C14D 1961 14210 bclr rise,sparkbits 14211 ; bra wd2_2_flag ; flag the trigger 14212 14213 wd2_2_flag: C14F 166D 14214 bset trigger2,EnhancedBits6 ; flag the trigger 14215 14216 no_wd_trig2: 14217 14218 ;are we doing missing tooth or non-missing tooth with the 2nd trigger C151 C6E042 14219 lda feature4_f C154 A501 14220 bit #miss2ndb C156 264E 14221 bne decode_wheel ; miss + 2nd 14222 14223 ;new - are we logging teeth? C158 056C27 14224 brclr toothlog,EnhancedBits5,w2dec_notlog 14225 ;we are logging so record something C15B 8C 14226 clrh C15C CE01CF 14227 ldx VE_r+PAGESIZE-2 C15F B6BD 14228 lda cTimeH C161 D70114 14229 sta VE_r,x C164 5C 14230 incx C165 B6BE 14231 lda cTimeL C167 D70114 14232 sta VE_r,x C16A 5C 14233 incx C16B A3B9 14234 cpx #PAGESIZE-4 C16D 2510 14235 blo wd2tl C16F 5F 14236 clrx C170 C6E05A 14237 lda numteeth_f C173 A117 14238 cmp #23T ; hard coded lowres/highres 14239 ; transition (was 20T) C175 2204 14240 bhi wd2th C177 A601 14241 lda #1 ; 1 = 0.1ms units C179 2001 14242 bra wd2ts msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 119 MC68HC908GP32 User Bootloader 14243 wd2th: C17B 4F 14244 clra ; 0 = 1us units 14245 wd2ts: C17C C701D0 14246 sta VE_r+PAGESIZE-1 14247 wd2tl: C17F CF01CF 14248 stx VE_r+PAGESIZE-2 14249 w2dec_notlog: 14250 14251 ;this is "real" start of 2nd trigger. 14252 ;see if 2nd trigger came in since last time we were in here C182 076D08 14253 brclr trigger2,EnhancedBits6,cksync2 ; no it didn't C185 176D 14254 bclr trigger2,EnhancedBits6 ; clear it C187 126D 14255 bset wsync,EnhancedBits6 C189 3FE3 14256 clr wheelcount C18B 2006 14257 bra no_wd_trig3 14258 cksync2: C18D 026D03 14259 brset wsync,EnhancedBits6,no_wd_trig3 C190 CCC247 14260 jmp w_rti ; go to exit for normal wheel decoder 14261 14262 no_wd_trig3: 14263 C193 B6E3 14264 lda wheelcount C195 C1E05A 14265 cmp numteeth_f C198 2507 14266 blo wd2_cont 14267 ;we should have received a "reset" tab by now.. declare unsynced and 14268 ;wait for another reset tab C19A 136D 14269 bclr wsync,EnhancedBits6 C19C 3FE3 14270 clr wheelcount C19E CCC247 14271 jmp w_rti ; go to exit for normal wheel decoder 14272 14273 wd2_cont: C1A1 3CE3 14274 inc wheelcount C1A3 CCC340 14275 jmp wc_op ; jump to wheel decoder o/p selection 14276 **************************************************************************** 14277 ** generic wheel decoder 14278 ** -1 Missing tooth when iTimet > 1.5 * iTimep 14279 ** -2 Missing teeth when iTimet > 1.5 * iTimep (was 2.5*) (changed 029k) 14280 ** We don't get here until we've had a few teeth. When we've found 14281 ** missing tooth then clr top bit of wheelcount 14282 ** 14283 **************************************************************************** 14284 decode_wheel: C1A6 C6E05A 14285 lda numteeth_f C1A9 A117 14286 cmp #23T ; hard coded lowres/highres 14287 ; transition (was 20T) C1AB 2208 14288 bhi w_high 14289 ;XXXX 14290 ; brclr crank,engine,w_high ;; XXXX try this to get rpm below 100 14291 w_low: 14292 ;as per Neon, use cTimeH/L where poss as it is zp 14293 ;use lowres timer for calcs C1AD 4EF3BE 14294 mov lowresL,cTimeL C1B0 4EF2BD 14295 mov lowresH,cTimeH 14296 C1B3 2027 14297 bra w_decode 14298 14299 w_high: C1B5 B64D 14300 lda rpm C1B7 2615 14301 bne w_high_fast 14302 ;check for very slow rpm that will cause timer overflow. 14303 ;-1 does *1.5 so max time is 65/1.5 = 43ms -> 38rpm on 36-1 14304 ;-2 does *2.5 = 26ms -> 38rpm on 60-2 14305 ;if this check omitted then wacky rpm displayed when really very slow 14306 ;65ms = $28F x0.1ms 14307 ;029q3 put it back in C1B9 B6F2 14308 lda lowresH C1BB A102 14309 cmp #2 C1BD 250F 14310 blo w_high_fast ; fast enough C1BF 2206 14311 bhi j_lost_sync2 ; must re-sync - too slow C1C1 B6F3 14312 lda lowresL ; lowresH=2, so check low byte C1C3 A188 14313 cmp #$88 ; give a little leeway (64.8ms) C1C5 2507 14314 blo w_high_fast ; if less then ok, otherwise re-sync 14315 ;029e. Shouldn't check against 26ms then? Try 25.6ms as it is so easy. 14316 ;X lda lowresH 14317 ;X beq w_high_fast ; fast enough 14318 j_lost_sync2: C1C7 3FF3 14319 clr lowresL ; always reset the lowres ready for next int C1C9 3FF2 14320 clr lowresH C1CB CCC442 14321 jmp lost_sync_w 14322 w_high_fast: 14323 ;T2 already read at start of handler C1CE C60204 14324 lda T2CurrL C1D1 B0C5 14325 sub T2PrevL ; Calculate cycle time C1D3 B7BE 14326 sta cTimeL C1D5 C60203 14327 lda T2CurrH C1D8 B2C4 14328 sbc T2PrevH C1DA B7BD 14329 sta cTimeH 14330 14331 ;now try to decode pattern 14332 w_decode: 14333 ;new - are we logging teeth? C1DC 056C27 14334 brclr toothlog,EnhancedBits5,w_dec_notlog 14335 ;we are logging so record something C1DF 8C 14336 clrh C1E0 CE01CF 14337 ldx VE_r+PAGESIZE-2 C1E3 B6BD 14338 lda cTimeH C1E5 D70114 14339 sta VE_r,x C1E8 5C 14340 incx C1E9 B6BE 14341 lda cTimeL C1EB D70114 14342 sta VE_r,x C1EE 5C 14343 incx C1EF A3B9 14344 cpx #PAGESIZE-4 C1F1 2510 14345 blo wdtl C1F3 5F 14346 clrx C1F4 C6E05A 14347 lda numteeth_f C1F7 A117 14348 cmp #23T ; hard coded lowres/highres 14349 ; transition (was 20T) C1F9 2204 14350 bhi wdth C1FB A601 14351 lda #1 ; 1 = 0.1ms units C1FD 2001 14352 bra wdts 14353 wdth: C1FF 4F 14354 clra ; 0 = 1us units 14355 wdts: C200 C701D0 14356 sta VE_r+PAGESIZE-1 14357 wdtl: C203 CF01CF 14358 stx VE_r+PAGESIZE-2 14359 w_dec_notlog: 14360 14361 ; added in 029p - always use 024s9 during cranking C206 02422D 14362 brset crank,engine,w_decode_ok ; do not do this while cranking 14363 14364 ;Ryan reports problems with the NEW routine below, so now config option to use 024s9 14365 ;style decoder instead. This way can swap versions on the fly C209 C6E05C 14366 lda feature6_f C20C A508 14367 bit #wheel_oldb C20E 2702 14368 beq decoder_new ; 0 = new decoder 14369 14370 ;bypass the tooth false trigger 14371 ;load up old vars into new ones 14372 ; mov stHp,avgtoothh ; now the same thing 14373 ; mov stLp,avgtoothl C210 2024 14374 bra w_decode_ok 14375 14376 decoder_new: 14377 ;NEW 14378 ;calculate half of average tooth time msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 120 MC68HC908GP32 User Bootloader C212 B6F0 14379 lda avgtoothh C214 44 14380 lsra C215 C70209 14381 sta avgtth12h C218 B6F1 14382 lda avgtoothl C21A 46 14383 rora C21B C7020A 14384 sta avgtth12l 14385 C21E 046D15 14386 brset whold,EnhancedBits6,w_decode_ok ; still in holdoff, so no check C221 036D12 14387 brclr wsync,EnhancedBits6,w_decode_ok ; not synced yet, so no check 14388 ;check to see if obvious false trigger C224 B6BD 14389 lda cTimeH C226 C10209 14390 cmp avgtth12h ; divided by two before storage C229 220B 14391 bhi w_decode_ok C22B 2507 14392 blo w_decode_false C22D B6BE 14393 lda cTimeL C22F C1020A 14394 cmp avgtth12l C232 2202 14395 bhi w_decode_ok 14396 14397 w_decode_false: C234 8A 14398 pulh C235 80 14399 rti ; get out of here - false trigger 14400 14401 w_decode_ok: 14402 ;END NEW C236 3FF3 14403 clr lowresL ; always reset the lowres ready for next int C238 3FF2 14404 clr lowresH 14405 ; ignore first few pulses C23A 056D1E 14406 brclr whold,EnhancedBits6,w_decode2 ; if bit 6 clr then we've done holdoff C23D 3AE3 14407 dec wheelcount C23F B6E3 14408 lda wheelcount C241 A43F 14409 and #$3F ; ignore top bits during holdoff downcount 14410 ; keeps wheelcount compatible with Neon mode C243 2602 14411 bne w_rti C245 156D 14412 bclr whold,EnhancedBits6 14413 w_rti: C247 C60203 14414 lda T2CurrH C24A B7C4 14415 sta T2PrevH ; Make current value tooth last C24C C60204 14416 lda T2CurrL C24F B7C5 14417 sta T2PrevL 14418 14419 ;this section only runs during tooth holdoff - just store last tooth into average C251 B6BE 14420 lda cTimeL C253 B7F1 14421 sta avgtoothl C255 B6BD 14422 lda cTimeH C257 B7F0 14423 sta avgtoothh C259 8A 14424 pulh C25A 80 14425 rti 14426 14427 w_decode2: 14428 ; brset WHEEL2,personality,w_dec2m2 commented 029k 14429 ;mult iTimeH/Lp * .5 C25B B6F0 14430 lda avgtoothh C25D 44 14431 lsra C25E B7BF 14432 sta SparkTempH C260 B6F1 14433 lda avgtoothl C262 46 14434 rora C263 B7C0 14435 sta SparkTempL 14436 ; add iTimep so * 1.5 for -1 teeth C265 B6C0 14437 lda SparkTempL C267 BBF1 14438 add avgtoothl C269 B7C0 14439 sta SparkTempL C26B B6BF 14440 lda SparkTempH C26D B9F0 14441 adc avgtoothh C26F B7BF 14442 sta SparkTempH 14443 ; bra w_comp 14444 ; 14445 ;w_dec2m2: 14446 ; ; do * 2, for -2 teeth 14447 ; lda avgtoothl 14448 ; lsla 14449 ; sta SparkTempL 14450 ; lda avgtoothh 14451 ; rola 14452 ; sta SparkTempH 14453 14454 w_comp: 14455 ; now compare current hires time C271 B6BD 14456 lda cTimeH C273 B1BF 14457 cmp SparkTempH C275 220A 14458 bhi is_miss C277 2538 14459 blo not_miss C279 B6BE 14460 lda cTimeL C27B B1C0 14461 cmp SparkTempL C27D 2202 14462 bhi is_miss C27F 2030 14463 bra not_miss 14464 14465 is_miss: 14466 ;sph ngc part 14467 ;compare rise time to tooth time C281 C6E021 14468 lda dtmode_f C284 A504 14469 bit #NGC_testb C286 2715 14470 beq is_miss1 ; normal wheel operation C288 B6BD 14471 lda cTimeH C28A C101FF 14472 cmp stL C28D 2203 14473 bhi ngc_skip ;cTime higher, we're at the long tooth C28F CCC298 14474 jmp is_miss2 ;otherwise we're at the missing tooth (-2) 14475 14476 ngc_skip: C292 3CE3 14477 inc wheelcount ;we're at the "long tooth" (+2) part C294 3CE3 14478 inc wheelcount ;inc wheelcount by 2 and continue C296 2019 14479 bra not_miss 14480 14481 is_miss2: C298 A600 14482 lda #0 C29A C701FF 14483 sta stL ;clear counter for next IRQ time (ngc) 14484 is_miss1: C29D 3FE3 14485 clr wheelcount ; declare we are synced and 14486 ; reset counter 14487 ;now check if 2nd trigger input is set, if so start 2nd revolution at num teeth 14488 ; i.e. on a 60-2, 0-359 deg = 0-59 14489 ; 360-719 deg = 60-119 14490 C29F 076D08 14491 brclr trigger2,EnhancedBits6,not_2ndmiss C2A2 C6E05A 14492 lda numteeth_f ; from 028c now holds 2 revs number (i.e. 60-2 -> 120) C2A5 44 14493 lsra C2A6 B7E3 14494 sta wheelcount C2A8 176D 14495 bclr trigger2,EnhancedBits6 ; clear flag 14496 not_2ndmiss: C2AA 126D 14497 bset wsync,EnhancedBits6 C2AC 076302 14498 brclr WHEEL2,personality,not_miss C2AF 3CE3 14499 inc wheelcount 14500 not_miss: C2B1 C6E021 14501 lda dtmode_f C2B4 A504 14502 bit #NGC_testb C2B6 2705 14503 beq not_miss_norm ; normal wheel operation C2B8 A600 14504 lda #0 C2BA C701FF 14505 sta stL ;sph clear counter for next IRQ time 14506 not_miss_norm: C2BD 024211 14507 brset crank,engine,tooth_noavg ; do not use 025 style during cranking 14508 ;if period too short, use non-averaging method regardless C2C0 B6BD 14509 lda cTimeH C2C2 2606 14510 bne cknew C2C4 B6BE 14511 lda cTimeL C2C6 A10C 14512 cmp #12T C2C8 2507 14513 blo tooth_noavg ; too short, don't average (attempt at working around the 12-1 5500rpm issue with "025 style" 14514 cknew: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 121 MC68HC908GP32 User Bootloader 14515 ;check if using old decoder C2CA C6E05C 14516 lda feature6_f C2CD A508 14517 bit #wheel_oldb C2CF 270A 14518 beq tooth_avg 14519 14520 tooth_noavg: 14521 ;like old method, just store previoud period C2D1 B6BD 14522 lda cTimeH C2D3 B7F0 14523 sta avgtoothh C2D5 B6BE 14524 lda cTimeL C2D7 B7F1 14525 sta avgtoothl C2D9 2050 14526 bra not_miss_skip ; 1 = old decoder 14527 14528 tooth_avg: 14529 ;NEW 14530 ;update average tooth count 14531 ;new average = 3/4 old avg + 1/4 current tooth 14532 ; 14533 ;get 1/4 current tooth C2DB B6BD 14534 lda cTimeH C2DD 44 14535 lsra C2DE C70205 14536 sta currtth14h C2E1 B6BE 14537 lda cTimeL C2E3 46 14538 rora C2E4 C70206 14539 sta currtth14l C2E7 C60205 14540 lda currtth14h C2EA 44 14541 lsra C2EB C70205 14542 sta currtth14h C2EE C60206 14543 lda currtth14l C2F1 46 14544 rora C2F2 C70206 14545 sta currtth14l 14546 ;get 1/4 avg tooth C2F5 B6F0 14547 lda avgtoothh C2F7 44 14548 lsra C2F8 C70207 14549 sta avgtth14h C2FB B6F1 14550 lda avgtoothl C2FD 46 14551 rora C2FE C70208 14552 sta avgtth14l C301 C60207 14553 lda avgtth14h C304 44 14554 lsra C305 C70207 14555 sta avgtth14h C308 C60208 14556 lda avgtth14l C30B 46 14557 rora C30C C70208 14558 sta avgtth14l 14559 ;avg tooth - 1/4 avg tooth C30F B6F1 14560 lda avgtoothl C311 C00208 14561 sub avgtth14l C314 B7F1 14562 sta avgtoothl C316 B6F0 14563 lda avgtoothh C318 C20207 14564 sbc avgtth14h C31B B7F0 14565 sta avgtoothh 14566 ;3/4 avg tooth + 1/4 new tooth C31D B6F1 14567 lda avgtoothl C31F CB0206 14568 add currtth14l C322 B7F1 14569 sta avgtoothl C324 B6F0 14570 lda avgtoothh C326 C90205 14571 adc currtth14h C329 B7F0 14572 sta avgtoothh 14573 ;END NEW 14574 not_miss_skip: C32B 036D0F 14575 brclr wsync,EnhancedBits6,jretw ; if non synced then wheelcount is meaningless C32E 3CE3 14576 inc wheelcount C330 B6E3 14577 lda wheelcount C332 C1E05A 14578 cmp numteeth_f C335 2303 14579 bls not_miss_ok C337 CCC442 14580 jmp lost_sync_w 14581 not_miss_ok: C33A 026D03 14582 brset wsync,EnhancedBits6,wc_op 14583 jretw: C33D CCC403 14584 jmp ret_w 14585 wc_op: 14586 ;see if our tooth matches the user input trigger point C340 B6E3 14587 lda wheelcount C342 0B6B42 14588 brclr nextcyl,EnhancedBits4,wc_op2 C345 076B3F 14589 brclr wspk,EnhancedBits4,wc_op2 ; if not multi output doesn't matter 14590 14591 ;if running next-cyl and wheel decoder we would send running output to the 14592 ;wrong coil unless we take this action here... 14593 ;(doesn't work?) 14594 14595 ;check if 4th spark output in use C348 086618 14596 brset out3sparkd,feature2,wdnc4 14597 ;check if 3rd spark output in use 14598 ;don't check for 2nd output, wouldn't have got here otherwise C34B 05642C 14599 brclr REUSE_LED18,outputpins,wdnc2 ; want 1 } spark c C34E 076429 14600 brclr REUSE_LED18_2,outputpins,wdnc2 ; want 1 } 14601 wdnc3: C351 C1E019 14602 cmp trig1_f C354 2779 14603 beq w_trig2 C356 C1E01A 14604 cmp trig2_f C359 277E 14605 beq w_trig3 C35B C1E01B 14606 cmp trig3_f C35E 2768 14607 beq w_trig1 C360 CCC3A5 14608 jmp wc_op3 14609 wdnc4: C363 C1E019 14610 cmp trig1_f C366 2767 14611 beq w_trig2 C368 C1E01A 14612 cmp trig2_f C36B 276C 14613 beq w_trig3 C36D C1E01B 14614 cmp trig3_f C370 2771 14615 beq w_trig4 C372 C1E01C 14616 cmp trig4_f C375 2751 14617 beq w_trig1 C377 CCC3A5 14618 jmp wc_op3 14619 wdnc2: C37A C1E019 14620 cmp trig1_f C37D 2750 14621 beq w_trig2 C37F C1E01A 14622 cmp trig2_f C382 2744 14623 beq w_trig1 C384 CCC3A5 14624 jmp wc_op3 14625 14626 14627 wc_op2: 14628 ; decode multiple outputs C387 C1E019 14629 cmp trig1_f C38A 273C 14630 beq w_trig1 C38C C1E01A 14631 cmp trig2_f C38F 273E 14632 beq w_trig2 C391 C1E01B 14633 cmp trig3_f C394 2743 14634 beq w_trig3 C396 C1E01C 14635 cmp trig4_f C399 2748 14636 beq w_trig4 C39B C1E091 14637 cmp trig5_f C39E 274D 14638 beq w_trig5 C3A0 C1E092 14639 cmp trig6_f C3A3 2752 14640 beq w_trig6 14641 14642 wc_op3: C3A5 0A6C5B 14643 brset rsh_r,EnhancedBits5,ret_w ; don't check if doing trailing C3A8 C1E01D 14644 cmp trig1ret_f C3AB 2762 14645 beq w_trigret1 C3AD C1E01E 14646 cmp trig2ret_f C3B0 2763 14647 beq w_trigret2 C3B2 C1E01F 14648 cmp trig3ret_f C3B5 2767 14649 beq w_trigret3 C3B7 C1E020 14650 cmp trig4ret_f msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 122 MC68HC908GP32 User Bootloader C3BA 276B 14651 beq w_trigret4 C3BC C1E093 14652 cmp trig5ret_f C3BF 276F 14653 beq w_trigret5 C3C1 C1E094 14654 cmp trig6ret_f C3C4 2773 14655 beq w_trigret6 C3C6 203B 14656 bra ret_w 14657 14658 w_trig1: C3C8 3F6A 14659 clr coilsel C3CA 106A 14660 bset coilabit,coilsel C3CC CCC4BB 14661 jmp w_store2 14662 14663 w_trig2: C3CF 0964F6 14664 brclr REUSE_LED19,outputpins,w_trig1 ; if spark B not defined 14665 ; then just one o/p C3D2 3F6A 14666 clr coilsel C3D4 126A 14667 bset coilbbit,coilsel C3D6 CCC4BB 14668 jmp w_store2 14669 14670 w_trig3: C3D9 0964EC 14671 brclr REUSE_LED19,outputpins,w_trig1 C3DC 3F6A 14672 clr coilsel C3DE 146A 14673 bset coilcbit,coilsel C3E0 CCC4BB 14674 jmp w_store2 14675 14676 w_trig4: C3E3 0964E2 14677 brclr REUSE_LED19,outputpins,w_trig1 C3E6 3F6A 14678 clr coilsel C3E8 166A 14679 bset coildbit,coilsel C3EA CCC4BB 14680 jmp w_store2 14681 14682 w_trig5: C3ED 0964D8 14683 brclr REUSE_LED19,outputpins,w_trig1 C3F0 3F6A 14684 clr coilsel C3F2 186A 14685 bset coilebit,coilsel C3F4 CCC4BB 14686 jmp w_store2 14687 14688 w_trig6: C3F7 0964CE 14689 brclr REUSE_LED19,outputpins,w_trig1 C3FA 3F6A 14690 clr coilsel C3FC 1A6A 14691 bset coilfbit,coilsel C3FE CCC4BB 14692 jmp w_store2 14693 14694 ret_w2: C401 1C61 14695 bset trigret,SparkBits 14696 14697 ret_w: C403 C60203 14698 lda T2CurrH C406 B7C4 14699 sta T2PrevH ; Make current value tooth last C408 C60204 14700 lda T2CurrL C40B B7C5 14701 sta T2PrevL C40D 8A 14702 pulh C40E 80 14703 rti 14704 14705 ; now the "trigger return" tooth for cranking timing 14706 w_trigret1: C40F 3F6A 14707 clr coilsel C411 106A 14708 bset coilabit,coilsel C413 20EC 14709 bra ret_w2 14710 14711 w_trigret2: C415 0964F7 14712 brclr REUSE_LED19,outputpins,w_trigret1 ; if spark B not 14713 ; defined then just one o/p C418 3F6A 14714 clr coilsel C41A 126A 14715 bset coilbbit,coilsel C41C 20E3 14716 bra ret_w2 14717 14718 w_trigret3: C41E 0964EE 14719 brclr REUSE_LED19,outputpins,w_trigret1 C421 3F6A 14720 clr coilsel C423 146A 14721 bset coilcbit,coilsel C425 20DA 14722 bra ret_w2 14723 14724 w_trigret4: C427 0964E5 14725 brclr REUSE_LED19,outputpins,w_trigret1 C42A 3F6A 14726 clr coilsel C42C 166A 14727 bset coildbit,coilsel C42E 20D1 14728 bra ret_w2 14729 14730 w_trigret5: C430 0964DC 14731 brclr REUSE_LED19,outputpins,w_trigret1 C433 3F6A 14732 clr coilsel C435 186A 14733 bset coilebit,coilsel C437 20C8 14734 bra ret_w2 14735 14736 w_trigret6: C439 0964D3 14737 brclr REUSE_LED19,outputpins,w_trigret1 C43C 3F6A 14738 clr coilsel C43E 1A6A 14739 bset coilfbit,coilsel C440 20BF 14740 bra ret_w2 14741 14742 lost_sync_w: ; we found too many teeth after 14743 ; the missing one, start syncing again 14744 ; also do holdoff. This should be 14745 ; rare, but if we lost sync that 14746 ; bad we'd better start all over C442 6EC3E3 14747 mov #WHEELINIT,wheelcount ; was %10000000 (missing #) C445 136D 14748 bclr wsync,EnhancedBits6 C447 146D 14749 bset whold,EnhancedBits6 14750 ;NEW C449 A600 14751 lda #0 C44B B7F0 14752 sta avgtoothh C44D B7F1 14753 sta avgtoothl 14754 ;NEW 14755 14756 ;worth killing the dwell timers to avoid dwells starting C44F macro 14757 TurnAllSpkOff ; call macro to turn off all C44F 0D6B10 14758 BRCLR INVSPK,ENHANCEDBITS4,SOIN C452 1300 14759 BCLR IASC,PORTA C454 1102 14760 BCLR SLED,PORTC C456 1502 14761 BCLR WLED,PORTC C458 1302 14762 BCLR ALED,PORTC C45A 1103 14763 BCLR OUTPUT3,PORTD C45C 1702 14764 BCLR PIN10,PORTC C45E 1503 14765 BCLR KNOCKIN,PORTD C460 203E 14766 BRA SOIN_DONE 14767 SOIN: C462 006404 14768 BRSET REUSE_FIDLE,OUTPUTPINS,SOIN1 C465 1300 14769 BCLR IASC,PORTA C467 2002 14770 BRA SOIN2 C469 1200 14771 SOIN1: BSET IASC,PORTA C46B 026404 14772 SOIN2: BRSET REUSE_LED17,OUTPUTPINS,SOIN3 C46E 1102 14773 BCLR SLED,PORTC C470 2002 14774 BRA SOIN4 C472 1002 14775 SOIN3: BSET SLED,PORTC C474 086404 14776 SOIN4: BRSET REUSE_LED19,OUTPUTPINS,SOIN5 C477 1302 14777 BCLR ALED,PORTC C479 2002 14778 BRA SOIN6 C47B 1202 14779 SOIN5: BSET ALED,PORTC C47D 056407 14780 SOIN6: BRCLR REUSE_LED18,OUTPUTPINS,SOIN7 C480 076404 14781 BRCLR REUSE_LED18_2,OUTPUTPINS,SOIN7 C483 1402 14782 BSET WLED,PORTC C485 2002 14783 BRA SOIN8 C487 1502 14784 SOIN7: BCLR WLED,PORTC 14785 SOIN8: C489 096602 14786 BRCLR OUT3SPARKD,FEATURE2,SOIN9 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 123 MC68HC908GP32 User Bootloader C48C 1003 14787 BSET OUTPUT3,PORTD 14788 SOIN9: C48E C6E074 14789 LDA FEATURE8_F C491 A508 14790 BIT #SPKEOPB C493 2702 14791 BEQ SOIN10 C495 1602 14792 BSET PIN10,PORTC 14793 SOIN10: C497 C6E074 14794 LDA FEATURE8_F C49A A510 14795 BIT #SPKFOPB C49C 2702 14796 BEQ SOIN11 C49E 1403 14797 BSET KNOCKIN,PORTD 14798 SOIN11: 14799 SOIN_DONE: C4A0 3FB1 14800 CLR SPARKONLEFTAH C4A2 3FB2 14801 CLR SPARKONLEFTAL C4A4 3FB3 14802 CLR SPARKONLEFTBH C4A6 3FB4 14803 CLR SPARKONLEFTBL C4A8 3FB5 14804 CLR SPARKONLEFTCH C4AA 3FB6 14805 CLR SPARKONLEFTCL C4AC 3FB7 14806 CLR SPARKONLEFTDH C4AE 3FB8 14807 CLR SPARKONLEFTDL C4B0 3FB9 14808 CLR SPARKONLEFTEH C4B2 3FBA 14809 CLR SPARKONLEFTEL C4B4 3FBB 14810 CLR SPARKONLEFTFH C4B6 3FBC 14811 CLR SPARKONLEFTFL C4B8 CCC403 14812 jmp ret_w 14813 14814 w_store2: C4BB 1D61 14815 bclr trigret,SparkBits 14816 14817 w_store: C4BD C60203 14818 lda T2CurrH C4C0 B7C4 14819 sta T2PrevH ; Make current value tooth last C4C2 C60204 14820 lda T2CurrL C4C5 B7C5 14821 sta T2PrevL 14822 ***************************************************************************** 14823 ** When getting here we should have decoded crank signal into one pulse 14824 ** per ignition event so we can just drop into the standard MSnS code. 14825 ** A smarter implementation would use the individual teeth for more 14826 ** accurate timing 14827 ***************************************************************************** 14828 done_decode: C4C7 056405 14829 brclr REUSE_LED18,outputpins,dcd_no_led C4CA 066402 14830 brset REUSE_LED18_2,outputpins,dcd_no_led ; if coil c C4CD 1402 14831 bset wled,portc ; Turn on IRQ led, orig MSnS code 14832 dcd_no_led: 14833 14834 ;tacho output C4CF C6E090 14835 lda tachconf_f C4D2 A57F 14836 bit #$7f C4D4 273F 14837 beq tach_done C4D6 A580 14838 bit #$80 ; see if in divide by 2 mode C4D8 270A 14839 beq tach_full C4DA B66C 14840 lda EnhancedBits5 C4DC A880 14841 eor #ctodivb C4DE B76C 14842 sta EnhancedBits5 C4E0 A580 14843 bit #ctodivb C4E2 2731 14844 beq tach_done 14845 tach_full: 14846 14847 ; Tacho ouput C4E4 C6E090 14848 lda tachconf_f C4E7 A47F 14849 and #$7f C4E9 272A 14850 beq tach_done 14851 ;tachon: C4EB 410111 14852 cbeqa #1T,tachon_x2 C4EE 410212 14853 cbeqa #2T,tachon_x3 C4F1 410313 14854 cbeqa #3T,tachon_x4 C4F4 410414 14855 cbeqa #4T,tachon_x5 C4F7 410515 14856 cbeqa #5T,tachon_out3 C4FA 410616 14857 cbeqa #6T,tachon_pin10 C4FD 2016 14858 bra tach_done 14859 tachon_x2: C4FF 1A00 14860 bset water,porta C501 2012 14861 bra tach_done 14862 tachon_x3: C503 1800 14863 bset water2,porta C505 200E 14864 bra tach_done 14865 tachon_x4: C507 1600 14866 bset output1,porta C509 200A 14867 bra tach_done 14868 tachon_x5: C50B 1400 14869 bset output2,porta C50D 2006 14870 bra tach_done 14871 tachon_out3: C50F 1003 14872 bset output3,portd C511 2002 14873 bra tach_done 14874 tachon_pin10: C513 1602 14875 bset pin10,portc 14876 ; bra tach_done 14877 14878 tach_done: 14879 ;save old values C515 4EACF9 14880 mov iTimeX,iTimepX C518 4EADFA 14881 mov iTimeH,iTimepH C51B 4EAEFB 14882 mov iTimeL,iTimepL 14883 14884 ;T2 read at start of DOSQUIRT C51E C60204 14885 lda T2CurrL C521 B0AB 14886 sub T2LastL ; Calculate cycle time C523 B7AE 14887 sta iTimeL ; global var C525 C60203 14888 lda T2CurrH C528 B2AA 14889 sbc T2LastH C52A B7AD 14890 sta iTimeH C52C C60202 14891 lda T2CurrX C52F B2A9 14892 sbc T2LastX C531 B7AC 14893 sta iTimeX 14894 14895 ;Must check to see if iTime has gone negative. This can occur if the interrupt to increment 14896 ; the top byte of the timer gets missed. The roll_chk code obviously does not work correctly. 14897 14898 ;;;;CODE TO FIX DROPOUT C533 0FAC0A 14899 brclr 7,iTimeX,noitx_err 14900 ;if top bit of iTimeX is set then software rollover must have got missed 14901 ;giving a negative time C536 C60202 14902 lda T2CurrX C539 AB01 14903 add #1 ; increment the saved "current" value of the timer C53B C70202 14904 sta T2CurrX 14905 ;assume value should really be zero C53E 3FAC 14906 clr iTimeX ; assume top byte is zero 14907 noitx_err: 14908 ;;;;CODE TO FIX DROPOUT 14909 14910 ;check for dual dizzy feature C540 056320 14911 brclr WHEEL,personality,nondualdizzy ; if not wheel decoder then skip C543 C6E05C 14912 lda feature6_f C546 A510 14913 bit #dualdizzyb C548 2719 14914 beq nondualdizzy C54A 026A12 14915 brset coilbbit,coilsel,dualdb C54D 046A09 14916 brset coilcbit,coilsel,dualda C550 066A0C 14917 brset coildbit,coilsel,dualdb C553 086A03 14918 brset coilebit,coilsel,dualda C556 0A6A06 14919 brset coilfbit,coilsel,dualdb 14920 dualda: C559 3F6A 14921 clr coilsel C55B 106A 14922 bset coilabit,coilsel msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 124 MC68HC908GP32 User Bootloader C55D 2004 14923 bra nondualdizzy 14924 dualdb: C55F 3F6A 14925 clr coilsel C561 126A 14926 bset coilbbit,coilsel 14927 14928 nondualdizzy: 14929 ************* 14930 ; If we are running next cyl and low advance and get a lot of engine 14931 ; accel then we can sometime receive the next trigger pulse before 14932 ; we've actually sparked. We'll know if this happens because sparktrigg 14933 ; will be set when we get here. If this is the case then we'd better 14934 ; fire the coil right now. 14935 ; C563 0B6B06 14936 brclr nextcyl,EnhancedBits4,j_miss_ckskp ; ONLY for next-cylinder 14937 ;the nextcyl bit is only set for valid personalities 14938 C566 024206 14939 brset crank,engine,miss_chk ; at crank we ALWAYS fire at trigger C569 006103 14940 brset SparkTrigg,Sparkbits,miss_chk ; if set then we missed one 14941 C56C CCC9CF 14942 j_miss_ckskp: jmp miss_chk_skip 14943 miss_chk: 14944 C56F 0C6B74 14945 brset invspk,EnhancedBits4,mc_inv C572 macro 14946 COILNEG ; macro = fire coil for non-inverted C572 00646A 14947 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX C575 006C1E 14948 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG C578 0F6432 14949 BRCLR TOY_DLI,OUTPUTPINS,NILS C57B 006A06 14950 BRSET COILABIT,COILSEL,FCNITA C57E 026A09 14951 BRSET COILBBIT,COILSEL,FCNITB C581 046A0C 14952 BRSET COILCBIT,COILSEL,FCNITC 14953 FCNITA: C584 1302 14954 BCLR COILB,PORTC C586 1502 14955 BCLR WLED,PORTC C588 203D 14956 BRA DSLSA 14957 FCNITB: C58A 1202 14958 BSET COILB,PORTC C58C 1502 14959 BCLR WLED,PORTC C58E 2037 14960 BRA DSLSA 14961 FCNITC: C590 1302 14962 BCLR COILB,PORTC C592 1402 14963 BSET WLED,PORTC C594 2031 14964 BRA DSLSA 14965 ROT2NEG: C596 086528 14966 BRSET ROTARYFDIGN,FEATURE1,FIREFD C599 046A05 14967 BRSET COILCBIT,COILSEL,ROT2CN C59C 066A08 14968 BRSET COILDBIT,COILSEL,ROT2DN C59F 2026 14969 BRA DSLSA 14970 ROT2CN: C5A1 1502 14971 BCLR WLED,PORTC C5A3 1202 14972 BSET COILB,PORTC C5A5 203A 14973 BRA CN_END 14974 ROT2DN: C5A7 1402 14975 BSET WLED,PORTC C5A9 1202 14976 BSET COILB,PORTC C5AB 2034 14977 BRA CN_END 14978 NILS: C5AD 006A17 14979 BRSET COILABIT,COILSEL,DSLSA C5B0 026A18 14980 BRSET COILBBIT,COILSEL,DSLSB C5B3 046A19 14981 BRSET COILCBIT,COILSEL,DSLSC C5B6 066A1A 14982 BRSET COILDBIT,COILSEL,DSLSD C5B9 086A1B 14983 BRSET COILEBIT,COILSEL,DSLSE C5BC 0A6A1C 14984 BRSET COILFBIT,COILSEL,DSLSF C5BF 2020 14985 BRA CN_END 14986 FIREFD: C5C1 046A07 14987 BRSET COILCBIT,COILSEL,DSLSB C5C4 066A08 14988 BRSET COILDBIT,COILSEL,DSLSC 14989 DSLSA: C5C7 1002 14990 BSET COILA,PORTC C5C9 2016 14991 BRA CN_END 14992 DSLSB: C5CB 1202 14993 BSET COILB,PORTC C5CD 2012 14994 BRA CN_END 14995 DSLSC: C5CF 1402 14996 BSET WLED,PORTC C5D1 200E 14997 BRA CN_END 14998 DSLSD: C5D3 1003 14999 BSET OUTPUT3,PORTD C5D5 200A 15000 BRA CN_END 15001 DSLSE: C5D7 1602 15002 BSET PIN10,PORTC C5D9 2006 15003 BRA CN_END 15004 DSLSF: C5DB 1403 15005 BSET KNOCKIN,PORTD C5DD 2002 15006 BRA CN_END 15007 DSLSX: C5DF 1200 15008 BSET IASC,PORTA 15009 CN_END: C5E1 2050 15010 bra mc_fire_done 15011 C5E3 CCC9C9 15012 j_miss_ckdn2: jmp miss_chk_done 15013 mc_inv: C5E6 macro 15014 COILPOS ; macro = fire coil for inverted C5E6 006448 15015 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX C5E9 006C14 15016 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS C5EC 006A2A 15017 BRSET COILABIT,COILSEL,ILSOA C5EF 026A2B 15018 BRSET COILBBIT,COILSEL,ILSOB C5F2 046A2C 15019 BRSET COILCBIT,COILSEL,ILSOC C5F5 066A2D 15020 BRSET COILDBIT,COILSEL,ILSOD C5F8 086A2E 15021 BRSET COILEBIT,COILSEL,ILSOE C5FB 0A6A2F 15022 BRSET COILFBIT,COILSEL,ILSOF C5FE 2033 15023 BRA FC_END 15024 ROT2POS: C600 086510 15025 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD C603 046A05 15026 BRSET COILCBIT,COILSEL,ROT2CP C606 066A06 15027 BRSET COILDBIT,COILSEL,ROT2DP C609 200E 15028 BRA ILSOA 15029 ROT2CP: C60B 1302 15030 BCLR COILB,PORTC C60D 2024 15031 BRA FC_END 15032 ROT2DP: C60F 1302 15033 BCLR COILB,PORTC C611 2020 15034 BRA FC_END 15035 CHARGEFD: C613 046A0B 15036 BRSET COILCBIT,COILSEL,ILSOC C616 066A04 15037 BRSET COILDBIT,COILSEL,ILSOB 15038 ILSOA: C619 1102 15039 BCLR COILA,PORTC C61B 2016 15040 BRA FC_END 15041 ILSOB: C61D 1302 15042 BCLR COILB,PORTC C61F 2012 15043 BRA FC_END 15044 ILSOC: C621 1502 15045 BCLR WLED,PORTC C623 200E 15046 BRA FC_END 15047 ILSOD: C625 1103 15048 BCLR OUTPUT3,PORTD C627 200A 15049 BRA FC_END 15050 ILSOE: C629 1702 15051 BCLR PIN10,PORTC C62B 2006 15052 BRA FC_END 15053 ILSOF: C62D 1503 15054 BCLR KNOCKIN,PORTD C62F 2002 15055 BRA FC_END 15056 ILSOX: C631 1300 15057 BCLR IASC,PORTA 15058 FC_END: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 125 MC68HC908GP32 User Bootloader 15059 mc_fire_done: C633 1D33 15060 bclr TOIE,T2SC1 ; Disable timer interrupt 15061 ; (never got there) C635 036709 15062 brclr dwellcont,feature7,mc_fd 15063 ;if next_cyl and cranking then skip C638 0B6B03 15064 brclr nextcyl,EnhancedBits4,mc_fd2 C63B 024209 15065 brset crank,engine,mc_cd ; can cause a conflict 15066 mc_fd2: C63E 046103 15067 brset SparkLSpeed,SparkBits,jmcd ; low speed & dwell 15068 ; so don't schedule now 15069 mc_fd: C641 0B6603 15070 brclr min_dwell,feature2,mc_cd ; don't schedule here C644 CCC9C9 15071 jmcd: jmp miss_chk_done ; if minimal dwell wanted 15072 mc_cd: C647 macro 15073 CalcDwellspk ; Set spark on time C647 066B2D 15074 BRSET WSPK,ENHANCEDBITS4,WASTEDWELL C64A 55E4 15075 LDHX DWELLDELAY1 C64C 006A0B 15076 BRSET COILABIT,COILSEL,DD_A C64F 026A0C 15077 BRSET COILBBIT,COILSEL,DD_B C652 046A0D 15078 BRSET COILCBIT,COILSEL,DD_C C655 066A0E 15079 BRSET COILDBIT,COILSEL,DD_D C658 200E 15080 BRA JDD_END C65A 35B1 15081 DD_A: STHX SPARKONLEFTAH C65C 200A 15082 BRA JDD_END C65E 35B3 15083 DD_B: STHX SPARKONLEFTBH C660 2006 15084 BRA JDD_END C662 35B5 15085 DD_C: STHX SPARKONLEFTCH C664 2002 15086 BRA JDD_END C666 35B7 15087 DD_D: STHX SPARKONLEFTDH C668 CCC9C9 15088 JDD_END: JMP DD_END C66B CCC887 15089 JWDWELL6OP: JMP WDWELL6OP C66E CCC7AD 15090 JWDWELL5OP: JMP WDWELL5OP C671 CCC70E 15091 JWDWELL4OP: JMP WDWELL4OP C674 CCC6E1 15092 JWDWELL2OP: JMP WDWELL2OP 15093 WASTEDWELL: C677 C6E074 15094 LDA FEATURE8_F C67A A510 15095 BIT #SPKFOPB C67C 26ED 15096 BNE JWDWELL6OP C67E A508 15097 BIT #SPKEOPB C680 26EC 15098 BNE JWDWELL5OP C682 0866EC 15099 BRSET OUT3SPARKD,FEATURE2,JWDWELL4OP C685 0564EC 15100 BRCLR REUSE_LED18,OUTPUTPINS,JWDWELL2OP C688 0764E9 15101 BRCLR REUSE_LED18_2,OUTPUTPINS,JWDWELL2OP 15102 WDWELL3OP: C68B 55E8 15103 LDHX DWELLDELAY3 C68D 006A06 15104 BRSET COILABIT,COILSEL,WD3A360 C690 026A07 15105 BRSET COILBBIT,COILSEL,WD3B360 C693 046A08 15106 BRSET COILCBIT,COILSEL,WD3C360 C696 35B1 15107 WD3A360: STHX SPARKONLEFTAH C698 2006 15108 BRA WD3END360 C69A 35B3 15109 WD3B360: STHX SPARKONLEFTBH C69C 2002 15110 BRA WD3END360 C69E 35B5 15111 WD3C360: STHX SPARKONLEFTCH 15112 WD3END360: C6A0 B6E4 15113 LDA DWELLDELAY1 C6A2 2606 15114 BNE WD3OK120 C6A4 B6E5 15115 LDA DWELLDELAY1+1 C6A6 A102 15116 CMP #2 C6A8 2515 15117 BLO WD3SKIP120 15118 WD3OK120: C6AA 55E4 15119 LDHX DWELLDELAY1 C6AC 006A06 15120 BRSET COILABIT,COILSEL,WD3A120 C6AF 026A07 15121 BRSET COILBBIT,COILSEL,WD3B120 C6B2 046A08 15122 BRSET COILCBIT,COILSEL,WD3C120 C6B5 35B3 15123 WD3A120: STHX SPARKONLEFTBH C6B7 2006 15124 BRA WD3END120 C6B9 35B5 15125 WD3B120: STHX SPARKONLEFTCH C6BB 2002 15126 BRA WD3END120 C6BD 35B1 15127 WD3C120: STHX SPARKONLEFTAH 15128 WD3END120: 15129 WD3SKIP120: C6BF B6E6 15130 LDA DWELLDELAY2 C6C1 2606 15131 BNE WD3OK240 C6C3 B6E7 15132 LDA DWELLDELAY2+1 C6C5 A102 15133 CMP #2 C6C7 2515 15134 BLO WD3END240 15135 WD3OK240: C6C9 55E6 15136 LDHX DWELLDELAY2 C6CB 006A06 15137 BRSET COILABIT,COILSEL,WD3A240 C6CE 026A07 15138 BRSET COILBBIT,COILSEL,WD3B240 C6D1 046A08 15139 BRSET COILCBIT,COILSEL,WD3C240 C6D4 35B5 15140 WD3A240: STHX SPARKONLEFTCH C6D6 2006 15141 BRA WD3END240 C6D8 35B1 15142 WD3B240: STHX SPARKONLEFTAH C6DA 2002 15143 BRA WD3END240 C6DC 35B3 15144 WD3C240: STHX SPARKONLEFTBH C6DE CCC9C9 15145 WD3END240: JMP DD_END 15146 WDWELL2OP: C6E1 55E6 15147 LDHX DWELLDELAY2 C6E3 026A04 15148 BRSET COILBBIT,COILSEL,WD2B360 C6E6 35B1 15149 WD2A360: STHX SPARKONLEFTAH C6E8 2002 15150 BRA WD2END360 C6EA 35B3 15151 WD2B360: STHX SPARKONLEFTBH 15152 WD2END360: C6EC C6E3AD 15153 LDA SPARKCONFIG1_F C6EF A510 15154 BIT #M_SC1ODDFIRE C6F1 2618 15155 BNE WD2SKIP C6F3 B6E4 15156 LDA DWELLDELAY1 C6F5 2606 15157 BNE WD2OK C6F7 B6E5 15158 LDA DWELLDELAY1+1 C6F9 A102 15159 CMP #2 C6FB 250E 15160 BLO WD2SKIP 15161 WD2OK: C6FD 55E4 15162 LDHX DWELLDELAY1 C6FF 006A03 15163 BRSET COILABIT,COILSEL,WD2A180 C702 026A04 15164 BRSET COILBBIT,COILSEL,WD2B180 C705 35B3 15165 WD2A180: STHX SPARKONLEFTBH C707 2002 15166 BRA WD2END180 C709 35B1 15167 WD2B180: STHX SPARKONLEFTAH 15168 WD2END180: C70B CCC9C9 15169 WD2SKIP: JMP DD_END 15170 WDWELL4OP: C70E 55EA 15171 LDHX DWELLDELAY4 C710 006A09 15172 BRSET COILABIT,COILSEL,WD4A360 C713 026A0A 15173 BRSET COILBBIT,COILSEL,WD4B360 C716 046A0B 15174 BRSET COILCBIT,COILSEL,WD4C360 C719 066A0C 15175 BRSET COILDBIT,COILSEL,WD4D360 C71C 35B1 15176 WD4A360: STHX SPARKONLEFTAH C71E 200A 15177 BRA WD4END360 C720 35B3 15178 WD4B360: STHX SPARKONLEFTBH C722 2006 15179 BRA WD4END360 C724 35B5 15180 WD4C360: STHX SPARKONLEFTCH C726 2002 15181 BRA WD4END360 C728 35B7 15182 WD4D360: STHX SPARKONLEFTDH 15183 WD4END360: C72A C6E3AD 15184 LDA SPARKCONFIG1_F C72D A510 15185 BIT #M_SC1ODDFIRE C72F 2626 15186 BNE WD4SKIP90 C731 B6E4 15187 LDA DWELLDELAY1 C733 2606 15188 BNE WD4OK90 C735 B6E5 15189 LDA DWELLDELAY1+1 C737 A102 15190 CMP #2 C739 251C 15191 BLO WD4SKIP90 15192 WD4OK90: C73B 55E4 15193 LDHX DWELLDELAY1 C73D 006A09 15194 BRSET COILABIT,COILSEL,WD4A90 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 126 MC68HC908GP32 User Bootloader C740 026A0A 15195 BRSET COILBBIT,COILSEL,WD4B90 C743 046A0B 15196 BRSET COILCBIT,COILSEL,WD4C90 C746 066A0C 15197 BRSET COILDBIT,COILSEL,WD4D90 C749 35B3 15198 WD4A90: STHX SPARKONLEFTBH C74B 200A 15199 BRA WD4END90 C74D 35B5 15200 WD4B90: STHX SPARKONLEFTCH C74F 2006 15201 BRA WD4END90 C751 35B7 15202 WD4C90: STHX SPARKONLEFTDH C753 2002 15203 BRA WD4END90 C755 35B1 15204 WD4D90: STHX SPARKONLEFTAH 15205 WD4END90: 15206 WD4SKIP90: C757 B6E6 15207 LDA DWELLDELAY2 C759 2606 15208 BNE WD4OK180 C75B B6E7 15209 LDA DWELLDELAY2+1 C75D A102 15210 CMP #2 C75F 251C 15211 BLO WD4SKIP180 15212 WD4OK180: C761 55E6 15213 LDHX DWELLDELAY2 C763 006A09 15214 BRSET COILABIT,COILSEL,WD4A180 C766 026A0A 15215 BRSET COILBBIT,COILSEL,WD4B180 C769 046A0B 15216 BRSET COILCBIT,COILSEL,WD4C180 C76C 066A0C 15217 BRSET COILDBIT,COILSEL,WD4D180 C76F 35B5 15218 WD4A180: STHX SPARKONLEFTCH C771 200A 15219 BRA WD4END180 C773 35B7 15220 WD4B180: STHX SPARKONLEFTDH C775 2006 15221 BRA WD4END180 C777 35B1 15222 WD4C180: STHX SPARKONLEFTAH C779 2002 15223 BRA WD4END180 C77B 35B3 15224 WD4D180: STHX SPARKONLEFTBH 15225 WD4END180: 15226 WD4SKIP180: C77D C6E3AD 15227 LDA SPARKCONFIG1_F C780 A510 15228 BIT #M_SC1ODDFIRE C782 2626 15229 BNE WD4END270 C784 B6E8 15230 LDA DWELLDELAY3 C786 2606 15231 BNE WD4OK270 C788 B6E9 15232 LDA DWELLDELAY3+1 C78A A102 15233 CMP #2 C78C 251C 15234 BLO WD4END270 15235 WD4OK270: C78E 55E8 15236 LDHX DWELLDELAY3 C790 006A09 15237 BRSET COILABIT,COILSEL,WD4A270 C793 026A0A 15238 BRSET COILBBIT,COILSEL,WD4B270 C796 046A0B 15239 BRSET COILCBIT,COILSEL,WD4C270 C799 066A0C 15240 BRSET COILDBIT,COILSEL,WD4D270 C79C 35B7 15241 WD4A270: STHX SPARKONLEFTDH C79E 200A 15242 BRA WD4END270 C7A0 35B1 15243 WD4B270: STHX SPARKONLEFTAH C7A2 2006 15244 BRA WD4END270 C7A4 35B3 15245 WD4C270: STHX SPARKONLEFTBH C7A6 2002 15246 BRA WD4END270 C7A8 35B5 15247 WD4D270: STHX SPARKONLEFTCH 15248 WD4END270: C7AA CCC9C9 15249 JMP DD_END 15250 WDWELL5OP: C7AD 55EC 15251 LDHX DWELLDELAY5 C7AF 006A0C 15252 BRSET COILABIT,COILSEL,WD5A360 C7B2 026A0D 15253 BRSET COILBBIT,COILSEL,WD5B360 C7B5 046A0E 15254 BRSET COILCBIT,COILSEL,WD5C360 C7B8 066A0F 15255 BRSET COILDBIT,COILSEL,WD5D360 C7BB 086A10 15256 BRSET COILEBIT,COILSEL,WD5E360 C7BE 35B1 15257 WD5A360: STHX SPARKONLEFTAH C7C0 200E 15258 BRA WD5END360 C7C2 35B3 15259 WD5B360: STHX SPARKONLEFTBH C7C4 200A 15260 BRA WD5END360 C7C6 35B5 15261 WD5C360: STHX SPARKONLEFTCH C7C8 2006 15262 BRA WD5END360 C7CA 35B7 15263 WD5D360: STHX SPARKONLEFTDH C7CC 2002 15264 BRA WD5END360 C7CE 35B9 15265 WD5E360: STHX SPARKONLEFTEH 15266 WD5END360: C7D0 B6E4 15267 LDA DWELLDELAY1 C7D2 2606 15268 BNE WD5OK72 C7D4 B6E5 15269 LDA DWELLDELAY1+1 C7D6 A102 15270 CMP #2 C7D8 2523 15271 BLO WD5SKIP72 15272 WD5OK72: C7DA 55E4 15273 LDHX DWELLDELAY1 C7DC 006A0C 15274 BRSET COILABIT,COILSEL,WD5A72 C7DF 026A0D 15275 BRSET COILBBIT,COILSEL,WD5B72 C7E2 046A0E 15276 BRSET COILCBIT,COILSEL,WD5C72 C7E5 066A0F 15277 BRSET COILDBIT,COILSEL,WD5D72 C7E8 086A10 15278 BRSET COILEBIT,COILSEL,WD5E72 C7EB 35B3 15279 WD5A72: STHX SPARKONLEFTBH C7ED 200E 15280 BRA WD5END72 C7EF 35B5 15281 WD5B72: STHX SPARKONLEFTCH C7F1 200A 15282 BRA WD5END72 C7F3 35B7 15283 WD5C72: STHX SPARKONLEFTDH C7F5 2006 15284 BRA WD5END72 C7F7 35B9 15285 WD5D72: STHX SPARKONLEFTEH C7F9 2002 15286 BRA WD5END72 C7FB 35B1 15287 WD5E72: STHX SPARKONLEFTAH 15288 WD5END72: 15289 WD5SKIP72: C7FD B6E6 15290 LDA DWELLDELAY2 C7FF 2606 15291 BNE WD5OK144 C801 B6E7 15292 LDA DWELLDELAY2+1 C803 A102 15293 CMP #2 C805 2523 15294 BLO WD5SKIP144 15295 WD5OK144: C807 55E6 15296 LDHX DWELLDELAY2 C809 006A0C 15297 BRSET COILABIT,COILSEL,WD5A144 C80C 026A0D 15298 BRSET COILBBIT,COILSEL,WD5B144 C80F 046A0E 15299 BRSET COILCBIT,COILSEL,WD5C144 C812 066A0F 15300 BRSET COILDBIT,COILSEL,WD5D144 C815 086A10 15301 BRSET COILEBIT,COILSEL,WD5E144 C818 35B5 15302 WD5A144: STHX SPARKONLEFTCH C81A 200E 15303 BRA WD5END144 C81C 35B7 15304 WD5B144: STHX SPARKONLEFTDH C81E 200A 15305 BRA WD5END144 C820 35B9 15306 WD5C144: STHX SPARKONLEFTEH C822 2006 15307 BRA WD5END144 C824 35B1 15308 WD5D144: STHX SPARKONLEFTAH C826 2002 15309 BRA WD5END144 C828 35B3 15310 WD5E144: STHX SPARKONLEFTBH 15311 WD5END144: 15312 WD5SKIP144: C82A B6E8 15313 LDA DWELLDELAY3 C82C 2606 15314 BNE WD5OK216 C82E B6E9 15315 LDA DWELLDELAY3+1 C830 A102 15316 CMP #2 C832 2523 15317 BLO WD5SKIP216 15318 WD5OK216: C834 55E8 15319 LDHX DWELLDELAY3 C836 006A0C 15320 BRSET COILABIT,COILSEL,WD5A216 C839 026A0D 15321 BRSET COILBBIT,COILSEL,WD5B216 C83C 046A0E 15322 BRSET COILCBIT,COILSEL,WD5C216 C83F 066A0F 15323 BRSET COILDBIT,COILSEL,WD5D216 C842 086A10 15324 BRSET COILEBIT,COILSEL,WD5E216 C845 35B7 15325 WD5A216: STHX SPARKONLEFTDH C847 200E 15326 BRA WD5END216 C849 35B9 15327 WD5B216: STHX SPARKONLEFTEH C84B 200A 15328 BRA WD5END216 C84D 35B1 15329 WD5C216: STHX SPARKONLEFTAH C84F 2006 15330 BRA WD5END216 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 127 MC68HC908GP32 User Bootloader C851 35B3 15331 WD5D216: STHX SPARKONLEFTBH C853 2002 15332 BRA WD5END216 C855 35B5 15333 WD5E216: STHX SPARKONLEFTCH 15334 WD5END216: 15335 WD5SKIP216: C857 B6EA 15336 LDA DWELLDELAY4 C859 2606 15337 BNE WD5OK288 C85B B6EB 15338 LDA DWELLDELAY4+1 C85D A102 15339 CMP #2 C85F 2523 15340 BLO WD5SKIP288 15341 WD5OK288: C861 55EA 15342 LDHX DWELLDELAY4 C863 006A0C 15343 BRSET COILABIT,COILSEL,WD5A288 C866 026A0D 15344 BRSET COILBBIT,COILSEL,WD5B288 C869 046A0E 15345 BRSET COILCBIT,COILSEL,WD5C288 C86C 066A0F 15346 BRSET COILDBIT,COILSEL,WD5D288 C86F 086A10 15347 BRSET COILEBIT,COILSEL,WD5E288 C872 35B9 15348 WD5A288: STHX SPARKONLEFTEH C874 200E 15349 BRA WD5END288 C876 35B1 15350 WD5B288: STHX SPARKONLEFTAH C878 200A 15351 BRA WD5END288 C87A 35B3 15352 WD5C288: STHX SPARKONLEFTBH C87C 2006 15353 BRA WD5END288 C87E 35B5 15354 WD5D288: STHX SPARKONLEFTCH C880 2002 15355 BRA WD5END288 C882 35B7 15356 WD5E288: STHX SPARKONLEFTDH 15357 WD5END288: 15358 WD5SKIP288: C884 CCC9C9 15359 JMP DD_END 15360 WDWELL6OP: C887 55EE 15361 LDHX DWELLDELAY6 C889 026A10 15362 BRSET COILBBIT,COILSEL,WD6B360 C88C 046A11 15363 BRSET COILCBIT,COILSEL,WD6C360 C88F 066A12 15364 BRSET COILDBIT,COILSEL,WD6D360 C892 086A13 15365 BRSET COILEBIT,COILSEL,WD6E360 C895 0A6A14 15366 BRSET COILFBIT,COILSEL,WD6F360 C898 35B1 15367 WD6A360: STHX SPARKONLEFTAH C89A 2012 15368 BRA WD6END360 C89C 35B3 15369 WD6B360: STHX SPARKONLEFTBH C89E 200E 15370 BRA WD6END360 C8A0 35B5 15371 WD6C360: STHX SPARKONLEFTCH C8A2 200A 15372 BRA WD6END360 C8A4 35B7 15373 WD6D360: STHX SPARKONLEFTDH C8A6 2006 15374 BRA WD6END360 C8A8 35B9 15375 WD6E360: STHX SPARKONLEFTEH C8AA 2002 15376 BRA WD6END360 C8AC 35BB 15377 WD6F360: STHX SPARKONLEFTFH 15378 WD6END360: C8AE C6E3AD 15379 LDA SPARKCONFIG1_F C8B1 A510 15380 BIT #M_SC1ODDFIRE C8B3 2634 15381 BNE WD6SKIP60 C8B5 B6E4 15382 LDA DWELLDELAY1 C8B7 2606 15383 BNE WD6OK60 C8B9 B6E5 15384 LDA DWELLDELAY1+1 C8BB A105 15385 CMP #5 C8BD 252A 15386 BLO WD6SKIP60 15387 WD6OK60: C8BF 55E4 15388 LDHX DWELLDELAY1 C8C1 006A0F 15389 BRSET COILABIT,COILSEL,WD6A60 C8C4 026A10 15390 BRSET COILBBIT,COILSEL,WD6B60 C8C7 046A11 15391 BRSET COILCBIT,COILSEL,WD6C60 C8CA 066A12 15392 BRSET COILDBIT,COILSEL,WD6D60 C8CD 086A13 15393 BRSET COILEBIT,COILSEL,WD6E60 C8D0 0A6A14 15394 BRSET COILFBIT,COILSEL,WD6F60 C8D3 35B3 15395 WD6A60: STHX SPARKONLEFTBH C8D5 2012 15396 BRA WD6END60 C8D7 35B5 15397 WD6B60: STHX SPARKONLEFTCH C8D9 200E 15398 BRA WD6END60 C8DB 35B7 15399 WD6C60: STHX SPARKONLEFTDH C8DD 200A 15400 BRA WD6END60 C8DF 35B9 15401 WD6D60: STHX SPARKONLEFTEH C8E1 2006 15402 BRA WD6END60 C8E3 35BB 15403 WD6E60: STHX SPARKONLEFTFH C8E5 2002 15404 BRA WD6END60 C8E7 35B1 15405 WD6F60: STHX SPARKONLEFTAH 15406 WD6END60: 15407 WD6SKIP60: C8E9 B6E6 15408 LDA DWELLDELAY2 C8EB 2606 15409 BNE WD6OK120 C8ED B6E7 15410 LDA DWELLDELAY2+1 C8EF A105 15411 CMP #5 C8F1 252A 15412 BLO WD6SKIP120 15413 WD6OK120: C8F3 55E6 15414 LDHX DWELLDELAY2 C8F5 006A0F 15415 BRSET COILABIT,COILSEL,WD6A120 C8F8 026A10 15416 BRSET COILBBIT,COILSEL,WD6B120 C8FB 046A11 15417 BRSET COILCBIT,COILSEL,WD6C120 C8FE 066A12 15418 BRSET COILDBIT,COILSEL,WD6D120 C901 086A13 15419 BRSET COILEBIT,COILSEL,WD6E120 C904 0A6A14 15420 BRSET COILFBIT,COILSEL,WD6F120 C907 35B5 15421 WD6A120: STHX SPARKONLEFTCH C909 2012 15422 BRA WD6END120 C90B 35B7 15423 WD6B120: STHX SPARKONLEFTDH C90D 200E 15424 BRA WD6END120 C90F 35B9 15425 WD6C120: STHX SPARKONLEFTEH C911 200A 15426 BRA WD6END120 C913 35BB 15427 WD6D120: STHX SPARKONLEFTFH C915 2006 15428 BRA WD6END120 C917 35B1 15429 WD6E120: STHX SPARKONLEFTAH C919 2002 15430 BRA WD6END120 C91B 35B3 15431 WD6F120: STHX SPARKONLEFTBH 15432 WD6END120: 15433 WD6SKIP120: C91D C6E3AD 15434 LDA SPARKCONFIG1_F C920 A510 15435 BIT #M_SC1ODDFIRE C922 2636 15436 BNE WD6SKIP180 C924 B6E8 15437 LDA DWELLDELAY3 C926 2606 15438 BNE WD6OK180 C928 B6E9 15439 LDA DWELLDELAY3+1 C92A A105 15440 CMP #5 C92C 252C 15441 BLO WD6SKIP180 15442 WD6OK180: C92E 55E8 15443 LDHX DWELLDELAY3 C930 006A0F 15444 BRSET COILABIT,COILSEL,WD6A180 C933 026A10 15445 BRSET COILBBIT,COILSEL,WD6B180 C936 046A11 15446 BRSET COILCBIT,COILSEL,WD6C180 C939 066A12 15447 BRSET COILDBIT,COILSEL,WD6D180 C93C 086A13 15448 BRSET COILEBIT,COILSEL,WD6E180 C93F 0A6A14 15449 BRSET COILFBIT,COILSEL,WD6F180 C942 35B7 15450 WD6A180: STHX SPARKONLEFTDH C944 2012 15451 BRA WD6END180 C946 35B9 15452 WD6B180: STHX SPARKONLEFTEH C948 200E 15453 BRA WD6END180 C94A 35BB 15454 WD6C180: STHX SPARKONLEFTFH C94C 200A 15455 BRA WD6END180 C94E 35B1 15456 WD6D180: STHX SPARKONLEFTAH C950 2006 15457 BRA WD6END180 C952 35B3 15458 WD6E180: STHX SPARKONLEFTBH C954 2002 15459 BRA WD6END180 C956 35B5 15460 WD6F180: STHX SPARKONLEFTCH 15461 WD6END180: C958 206F 15462 BRA DD_END 15463 WD6SKIP180: C95A B6EA 15464 LDA DWELLDELAY4 C95C 2606 15465 BNE WD6OK240 C95E B6EB 15466 LDA DWELLDELAY4+1 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 128 MC68HC908GP32 User Bootloader C960 A105 15467 CMP #5 C962 252A 15468 BLO WD6SKIP240 15469 WD6OK240: C964 55EA 15470 LDHX DWELLDELAY4 C966 006A0F 15471 BRSET COILABIT,COILSEL,WD6A240 C969 026A10 15472 BRSET COILBBIT,COILSEL,WD6B240 C96C 046A11 15473 BRSET COILCBIT,COILSEL,WD6C240 C96F 066A12 15474 BRSET COILDBIT,COILSEL,WD6D240 C972 086A13 15475 BRSET COILEBIT,COILSEL,WD6E240 C975 0A6A14 15476 BRSET COILFBIT,COILSEL,WD6F240 C978 35B9 15477 WD6A240: STHX SPARKONLEFTEH C97A 2012 15478 BRA WD6END240 C97C 35BB 15479 WD6B240: STHX SPARKONLEFTFH C97E 200E 15480 BRA WD6END240 C980 35B1 15481 WD6C240: STHX SPARKONLEFTAH C982 200A 15482 BRA WD6END240 C984 35B3 15483 WD6D240: STHX SPARKONLEFTBH C986 2006 15484 BRA WD6END240 C988 35B5 15485 WD6E240: STHX SPARKONLEFTCH C98A 2002 15486 BRA WD6END240 C98C 35B7 15487 WD6F240: STHX SPARKONLEFTDH 15488 WD6END240: 15489 WD6SKIP240: C98E C6E3AD 15490 LDA SPARKCONFIG1_F C991 A510 15491 BIT #M_SC1ODDFIRE C993 2634 15492 BNE WD6SKIP300 C995 B6EC 15493 LDA DWELLDELAY5 C997 2606 15494 BNE WD6OK300 C999 B6ED 15495 LDA DWELLDELAY5+1 C99B A105 15496 CMP #5 C99D 252A 15497 BLO WD6SKIP300 15498 WD6OK300: C99F 55EC 15499 LDHX DWELLDELAY5 C9A1 006A0F 15500 BRSET COILABIT,COILSEL,WD6A300 C9A4 026A10 15501 BRSET COILBBIT,COILSEL,WD6B300 C9A7 046A11 15502 BRSET COILCBIT,COILSEL,WD6C300 C9AA 066A12 15503 BRSET COILDBIT,COILSEL,WD6D300 C9AD 086A13 15504 BRSET COILEBIT,COILSEL,WD6E300 C9B0 0A6A14 15505 BRSET COILFBIT,COILSEL,WD6F300 C9B3 35B9 15506 WD6A300: STHX SPARKONLEFTEH C9B5 2012 15507 BRA WD6END300 C9B7 35BB 15508 WD6B300: STHX SPARKONLEFTFH C9B9 200E 15509 BRA WD6END300 C9BB 35B1 15510 WD6C300: STHX SPARKONLEFTAH C9BD 200A 15511 BRA WD6END300 C9BF 35B3 15512 WD6D300: STHX SPARKONLEFTBH C9C1 2006 15513 BRA WD6END300 C9C3 35B5 15514 WD6E300: STHX SPARKONLEFTCH C9C5 2002 15515 BRA WD6END300 C9C7 35B7 15516 WD6F300: STHX SPARKONLEFTDH 15517 WD6END300: 15518 WD6SKIP300: 15519 DD_END: 15520 miss_chk_done: C9C9 034203 15521 brclr crank,engine,miss_chk_skip ; if not cranking then continue as normal C9CC CCCE46 15522 jmp SKIP_CYCLE_CALC 15523 ***************************************************************************** 15524 15525 miss_chk_skip: C9CF 1061 15526 bset SparkTrigg,Sparkbits ; IRQ triggered, but no spark yet 15527 C9D1 3CCF 15528 inc idleCtlClock ; Idle PWM Clock counter C9D3 C6010F 15529 lda idleDelayClock ; Idle PWM delay counter C9D6 2704 15530 beq delay_done C9D8 4A 15531 deca ; idle seconds clock C9D9 C7010F 15532 sta idleDelayClock 15533 delay_done: C9DC 07680A 15534 brclr REStaging,EnhancedBits,cont_inc_counters C9DF 0A6D07 15535 brset StgTransDone,EnhancedBits6,cont_inc_counters 15536 ; if we're here, we're supposed to be incrementing the staging counter C9E2 C6010D 15537 lda stgTransitionCnt C9E5 4C 15538 inca C9E6 C7010D 15539 sta stgTransitionCnt 15540 15541 15542 cont_inc_counters: C9E9 B682 15543 lda igncount1 C9EB 261D 15544 bne EGOBUMP ; Only increment counters if 15545 ; cylinder count is zero C9ED C6E5B3 15546 lda feature10_f5 C9F0 A501 15547 bit #ASEIgnCountb C9F2 2602 15548 bne TPS_COUNTER C9F4 3C81 15549 inc asecount ; Increment after-start enrichment 15550 ; counter 15551 15552 TPS_COUNTER: C9F6 076511 15553 brclr taeIgnCount,feature1,EGOBUMP ; Are we in Cycle counter 15554 ; mode for TPS Accel? C9F9 3C7F 15555 inc tpsaclk ; Yes so increment counter 15556 15557 ; Save current TPS reading in last_tps variable to compute TPSDOT in 15558 ; acceleration enrichment section or KPa in KPa last if in MAP dot 15559 C9FB C6E042 15560 lda feature4_f C9FE A580 15561 bit #KpaDotSetb CA00 2704 15562 beq tps_dot_on 15563 ; brclr KpaDotSet,feature4,tps_dot_on ; If not in KPA dot mode 15564 ; jump past KPa settings CA02 B6C9 15565 lda kpa CA04 2002 15566 bra Kpa_Dot_on 15567 tps_dot_on: CA06 B647 15568 lda tps 15569 Kpa_Dot_on: CA08 B7CE 15570 sta TPSlast 15571 15572 EGOBUMP: CA0A B64D 15573 lda rpm 15574 ; sta old_rpm1 ; Used in odd-fire code - save the last computed RPM for average 15575 15576 ; brclr egoIgnCount,feature1,No_Ego_Cnt CA0C C6E1BC 15577 lda feature14_f1 CA0F A501 15578 bit #egoIgnCountb CA11 2702 15579 beq No_Ego_Cnt CA13 3C80 15580 inc egocount ; Increment EGO step counter 15581 No_Ego_Cnt: CA15 004203 15582 brset running,engine,CYCLE_CALC ; should always be running 15583 ; if we get here CA18 CCCE46 15584 jmp SKIP_CYCLE_CALC 15585 CYCLE_CALC: 15586 15587 ; revised section new in 015d 15588 ; hi-res timer is only 16bit and runs at 1MHz. 1 tick = 1us 15589 ; so timer rollover occurs at about 65.5ms. Hence if period > 65.5ms 15590 ; we have to use the lo-res spark calculation i.e. use the 0.1ms 15591 ; routine instead of the hi-res output compare method in "SPARKTIME" 15592 ; 70ms equates to rpmh = $2, rpml = $BC. Choose set point as $200 as 15593 ; simpler. 65ms is $28F 15594 ; 15595 15596 ;022b 0 T2 is now 24 bit with the extra software byte but may slow this routine 15597 ;excessively if we do 24bit maths here in an interrupt handler. 15598 ;Stick with Magnus' 0.1ms method for now as it works. 15599 CA1B 096303 15600 brclr EDIS,personality,non_edis CA1E CCCAA8 15601 jmp edis_speed 15602 non_edis: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 129 MC68HC908GP32 User Bootloader 15603 ;are we doing oddfire wheel ? CA21 C6E3AD 15604 lda SparkConfig1_f CA24 A510 15605 bit #M_SC1oddfire CA26 2768 15606 beq CCnot_odd CA28 006A11 15607 brset coilabit,coilsel,CCofa CA2B 026A1C 15608 brset coilbbit,coilsel,CCofb CA2E 046A27 15609 brset coilcbit,coilsel,CCofc CA31 066A32 15610 brset coildbit,coilsel,CCofd CA34 066A3D 15611 brset coildbit,coilsel,CCofe CA37 066A48 15612 brset coildbit,coilsel,CCoff CA3A 2054 15613 bra CCnot_odd 15614 CCofa: CA3C C6E6A6 15615 lda outaoffs_f CA3F C7020B 15616 sta offsetstep CA42 C6E6A7 15617 lda outaoffv_f CA45 C7020C 15618 sta offsetang CA48 204E 15619 bra CC_cont 15620 15621 CCofb: CA4A C6E6A8 15622 lda outboffs_f CA4D C7020B 15623 sta offsetstep CA50 C6E6A9 15624 lda outboffv_f CA53 C7020C 15625 sta offsetang CA56 2040 15626 bra CC_cont 15627 15628 CCofc: CA58 C6E6AA 15629 lda outcoffs_f CA5B C7020B 15630 sta offsetstep CA5E C6E6AB 15631 lda outcoffv_f CA61 C7020C 15632 sta offsetang CA64 2032 15633 bra CC_cont 15634 15635 CCofd: CA66 C6E6AC 15636 lda outdoffs_f CA69 C7020B 15637 sta offsetstep CA6C C6E6AD 15638 lda outdoffv_f CA6F C7020C 15639 sta offsetang CA72 2024 15640 bra CC_cont 15641 15642 CCofe: CA74 C6E6AE 15643 lda outeoffs_f CA77 C7020B 15644 sta offsetstep CA7A C6E6AF 15645 lda outeoffv_f CA7D C7020C 15646 sta offsetang CA80 2016 15647 bra CC_cont 15648 15649 CCoff: CA82 C6E6B0 15650 lda outfoffs_f CA85 C7020B 15651 sta offsetstep CA88 C6E6B1 15652 lda outfoffv_f CA8B C7020C 15653 sta offsetang CA8E 2008 15654 bra CC_cont 15655 15656 CCnot_odd: CA90 A600 15657 lda #0 CA92 C7020C 15658 sta offsetang CA95 C7020B 15659 sta offsetstep 15660 CC_cont: CA98 B670 15661 lda rpmch CA9A A101 15662 cmp #$1 CA9C 222B 15663 bhi LOW_SPEED ; rpmc > $200 slow CA9E 2558 15664 blo HIGH_SPEED ; < $100 fast CAA0 B671 15665 lda rpmcl CAA2 A180 15666 cmp #$80 CAA4 2552 15667 blo HIGH_SPEED ; < $180 fast CAA6 2048 15668 bra ASIS_SPEED ; in between leave as it was 15669 15670 edis_speed: CAA8 3F6A 15671 clr coilsel CAAA 106A 15672 bset coilabit,coilsel 15673 ;If trigg angle zero used fixed delay CAAC C6E3A8 15674 lda TriggAngle_f CAAF C70103 15675 sta DelayAngle CAB2 2644 15676 bne VARIABLE_DELAY CAB4 A640 15677 lda #$40 ; 10us delay. Try 64us CAB6 B7B0 15678 sta SparkDelayL CAB8 A600 15679 lda #$00 CABA B7AF 15680 sta SparkDelayH CABC 1261 15681 bset SparkHSpeed,SparkBits ; Turn on high speed ignition CABE 1561 15682 bclr SparkLSpeed,SparkBits ; Turn off low speed ignition CAC0 4EAEBE 15683 mov iTimeL,cTimeL ; Prepare to calculate with CAC3 4EADBD 15684 mov iTimeH,cTimeH ; highres time CAC6 CCCD56 15685 jmp set_spk_timer 15686 15687 LOW_SPEED: CAC9 1361 15688 bclr SparkHSpeed,SparkBits ; Turn off high speed ignition CACB 1461 15689 bset SparkLSpeed,SparkBits ; Turn on low speed ignition CACD 0D631E 15690 brclr TFI,personality,LOW_cont 15691 ;TFI mode - set the output now (follow IRQ at low speed) CAD0 1662 15692 bset sparkon,revlimbits ; spark now on CAD2 1161 15693 bclr sparktrigg,sparkbits ; don't want another one 15694 CAD4 0C6B0B 15695 brset invspk,EnhancedBits4,InvLSparkOn2 15696 ;; Don't support coils b,c,d in TFI 15697 15698 NInvLSparkOn2: CAD7 006404 15699 brset REUSE_FIDLE,outputpins,dslsf2 CADA 1002 15700 bset coila,portc ; Set spark on CADC 200D 15701 bra tfi_cont 15702 dslsf2: CADE 1200 15703 bset iasc,porta CAE0 2009 15704 bra tfi_cont 15705 InvLSparkOn2: CAE2 006404 15706 brset REUSE_FIDLE,outputpins,ilsof2 CAE5 1102 15707 bclr coila,portc ; Set inverted spark on CAE7 2002 15708 bra tfi_cont 15709 ilsof2: CAE9 1300 15710 bclr iasc,porta 15711 tfi_cont: CAEB CCCE46 15712 jmp SKIP_CYCLE_CALC 15713 15714 LOW_cont: 15715 CAEE 200C 15716 bra DELAY_CALC 15717 15718 ASIS_SPEED: 15719 ;need to check for low speed+TFI or we'll miss the output CAF0 0D6309 15720 brclr TFI,personality,DELAY_CALC CAF3 056106 15721 brclr SparkLSpeed,SparkBits,DELAY_CALC CAF6 20D1 15722 bra LOW_SPEED 15723 15724 VARIABLE_DELAY: 15725 15726 HIGH_SPEED: 15727 ; brclr TFI,personality,HIGH_cont 15728 ; lda rpm 15729 ; cmp #6 ; if < 600rpm and TFI then low speed 15730 ; blo LOW_SPEED 15731 HIGH_cont: 15732 ;hei7 bypass now in main loop CAF8 1261 15733 bset SparkHSpeed,SparkBits ; Turn on high speed ignition CAFA 1561 15734 bclr SparkLSpeed,SparkBits ; Turn off low speed ignition 15735 15736 DELAY_CALC: CAFC C6E1B6 15737 lda config11_f1 ; Get engine config CAFF 62 15738 nsa msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 130 MC68HC908GP32 User Bootloader CB00 A40F 15739 and #$0f ; Mask out cylinders (was $07) CB02 4C 15740 inca ; Prepare loop counter CB03 97 15741 tax ; stick in into X for safe keeping 15742 15743 ; accel/decel correction.. 15744 ; If engine is accelerating or decelerating predict our expected next 15745 ; cycle time for more accurate spark control. Tom Hafner reported a big 15746 ; improvement with a similar method in his MegaSpark. 15747 ; Calc is as follows: predicted ctime = ctime + (ctime - ctime prev) = 15748 ; 2x ctime - ctimep 15749 CB04 046120 15750 brset SparkLSpeed,SparkBits,dc_low CB07 4EAEBE 15751 mov iTimeL,cTimeL ; Prepare to calculate with 15752 ; highres time CB0A 4EADBD 15753 mov iTimeH,cTimeH 15754 15755 ;do high speed accel/decel correction CB0D B6FA 15756 lda iTimepH CB0F 2604 15757 bne hispdcorr CB11 B6FB 15758 lda iTimepL CB13 2730 15759 beq ReCalcDelay ; if previous is zero then skip routine 15760 hispdcorr: 15761 ; clr SparkCarry CB15 38BE 15762 lsl cTimeL CB17 39BD 15763 rol cTimeH 15764 ; rol SparkCarry ; redundant. If it overflows we'll 15765 ; only subtract it in a sec CB19 B6BE 15766 lda cTimeL CB1B B0FB 15767 sub iTimepL CB1D B7BE 15768 sta cTimeL CB1F B6BD 15769 lda cTimeH CB21 B2FA 15770 sbc iTimepH CB23 B7BD 15771 sta cTimeH 15772 CB25 201E 15773 bra ReCalcDelay 15774 dc_low: CB27 4E71BE 15775 mov rpmcl,cTimeL ; Prepare to calculate with lowres time CB2A 4E70BD 15776 mov rpmch,cTimeH 15777 ;do low speed accel/decel correction CB2D B66E 15778 lda rpmph CB2F 2604 15779 bne lospdcorr CB31 B66F 15780 lda rpmpl CB33 2710 15781 beq ReCalcDelay ; if previous is zero then skip routine 15782 lospdcorr: 15783 ; clr SparkCarry CB35 38BE 15784 lsl cTimeL CB37 39BD 15785 rol cTimeH 15786 ; rol SparkCarry ; redundant. If it overflows we'll 15787 ; only subtract it in a sec CB39 B6BE 15788 lda cTimeL CB3B B06F 15789 sub rpmpl CB3D B7BE 15790 sta cTimeL CB3F B6BD 15791 lda cTimeH CB41 B26E 15792 sbc rpmph CB43 B7BD 15793 sta cTimeH 15794 15795 ReCalcDelay: CB45 4EBEC0 15796 mov cTimeL,SparkTempL CB48 4EBDBF 15797 mov cTimeH,SparkTempH CB4B 3FC1 15798 clr SparkCarry 15799 ;take a copy - used later by next-cyl calcs CB4D B6BE 15800 lda cTimeL CB4F C70201 15801 sta ctimeLcp CB52 B6BD 15802 lda cTimeH CB54 C70200 15803 sta ctimeHcp 15804 CB57 9F 15805 txa CB58 A104 15806 cmp #4 CB5A 221F 15807 bhi more4cyl ; more than 4cyl CB5C 410352 15808 cbeqa #3T,cyl3 ; 3cyl does 2/4 stroke internally 15809 CB5F 97 15810 tax ;1,2,4 are so simple do them here CB60 C6E1B6 15811 lda config11_f1 CB63 A504 15812 bit #M_TwoStroke CB65 270A 15813 beq lt4_4s ; eq 0 so branch 4 stroke 15814 ; 2 stroke for 1,2,4 CB67 9F 15815 txa CB68 41013D 15816 cbeqa #1T,jsmd4 CB6B 41023D 15817 cbeqa #2T,jsmd2 CB6E 41043D 15818 cbeqa #4T,jsmt 15819 ; 4 stroke for 1,2,4 15820 lt4_4s: CB71 9F 15821 txa CB72 410130 15822 cbeqa #1T,jsmd8 CB75 410230 15823 cbeqa #2T,jsmd4 CB78 410430 15824 cbeqa #4T,jsmd2 15825 15826 more4cyl: CB7B 97 15827 tax CB7C C6E1B6 15828 lda config11_f1 CB7F A504 15829 bit #M_TwoStroke CB81 2613 15830 bne cyl_invalid ; don't support 2 stroke >4 cyl CB83 9F 15831 txa CB84 410549 15832 cbeqa #5T,cyl5 ; quick calc routines for speed CB87 410664 15833 cbeqa #6T,cyl6 CB8A 41080C 15834 cbeqa #8T,cyl8a CB8D 410A0C 15835 cbeqa #10T,cyl10a CB90 410C0C 15836 cbeqa #12T,cyl12a CB93 41100C 15837 cbeqa #16T,cyl16a 15838 cyl_invalid: CB96 CCCE46 15839 jmp SKIP_CYCLE_CALC ; if 7,9,11,13,14,15 don't do timing 15840 CB99 CCCC0E 15841 cyl8a: jmp cyl8 CB9C CCCC16 15842 cyl10a: jmp cyl10 CB9F CCCC3C 15843 cyl12a: jmp cyl12 CBA2 CCCC5C 15844 cyl16a: jmp cyl16 15845 15846 ;********** 15847 ;some jumps CBA5 CCCC68 15848 jsmd8: jmp spk_mult_div8 CBA8 CCCC6E 15849 jsmd4: jmp spk_mult_div4 CBAB CCCC74 15850 jsmd2: jmp spk_mult_div2 CBAE CCCC7A 15851 jsmt: jmp spk_mult 15852 15853 ;** special faster routines to calculate the delay. ** 15854 ;********** 15855 cyl3: ; *3 / 8 CBB1 38C0 15856 lsl sparkTempL ; *2 CBB3 39BF 15857 rol sparkTempH CBB5 39C1 15858 rol SparkCarry 15859 CBB7 B6C0 15860 lda SparkTempL ; +1 more CBB9 BBBE 15861 add cTimeL CBBB B7C0 15862 sta SparkTempL CBBD B6BF 15863 lda SparkTempH CBBF B9BD 15864 adc cTimeH CBC1 B7BF 15865 sta SparkTempH CBC3 2402 15866 bcc cyl3nc CBC5 3CC1 15867 inc SparkCarry 15868 cyl3nc: CBC7 C6E1B6 15869 lda config11_f1 CBCA A504 15870 bit #M_TwoStroke CBCC 263A 15871 bne bsmd4 ; if 2 stroke div4. 4 stroke div8 CBCE 2036 15872 bra bsmd8 15873 15874 ;********** msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 131 MC68HC908GP32 User Bootloader 15875 cyl5: ; *5 /8 15876 CBD0 38C0 15877 lsl SparkTempL ; *2 CBD2 39BF 15878 rol SparkTempH CBD4 39C1 15879 rol SparkCarry 15880 CBD6 38C0 15881 lsl SparkTempL ; *2 CBD8 39BF 15882 rol SparkTempH CBDA 39C1 15883 rol SparkCarry 15884 CBDC B6C0 15885 lda SparkTempL ; +1 more CBDE BBBE 15886 add cTimeL CBE0 B7C0 15887 sta SparkTempL CBE2 B6BF 15888 lda SparkTempH CBE4 B9BD 15889 adc cTimeH CBE6 B7BF 15890 sta SparkTempH CBE8 247E 15891 bcc spk_mult_div8 CBEA 3CC1 15892 inc SparkCarry CBEC 207A 15893 bra spk_mult_div8 15894 15895 ;********** 15896 cyl6: ; *3 / 4 CBEE 38C0 15897 lsl sparkTempL ; *2 CBF0 39BF 15898 rol sparkTempH CBF2 39C1 15899 rol SparkCarry 15900 CBF4 B6C0 15901 lda SparkTempL ; +1 more CBF6 BBBE 15902 add cTimeL CBF8 B7C0 15903 sta SparkTempL CBFA B6BF 15904 lda SparkTempH CBFC B9BD 15905 adc cTimeH CBFE B7BF 15906 sta SparkTempH CC00 246C 15907 bcc spk_mult_div4 CC02 3CC1 15908 inc SparkCarry CC04 2068 15909 bra spk_mult_div4 15910 15911 ;********** 15912 ;some relative jumps CC06 2060 15913 bsmd8: bra spk_mult_div8 CC08 2064 15914 bsmd4: bra spk_mult_div4 CC0A 2068 15915 bsmd2: bra spk_mult_div2 CC0C 206C 15916 bsm: bra spk_mult 15917 ;********** 15918 cyl8: ; no change, period - 90 deg already CC0E 4EBEC0 15919 mov cTimeL,SparkTempL CC11 4EBDBF 15920 mov cTimeH,SparkTempH CC14 2064 15921 bra spk_mult 15922 15923 cyl10: ; *5 /4 CC16 4EBEC0 15924 mov cTimeL,SparkTempL CC19 4EBDBF 15925 mov cTimeH,SparkTempH CC1C 3FC1 15926 clr SparkCarry 15927 CC1E 38C0 15928 lsl SparkTempL ; *2 CC20 39BF 15929 rol SparkTempH CC22 39C1 15930 rol SparkCarry 15931 CC24 38C0 15932 lsl SparkTempL ; *2 CC26 39BF 15933 rol SparkTempH CC28 39C1 15934 rol SparkCarry 15935 CC2A B6C0 15936 lda SparkTempL ; +1 more CC2C BBBE 15937 add cTimeL CC2E B7C0 15938 sta SparkTempL CC30 B6BF 15939 lda SparkTempH CC32 B9BD 15940 adc cTimeH CC34 B7BF 15941 sta SparkTempH CC36 2436 15942 bcc spk_mult_div4 CC38 3CC1 15943 inc SparkCarry CC3A 2032 15944 bra spk_mult_div4 15945 15946 ;********** 15947 cyl12: CC3C 4EBEC0 15948 mov cTimeL,SparkTempL CC3F 4EBDBF 15949 mov cTimeH,SparkTempH CC42 3FC1 15950 clr SparkCarry 15951 CC44 38C0 15952 lsl sparkTempL ; *2 CC46 39BF 15953 rol sparkTempH CC48 39C1 15954 rol SparkCarry 15955 CC4A B6C0 15956 lda SparkTempL ; +1 more CC4C BBBE 15957 add cTimeL CC4E B7C0 15958 sta SparkTempL CC50 B6BF 15959 lda SparkTempH CC52 B9BD 15960 adc cTimeH CC54 B7BF 15961 sta SparkTempH CC56 241C 15962 bcc spk_mult_div2 CC58 3CC1 15963 inc SparkCarry CC5A 2018 15964 bra spk_mult_div2 15965 ;********** 15966 cyl16: ; x2 to get 90 deg period (we will lose a bit below 150 rpm) CC5C 4EBEC0 15967 mov cTimeL,SparkTempL CC5F 4EBDBF 15968 mov cTimeH,SparkTempH CC62 38C0 15969 lsl sparkTempL CC64 39BF 15970 rol sparkTempH CC66 2012 15971 bra spk_mult 15972 15973 ;********** 15974 spk_mult_div8: CC68 34C1 15975 lsr SparkCarry ; /2 CC6A 36BF 15976 ror SparkTempH CC6C 36C0 15977 ror SparkTempL 15978 15979 spk_mult_div4: CC6E 34C1 15980 lsr SparkCarry ; /2 CC70 36BF 15981 ror SparkTempH CC72 36C0 15982 ror SparkTempL 15983 15984 spk_mult_div2: CC74 34C1 15985 lsr SparkCarry ; /2 CC76 36BF 15986 ror SparkTempH CC78 36C0 15987 ror SparkTempL 15988 15989 spk_mult: 15990 ; Calculate time for delay angle 15991 ; Time for 90 deg * Angle (256=90 deg)/256 CC7A C60103 15992 lda DelayAngle CC7D CB020C 15993 add offsetang ; for oddfire, zero otherwise CC80 BEBF 15994 ldx SparkTempH CC82 42 15995 mul CC83 BFAF 15996 stx SparkDelayH CC85 B7C1 15997 sta SparkCarry CC87 C60103 15998 lda DelayAngle CC8A CB020C 15999 add offsetang ; for oddfire, zero otherwise CC8D BEC0 16000 ldx SparkTempL CC8F 42 16001 mul CC90 9F 16002 txa CC91 BBC1 16003 add SparkCarry CC93 B7B0 16004 sta SparkDelayL CC95 2402 16005 bcc NoSparkCarry CC97 3CAF 16006 inc SparkDelayH 16007 16008 NoSparkCarry: 16009 16010 ;check for oddfire offset msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 132 MC68HC908GP32 User Bootloader CC99 C6E3AD 16011 lda SparkConfig1_f CC9C A510 16012 bit #M_SC1oddfire CC9E 2732 16013 beq ck_xlong ; not oddfire, use normal method 16014 ;now add oddfire triggers CCA0 C6020B 16015 lda offsetstep CCA3 274C 16016 beq ck_nextcyl ; if no offset step then skip 16017 CCA5 A502 16018 bit #outoff_45b CCA7 2609 16019 bne of45 ; add 45 deg 16020 CCA9 C6020B 16021 lda offsetstep CCAC A504 16022 bit #outoff_90b CCAE 2635 16023 bne AddLongTrigg ; already contains 90 deg time, add it 16024 ;shouldn't get here CCB0 203F 16025 bra ck_nextcyl 16026 16027 of45: CCB2 34BF 16028 lsr SparkTempH CCB4 36C0 16029 ror SparkTempL 16030 ; als triggers 16031 ; ALS Anti Lag System, does it break long triggers? 16032 ; I really don't know, should be safe. This is 16 bit and 16033 ; microseconds, right? CCB6 C6E87F 16034 lda ALS_CONFIG CCB9 A501 16035 bit #%00000001 CCBB 2715 16036 beq ck_xlong CCBD A502 16037 bit #%00000010 CCBF 2711 16038 beq ck_xlong CCC1 0B690E 16039 brclr over_Run_Set,EnhancedBits2,ck_xlong ; changed to over_run_set instead of sharing 16040 16041 ; Add extra time for anti lag, 45 degrees should be plenty for this. CCC4 B6B0 16042 lda SparkDelayL CCC6 BBC0 16043 add SparkTempL CCC8 B7B0 16044 sta SparkDelayL CCCA B6AF 16045 lda SparkDelayH CCCC B9BF 16046 adc SparkTempH CCCE B7AF 16047 sta SparkDelayH 16048 ; als long trigger test 16049 CCD0 2013 16050 bra AddLongTrigg 16051 16052 ck_xlong: 16053 ; Check for long trigger (more than 90 deg) CCD2 C6E3AD 16054 lda SparkConfig1_f CCD5 A501 16055 bit #M_SC1LngTrg CCD7 2718 16056 beq ck_nextcyl 16057 16058 xl45: 16059 ; Divide 90 deg time by 2 to get 45 deg time (112.5 to 135 deg) CCD9 34BF 16060 lsr SparkTempH CCDB 36C0 16061 ror SparkTempL 16062 16063 ; Jump out if extra long trigger CCDD A502 16064 bit #M_SC1XLngTrg CCDF 2604 16065 bne AddLongTrigg 16066 16067 xl22: 16068 ; Divide 45 deg time by 2 to get 22.5 deg time (90 to 112.5 deg) CCE1 34BF 16069 lsr SparkTempH CCE3 36C0 16070 ror SparkTempL 16071 16072 AddLongTrigg: 16073 ; Add extra time for long trigger CCE5 B6B0 16074 lda SparkDelayL CCE7 BBC0 16075 add SparkTempL CCE9 B7B0 16076 sta SparkDelayL CCEB B6AF 16077 lda SparkDelayH CCED B9BF 16078 adc SparkTempH CCEF B7AF 16079 sta SparkDelayH 16080 16081 ck_nextcyl: 16082 ;check for next cyl mode - only get here if NOT in long-trigger CCF1 0B6B0E 16083 brclr nextcyl,EnhancedBits4,SDelayDone 16084 16085 ;now actual delay = itime - "spark delay" 16086 ; so we calc the time for 7 deg and then take that time off the iTime 16087 ;cTime?cp was saved earlier as the predicted time for this period CCF4 C60201 16088 lda cTimeLcp CCF7 B0B0 16089 sub SparkDelayL CCF9 B7B0 16090 sta SparkDelayL CCFB C60200 16091 lda cTimeHcp CCFE B2AF 16092 sbc SparkDelayH CD00 B7AF 16093 sta SparkDelayH 16094 16095 SDelayDone: 16096 CD02 026151 16097 brset SparkHSpeed,SparkBits,set_spk_timer ; High speed set timer CD05 03672D 16098 brclr dwellcont,feature7,j_SSC 16099 ;if next_cyl and cranking then skip CD08 0B6B03 16100 brclr nextcyl,EnhancedBits4,sdd2 CD0B 024227 16101 brset crank,engine,j_SSC ; can cause a conflict 16102 16103 sdd2: 16104 ; low speed dwell 16105 ; a copy of some of Calcdwell, but simplified... 16106 16107 ; uses SparkTempH/L for temporary space 16108 CD0E B6B0 16109 lda SparkDelayL CD10 B0F4 16110 sub dwelldms CD12 B7C0 16111 sta SparkTempL CD14 B6AF 16112 lda SparkDelayH CD16 A200 16113 sbc #0 CD18 B7BF 16114 sta SparkTempH CD1A 2405 16115 bcc lsd_done 16116 ; < zero = OOOPS! set minimal period 16117 lsd_min: ; target dwell period>available period CD1C 8C 16118 clrh CD1D AE01 16119 ldx #1 ; turn on coil as soon as we can CD1F 2002 16120 bra lsd_done2 16121 lsd_done: CD21 55BF 16122 ldhx SparkTempH 16123 lsd_done2: CD23 006A12 16124 brset coilabit,coilsel,lsd_a CD26 026A14 16125 brset coilbbit,coilsel,lsd_b CD29 046A16 16126 brset coilcbit,coilsel,lsd_c CD2C 066A18 16127 brset coildbit,coilsel,lsd_d CD2F 086A1A 16128 brset coilebit,coilsel,lsd_e CD32 0A6A1C 16129 brset coilfbit,coilsel,lsd_f 16130 j_SSC: CD35 CCCE46 16131 jmp SKIP_CYCLE_CALC CD38 35B1 16132 lsd_a: sthx SparkOnLeftah ; Store time to keep output the same CD3A CCCE46 16133 jmp SKIP_CYCLE_CALC CD3D 35B3 16134 lsd_b: sthx SparkOnLeftbh ; Store time to keep output the same CD3F CCCE46 16135 jmp SKIP_CYCLE_CALC CD42 35B5 16136 lsd_c: sthx SparkOnLeftch ; Store time to keep output the same CD44 CCCE46 16137 jmp SKIP_CYCLE_CALC CD47 35B7 16138 lsd_d: sthx SparkOnLeftdh ; Store time to keep output the same CD49 CCCE46 16139 jmp SKIP_CYCLE_CALC CD4C 35B9 16140 lsd_e: sthx SparkOnLefteh ; Store time to keep output the same CD4E CCCE46 16141 jmp SKIP_CYCLE_CALC CD51 35BB 16142 lsd_f: sthx SparkOnLeftfh ; Store time to keep output the same CD53 CCCE46 16143 jmp SKIP_CYCLE_CALC 16144 16145 set_spk_timer: CD56 03676D 16146 brclr dwellcont,feature7,do_set_spk msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 133 MC68HC908GP32 User Bootloader 16147 ;if next_cyl and cranking then skip CD59 0B6B03 16148 brclr nextcyl,EnhancedBits4,sst2 CD5C 024267 16149 brset crank,engine,do_set_spk ; can cause a conflict 16150 sst2: 16151 ; now see if we've time for dwell before spark 16152 ; this will work when rpm/advance are low and dwell doesn't start 16153 ; before trigger this doesn't leave any margin... could be trying to start 16154 ; dwell too soon after now and due to latency we'll miss it? 16155 16156 ;026g add hysteresis to hrd mode to see if it helps my "1500rpm miss" 16157 ; if time < 0.512ms then OFF 16158 ; if time > 0.768ms then ON 16159 ;in between follows last state 16160 CD5F B6B0 16161 lda SparkDelayL CD61 B0F6 16162 sub dwellusl CD63 97 16163 tax CD64 B6AF 16164 lda SparkDelayH CD66 B2F5 16165 sbc dwellush CD68 250E 16166 bcs hrd_off ; if negative then OFF CD6A A101 16167 cmp #1 CD6C 230A 16168 bls hrd_off ; <= .511ms so OFF CD6E A102 16169 cmp #2 CD70 2202 16170 bhi hrd_on ; > 0.768ms so ON CD72 2006 16171 bra hrd_ck ; in between so no change 16172 16173 hrd_on: 16174 ; for testing we can disable hi-res dwell altogether 16175 ; lda feature6_f 16176 ; bit #hrd_disableb 16177 ; bne hrd_off ; disabled CD74 106D 16178 bset hrdwon,EnhancedBits6 CD76 2002 16179 bra hrd_ck 16180 hrd_off: CD78 116D 16181 bclr hrdwon,EnhancedBits6 16182 hrd_ck: CD7A 016D49 16183 brclr hrdwon,EnhancedBits6,do_set_spk ; hrd bit off, so skip 16184 16185 ; now want to work out the dwell delay. 16186 ;first work out the target time for the spark and store away 16187 dwl_ok: CD7D B6B0 16188 lda SparkDelayL CD7F CB0204 16189 add T2CurrL CD82 B7F8 16190 sta SparkTargetL ; Store low byte in target area CD84 B6AF 16191 lda SparkDelayH CD86 C90203 16192 adc T2CurrH CD89 B7F7 16193 sta SparkTargetH 16194 16195 ;now calc dwell start point into SparkDelay CD8B B6B0 16196 lda SparkDelayL CD8D B0F6 16197 sub dwellusl CD8F B7B0 16198 sta SparkDelayL ; now dwell delay L CD91 B6AF 16199 lda SparkDelayH CD93 B2F5 16200 sbc dwellush CD95 B7AF 16201 sta SparkDelayH ; H CD97 186B 16202 bset indwell,EnhancedBits4 ; flag that we are doing dwell 16203 ; delay not spark delay 16204 16205 ; make sure lowres dwell timers are zero to prevent early less accurate dwell 16206 ; change... don't reset the timer. If the timer gets there first it 16207 ; should be ignored, but that doesn't FFFFING work???!?!? so zero out the 16208 ; timers here anyway 16209 ; CD99 450000 16210 ldhx #0 CD9C 006A11 16211 brset coilabit,coilsel,zd_a CD9F 026A12 16212 brset coilbbit,coilsel,zd_b CDA2 046A13 16213 brset coilcbit,coilsel,zd_c CDA5 066A14 16214 brset coildbit,coilsel,zd_d CDA8 086A15 16215 brset coilebit,coilsel,zd_e CDAB 0A6A16 16216 brset coilfbit,coilsel,zd_f CDAE 2016 16217 bra do_set_spk ; how? CDB0 35B1 16218 zd_a: sthx SparkOnLeftah ; Store time to keep output the same CDB2 2012 16219 bra do_set_spk CDB4 35B3 16220 zd_b: sthx SparkOnLeftbh ; Store time to keep output the same CDB6 200E 16221 bra do_set_spk CDB8 35B5 16222 zd_c: sthx SparkOnLeftch ; Store time to keep output the same CDBA 200A 16223 bra do_set_spk CDBC 35B7 16224 zd_d: sthx SparkOnLeftdh ; Store time to keep output the same CDBE 2006 16225 bra do_set_spk CDC0 35B9 16226 zd_e: sthx SparkOnLefteh ; Store time to keep output the same CDC2 2002 16227 bra do_set_spk CDC4 35BB 16228 zd_f: sthx SparkOnLeftfh ; Store time to keep output the same 16229 16230 do_set_spk: CDC6 B6B0 16231 lda SparkDelayL CDC8 C0E022 16232 sub latency_f CDCB B7B0 16233 sta SparkDelayL CDCD B6AF 16234 lda SparkDelayH CDCF A200 16235 sbc #0 CDD1 B7AF 16236 sta SparkDelayH CDD3 2406 16237 bcc dss2 CDD5 3FAF 16238 clr SparkDelayH CDD7 A640 16239 lda #$40 CDD9 2010 16240 bra setit2 16241 dss2: 16242 ;check not too soon - minimum delay of 64us CDDB B6AF 16243 lda SparkDelayH CDDD 260A 16244 bne setit CDDF B6B0 16245 lda SparkDelayL CDE1 A140 16246 cmp #$40 CDE3 2204 16247 bhi setit CDE5 A640 16248 lda #$40 CDE7 2002 16249 bra setit2 16250 setit: 16251 ; Add total highres spark delay time to timer value from IRQ 16252 ; start and set interrupt CDE9 B6B0 16253 lda SparkDelayL 16254 setit2: CDEB CB0204 16255 add T2CurrL CDEE 97 16256 tax ; Store low byte CDEF B6AF 16257 lda SparkDelayH CDF1 C90203 16258 adc T2CurrH CDF4 B734 16259 sta T2CH1H ; Write high byte timer output 16260 ; compare first CDF6 BF35 16261 stx T2CH1L ; Then low byte 16262 CDF8 1F33 16263 bclr TOF,T2SC1 ; clear pending interrupt CDFA 1C33 16264 bset TOIE,T2SC1 ; Enable timer interrupt 16265 16266 ; rotary low revs ... 16267 CDFC 016C03 16268 brclr rotary2,EnhancedBits5,skip_rotary_jmp CDFF 086B03 16269 brset indwell,EnhancedBits4,do_rotary_dwl 16270 skip_rotary_jmp: CE02 CCCE46 16271 jmp SKIP_CYCLE_CALC 16272 16273 do_rotary_dwl: CE05 096C3E 16274 brclr rsh_s,EnhancedBits5,SKIP_CYCLE_CALC CE08 0B6C3B 16275 brclr rsh_r,EnhancedBits5,SKIP_CYCLE_CALC 16276 16277 ; Add rotary split to the SparkDelay 16278 CE0B B6B0 16279 lda SparkDelayL CE0D BBFD 16280 add splitdelL CE0F B7C0 16281 sta SparkTempL CE11 B6AF 16282 lda SparkDelayH msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 134 MC68HC908GP32 User Bootloader CE13 B9FC 16283 adc splitdelH CE15 B7BF 16284 sta SparkTempH 16285 16286 ; Div by 100 to get 1/10th ms value 16287 CE17 8C 16288 clrh CE18 AE64 16289 ldx #100T CE1A B6BF 16290 lda SparkTempH CE1C 52 16291 div CE1D B7BF 16292 sta SparkTempH CE1F B6C0 16293 lda SparkTempL CE21 52 16294 div CE22 B7C0 16295 sta SparkTempL 16296 16297 ; now pick which coil gets the dwell, and store it there. 16298 CE24 450000 16299 ldhx #0T CE27 35B5 16300 sthx SparkOnLeftch CE29 35B7 16301 sthx SparkOnLeftdh CE2B 55BF 16302 ldhx SparkTempH CE2D 086508 16303 brset rotaryFDign,feature1,set_FD_coils CE30 006A0D 16304 brset coilabit,coilsel,rotary_set_coilc CE33 026A0E 16305 brset coilbbit,coilsel,rotary_set_coild CE36 200E 16306 bra end_rotary_dwell ; shouldn't get here 16307 16308 set_FD_coils: CE38 006A09 16309 brset coilabit,coilsel,rotary_set_coild CE3B 026A02 16310 brset coilbbit,coilsel,rotary_set_coilc CE3E 2006 16311 bra end_rotary_dwell ; shouldn't get here 16312 16313 rotary_set_coilc: CE40 35B5 16314 sthx SparkOnLeftch CE42 2002 16315 bra end_rotary_dwell 16316 16317 rotary_set_coild: CE44 35B7 16318 sthx SparkOnLeftdh 16319 16320 end_rotary_dwell: 16321 16322 SKIP_CYCLE_CALC: 16323 ; are we logging triggers? CE46 076C36 16324 brclr triglog,EnhancedBits5,w_dec_notlogt 16325 ;we are logging so record something CE49 8C 16326 clrh 16327 CE4A CE01CF 16328 ldx VE_r+PAGESIZE-2 CE4D 02610F 16329 brset SparkHSpeed,SparkBits,tl_high 16330 ;tl_low: CE50 A601 16331 lda #1 CE52 C701D0 16332 sta VE_r+PAGESIZE-1 CE55 B670 16333 lda rpmch CE57 D70114 16334 sta VE_r,x CE5A 5C 16335 incx CE5B B671 16336 lda rpmcl CE5D 2014 16337 bra tl_cont 16338 tl_high: CE5F 4F 16339 clra CE60 C701D0 16340 sta VE_r+PAGESIZE-1 CE63 B6AD 16341 lda iTimeH CE65 2602 16342 bne tlhh CE67 A6FF 16343 lda #$FF 16344 tlhh: CE69 D70114 16345 sta VE_r,x CE6C 5C 16346 incx CE6D B6AE 16347 lda iTimeL CE6F 2602 16348 bne tl_cont CE71 A6FF 16349 lda #$FF 16350 tl_cont: CE73 D70114 16351 sta VE_r,x CE76 5C 16352 incx CE77 A3B9 16353 cpx #PAGESIZE-4 CE79 2501 16354 blo wdtlt CE7B 5F 16355 clrx 16356 wdtlt: CE7C CF01CF 16357 stx VE_r+PAGESIZE-2 16358 w_dec_notlogt: 16359 CE7F C60202 16360 lda T2CurrX CE82 B7A9 16361 sta T2LastX ; Make current value last CE84 C60203 16362 lda T2CurrH CE87 B7AA 16363 sta T2LastH CE89 C60204 16364 lda T2CurrL CE8C B7AB 16365 sta T2LastL 16366 CE8E 4E706E 16367 mov rpmch,rpmph CE91 4E716F 16368 mov rpmcl,rpmpl 16369 CE94 3F70 16370 clr rpmch CE96 3F71 16371 clr rpmcl CE98 1000 16372 bset fuelp,porta ; Turn on fuel Pump 16373 ;scc_run: CE9A 1042 16374 bset running,engine ; Set engine running value CE9C 036703 16375 brclr dwellcont,feature7,no_dwell 16376 ;figure out if we want to schedule dwell now 16377 ;; brclr crank,engine,bsc1 ; we don't 16378 ; if in crank mode then min_dwell does same thing CE9F CCCF68 16379 jmp squirtCheck1 16380 16381 no_dwell: CEA2 0B6652 16382 brclr min_dwell,feature2,bsc1 16383 ; if minimal dwell set coil to charge in 0.1ms 16384 ; this should help HEI4 pin until I've written dwell 16385 ; control as the high time starts at the trigger 16386 scc_hei4: CEA5 1762 16387 bclr sparkon,revlimbits ; spark now off CEA7 0C6B4F 16388 brset invspk,EnhancedBits4,sccr_inv CEAA macro 16389 COILPOS ; charge coil for non-inverted CEAA 006448 16390 BRSET REUSE_FIDLE,OUTPUTPINS,ILSOX CEAD 006C14 16391 BRSET ROTARY2,ENHANCEDBITS5,ROT2POS CEB0 006A2A 16392 BRSET COILABIT,COILSEL,ILSOA CEB3 026A2B 16393 BRSET COILBBIT,COILSEL,ILSOB CEB6 046A2C 16394 BRSET COILCBIT,COILSEL,ILSOC CEB9 066A2D 16395 BRSET COILDBIT,COILSEL,ILSOD CEBC 086A2E 16396 BRSET COILEBIT,COILSEL,ILSOE CEBF 0A6A2F 16397 BRSET COILFBIT,COILSEL,ILSOF CEC2 2033 16398 BRA FC_END 16399 ROT2POS: CEC4 086510 16400 BRSET ROTARYFDIGN,FEATURE1,CHARGEFD CEC7 046A05 16401 BRSET COILCBIT,COILSEL,ROT2CP CECA 066A06 16402 BRSET COILDBIT,COILSEL,ROT2DP CECD 200E 16403 BRA ILSOA 16404 ROT2CP: CECF 1302 16405 BCLR COILB,PORTC CED1 2024 16406 BRA FC_END 16407 ROT2DP: CED3 1302 16408 BCLR COILB,PORTC CED5 2020 16409 BRA FC_END 16410 CHARGEFD: CED7 046A0B 16411 BRSET COILCBIT,COILSEL,ILSOC CEDA 066A04 16412 BRSET COILDBIT,COILSEL,ILSOB 16413 ILSOA: CEDD 1102 16414 BCLR COILA,PORTC CEDF 2016 16415 BRA FC_END 16416 ILSOB: CEE1 1302 16417 BCLR COILB,PORTC CEE3 2012 16418 BRA FC_END msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 135 MC68HC908GP32 User Bootloader 16419 ILSOC: CEE5 1502 16420 BCLR WLED,PORTC CEE7 200E 16421 BRA FC_END 16422 ILSOD: CEE9 1103 16423 BCLR OUTPUT3,PORTD CEEB 200A 16424 BRA FC_END 16425 ILSOE: CEED 1702 16426 BCLR PIN10,PORTC CEEF 2006 16427 BRA FC_END 16428 ILSOF: CEF1 1503 16429 BCLR KNOCKIN,PORTD CEF3 2002 16430 BRA FC_END 16431 ILSOX: CEF5 1300 16432 BCLR IASC,PORTA 16433 FC_END: 16434 bsc1: CEF7 206F 16435 bra squirtCheck1 16436 sccr_inv: CEF9 macro 16437 COILNEG ; charge coil for inverted CEF9 00646A 16438 BRSET REUSE_FIDLE,OUTPUTPINS,DSLSX CEFC 006C1E 16439 BRSET ROTARY2,ENHANCEDBITS5,ROT2NEG CEFF 0F6432 16440 BRCLR TOY_DLI,OUTPUTPINS,NILS CF02 006A06 16441 BRSET COILABIT,COILSEL,FCNITA CF05 026A09 16442 BRSET COILBBIT,COILSEL,FCNITB CF08 046A0C 16443 BRSET COILCBIT,COILSEL,FCNITC 16444 FCNITA: CF0B 1302 16445 BCLR COILB,PORTC CF0D 1502 16446 BCLR WLED,PORTC CF0F 203D 16447 BRA DSLSA 16448 FCNITB: CF11 1202 16449 BSET COILB,PORTC CF13 1502 16450 BCLR WLED,PORTC CF15 2037 16451 BRA DSLSA 16452 FCNITC: CF17 1302 16453 BCLR COILB,PORTC CF19 1402 16454 BSET WLED,PORTC CF1B 2031 16455 BRA DSLSA 16456 ROT2NEG: CF1D 086528 16457 BRSET ROTARYFDIGN,FEATURE1,FIREFD CF20 046A05 16458 BRSET COILCBIT,COILSEL,ROT2CN CF23 066A08 16459 BRSET COILDBIT,COILSEL,ROT2DN CF26 2026 16460 BRA DSLSA 16461 ROT2CN: CF28 1502 16462 BCLR WLED,PORTC CF2A 1202 16463 BSET COILB,PORTC CF2C 203A 16464 BRA CN_END 16465 ROT2DN: CF2E 1402 16466 BSET WLED,PORTC CF30 1202 16467 BSET COILB,PORTC CF32 2034 16468 BRA CN_END 16469 NILS: CF34 006A17 16470 BRSET COILABIT,COILSEL,DSLSA CF37 026A18 16471 BRSET COILBBIT,COILSEL,DSLSB CF3A 046A19 16472 BRSET COILCBIT,COILSEL,DSLSC CF3D 066A1A 16473 BRSET COILDBIT,COILSEL,DSLSD CF40 086A1B 16474 BRSET COILEBIT,COILSEL,DSLSE CF43 0A6A1C 16475 BRSET COILFBIT,COILSEL,DSLSF CF46 2020 16476 BRA CN_END 16477 FIREFD: CF48 046A07 16478 BRSET COILCBIT,COILSEL,DSLSB CF4B 066A08 16479 BRSET COILDBIT,COILSEL,DSLSC 16480 DSLSA: CF4E 1002 16481 BSET COILA,PORTC CF50 2016 16482 BRA CN_END 16483 DSLSB: CF52 1202 16484 BSET COILB,PORTC CF54 2012 16485 BRA CN_END 16486 DSLSC: CF56 1402 16487 BSET WLED,PORTC CF58 200E 16488 BRA CN_END 16489 DSLSD: CF5A 1003 16490 BSET OUTPUT3,PORTD CF5C 200A 16491 BRA CN_END 16492 DSLSE: CF5E 1602 16493 BSET PIN10,PORTC CF60 2006 16494 BRA CN_END 16495 DSLSF: CF62 1403 16496 BSET KNOCKIN,PORTD CF64 2002 16497 BRA CN_END 16498 DSLSX: CF66 1200 16499 BSET IASC,PORTA 16500 CN_END: 16501 16502 *********** now schedule some fuel injection ************ 16503 16504 squirtCheck1: 16505 16506 ;copied this from the original HR code. 16507 ;not 100% sure we really need seperate 16508 ;'calc' and 'use' variables... 16509 ; kg commented all out and used pwuseh/l/2h/2l as lores uses PW1/2 16510 ; and allowed pwcalch/l to be the same for lores and hires 16511 CF68 02421D 16512 brset crank,engine,schedule1a ; Squirt on every pulse 16513 ; if cranking 16514 CF6B 3C82 16515 inc IgnCount1 ; Check to see if we are to 16516 ; squirt or skip CF6D B682 16517 lda IgnCount1 CF6F C1E195 16518 cmp divider_f1 CF72 2708 16519 beq schedule1 CF74 A110 16520 cmp #16T ; The maximum allowed - reset if match CF76 2514 16521 blo squirtDone1 CF78 3F82 16522 clr IgnCount1 CF7A 2010 16523 bra squirtDone1 16524 16525 schedule1: CF7C 3F82 16526 clr IgnCount1 16527 16528 ; lda DTmode_f ; check if DT in use 16529 ; bit #alt_i2t2 16530 ; bne schedule1a ; i2t2=1 16531 CF7E C6E196 16532 lda alternate_f1 CF81 2705 16533 beq schedule1a CF83 3C84 16534 inc altcount1 CF85 008404 16535 brset 0,altcount1,squirtDone1 16536 schedule1a: 16537 ; mov pwcalc1,pw1 ; not needed hires kg 16538 ; beq squirtDone1 ; check for zero pulse CF88 1441 16539 bset sched1,squirt CF8A 1041 16540 bset inj1,squirt 16541 squirtDone1: 16542 16543 ;------------------------------------------------------------------------------- 16544 16545 squirtCheck2: CF8C C6E021 16546 lda DTmode_f ; check if DT in use CF8F A510 16547 bit #alt_i2t2 CF91 2628 16548 bne sc2dual ; i2t2=1 16549 16550 sc2single: CF93 02421F 16551 brset crank,engine,schedule2sa ; Squirt on every pulse 16552 ; if cranking 16553 CF96 3C83 16554 inc IgnCount2 ; Check to see if we are to msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 136 MC68HC908GP32 User Bootloader 16555 ; squirt or skip CF98 B683 16556 lda IgnCount2 CF9A C1E195 16557 cmp divider_f1 CF9D 270A 16558 beq schedule2s CF9F B683 16559 lda IgnCount2 CFA1 A110 16560 cmp #16T ; The maximum allowed - reset if match CFA3 253C 16561 blo squirtDone2 CFA5 3F83 16562 clr IgnCount2 CFA7 2038 16563 bra squirtDone2 16564 16565 schedule2s: CFA9 3F83 16566 clr IgnCount2 CFAB C6E196 16567 lda alternate_f1 CFAE 2705 16568 beq schedule2sa CFB0 3C85 16569 inc altcount2 CFB2 01852C 16570 brclr 0,altcount2,squirtDone2 16571 schedule2sa: 16572 ; mov pwcalc2,pw2 ; not needed hires kg 16573 ; beq squirtDone2 ; check for zero pulse CFB5 1841 16574 bset sched2,squirt CFB7 1241 16575 bset inj2,squirt CFB9 2026 16576 bra squirtDone2 16577 16578 sc2dual: CFBB 02421F 16579 brset crank,engine,schedule2da ; Squirt on every pulse 16580 ; if cranking 16581 CFBE 3C83 16582 inc IgnCount2 ; Check to see if we are to 16583 ; squirt or skip CFC0 B683 16584 lda IgnCount2 CFC2 C1E295 16585 cmp divider_f2 CFC5 270A 16586 beq schedule2d CFC7 B683 16587 lda IgnCount2 CFC9 A110 16588 cmp #16T ; The maximum allowed - reset if match CFCB 2614 16589 bne squirtDone2 CFCD 3F83 16590 clr IgnCount2 CFCF 2010 16591 bra squirtDone2 16592 16593 schedule2d: CFD1 3F83 16594 clr IgnCount2 CFD3 C6E196 16595 lda alternate_f1 CFD6 2705 16596 beq schedule2da CFD8 3C85 16597 inc altcount2 CFDA 018504 16598 brclr 0,altcount2,squirtDone2 16599 schedule2da: 16600 ; mov pwcalc2,pw2 ; not needed hires kg 16601 ; beq squirtDone2 ; check for zero pulse CFDD 1841 16602 bset sched2,squirt CFDF 1241 16603 bset inj2,squirt 16604 16605 squirtDone2: 16606 16607 ; from timerroll kg 16608 ;======== Injector Firing Control ======== 16609 ;===== Main Injector Control Logic ======= CFE1 044105 16610 brset sched1,squirt,INJSTRT CFE4 084102 16611 brset sched2,squirt,INJSTRT CFE7 2021 16612 bra INJF2 16613 16614 ; An injector is scheduled to be fired - because the other bank *may* be firing, we have to 16615 ; do a little monkey business with the timer. Here we stop the timer counting, but we do not reset 16616 ; the count to zero - this lets us subtract bath channel's OC compare value from the current 16617 ; timer value and re-write back in. Later on, we stop the timer again (already stopped) but 16618 ; this time the count is reset to zero. Because we do the following below, the other channel's 16619 ; count is still valid for a future OC. If there is not a OC compare pending in the other 16620 ; channel, we still do this because it does not hurt anything and it takes less time to 16621 ; do the subtraction than it does to determine if there is a OC compare pending..... 16622 ; 16623 ; This code allows pulsewidths to overlap - up to 65.535 milliseconds PW - enough for anyone! 16624 ; 16625 INJSTRT: CFE9 6E2320 16626 MOV #TimerstopnrHR,t1sc ; Stop Timer so it can be set up - no timer clock reset CFEC B626 16627 lda T1CH0H ; Subtract OC values from current timer count CFEE B021 16628 sub T1CNTH ; and re-write back in CFF0 B726 16629 sta T1CH0H CFF2 B627 16630 lda T1CH0L CFF4 B022 16631 sub T1CNTL CFF6 B727 16632 sta T1CH0L 16633 CFF8 B629 16634 lda T1CH1H CFFA B021 16635 sub T1CNTH CFFC B729 16636 sta T1CH1H CFFE B62A 16637 lda T1CH1L D000 B022 16638 sub T1CNTL D002 B72A 16639 sta T1CH1L 16640 D004 04410C 16641 brset sched1,squirt,NEW_SQUIRT1 16642 INJF1: D007 084128 16643 brset sched2,squirt,NEW_SQUIRT2 16644 INJF2: D00A 064157 16645 brset firing1,squirt,OFF_INJ_1 16646 INJF3: D00D 0A415C 16647 brset firing2,squirt,OFF_INJ_2 D010 CCD07B 16648 jmp inj2done ; no injection? 16649 16650 ;=== Injector #1 - Start New Injection === 16651 NEW_SQUIRT1: D013 1641 16652 bset firing1,squirt ; Turn on "firing" bit D015 1541 16653 bclr sched1,squirt ; Turn off schedule bit (is D017 1041 16654 bset inj1,squirt D019 026402 16655 brset REUSE_LED17,outputpins,nsq1 D01C 1002 16656 bset sled,portc ; squrt LED is ON 16657 nsq1: 16658 ;Setup timer for high res (unbuffered ouput-compare mode) D01E 6E3320 16659 mov #TimerstopHR,t1sc ;Stop Timer so it can be set up - reset count to zero D021 4E4E26 16660 mov pwcalch,T1CH0H ;Copy pulse width for OC match D024 4E4F27 16661 mov pwcalcl,T1CH0L D027 6E1025 16662 mov #SetOCstateHR,T1SC0 ;Turn on the injector... (inverted drive) D02A 6E5C25 16663 mov #SetOCgoHRI,T1SC0 ;Enable OC mode, interrupt and 'set on match' D02D 6E0320 16664 mov #TimergoHR,t1sc ;Start timer, prescale 1us D030 20D5 16665 bra INJF1 16666 16667 ;=== Injector #2 - Start New Injection === 16668 NEW_SQUIRT2: D032 1A41 16669 bset firing2,squirt ; Turn on "firing" bit D034 1941 16670 bclr sched2,squirt ; Turn off schedule bit (is now 16671 ; current operation) D036 1241 16672 bset inj2,squirt D038 026402 16673 brset REUSE_LED17,outputpins,nsq2 D03B 1002 16674 bset sled,portc ; squrt LED is ON 16675 nsq2: 16676 ;Setup timer for high res (unbuffered ouput-compare mode) D03D 6E3320 16677 mov #TimerstopHR,t1sc ;Stop Timer so it can be set up - reset count to zero D040 4E5429 16678 mov pwcalc2h,T1CH1H ;Copy pulse width for OC match D043 4E552A 16679 mov pwcalc2l,T1CH1L D046 6E1028 16680 mov #SetOCstateHR,T1SC1 ;Turn on the injector... (inverted drive) D049 6E5C28 16681 mov #SetOCgoHRI,T1SC1 ;Enable OC mode, interrupt and 'set on match' D04C 6E0320 16682 mov #TimergoHR,t1sc ;Start timer, prescale 1us 16683 D04F C6E02E 16684 lda feature3_f D052 A508 16685 bit #WaterInjb D054 27B4 16686 beq INJF2 D056 0A0002 16687 brset water,porta,inject_water ; If water needed go to 16688 ; inject water D059 20AF 16689 bra INJF2 16690 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 137 MC68HC908GP32 User Bootloader 16691 inject_water: D05B 0E65AC 16692 brset Nitrous,feature1,INJF2 ; If NOS Selected dont turn on 16693 ; water pulsed output D05E 1800 16694 bset water2,porta ; Turn water injector on with 16695 ; fuel inj 2 D060 20A8 16696 bra INJF2 ; Carry on as normal 16697 INJF3JMP: D062 20A9 16698 bra INJF3 16699 16700 OFF_INJ_1: D064 1741 16701 bclr firing1,squirt D066 1541 16702 bclr sched1,squirt D068 1141 16703 bclr inj1,squirt D06A 20A1 16704 bra INJF3 16705 16706 OFF_INJ_2: D06C 1B41 16707 bclr firing2,squirt D06E 1941 16708 bclr sched2,squirt D070 1341 16709 bclr inj2,squirt 16710 D072 C6E02E 16711 lda feature3_f ; from here to bclr addes in 08f to clear water inj D075 A508 16712 bit #WaterInjb D077 2702 16713 beq inj2done 16714 ; if not using water then skip D079 1900 16715 bclr water2,porta ; Turn off water injection pulse 16716 16717 ;sph primebit is set in priming PW section 16718 inj2done: D07B 066602 16719 brset primebit,feature2,primeRTS D07E 2003 16720 bra inj2doneIRQ 16721 primeRTS: D080 1766 16722 bclr primebit,feature2 D082 81 16723 rts ;return to priming PW section 16724 inj2doneIRQ: ;not priming, return from IRQ 16725 16726 IRQ_EXIT: D083 026310 16727 brset MSNEON,personality,IRQ_EXIT2 D086 04630D 16728 brset WHEEL,personality,IRQ_EXIT2 D089 C6E05C 16729 lda feature6_f D08C A504 16730 bit #falsetrigb ; can disable false trigger protection for testing D08E 2606 16731 bne IRQ_EXIT2 16732 ; These are used to reduce/prevent false triggers but no good for 16733 ; the multi-toothed wheels D090 141D 16734 bset ACK,INTSCR ; Flush out any new interrupts pending D092 121D 16735 bset IMASK,INTSCR ; Disable IRQ interrupts D094 161D 16736 bset IRQF,INTSCR ; read only ?!?! Won't do anything 16737 IRQ_EXIT2: D096 8A 16738 pulh D097 80 16739 rti 16740 16741 *************************************************************************** 16742 ** 16743 ** ADC - Interrupt for ADC conversion complete 16744 ** 16745 *************************************************************************** 16746 ADCDONE: D098 8B 16747 pshh ; Do this because processor does 16748 ; not stack H 16749 D099 8C 16750 clrh 16751 ; Store previous values for derivative D09A B68C 16752 lda adsel D09C 270A 16753 beq KPa_ADC_Check ; If doing ADC 0 then check for fixed KPa D09E A106 16754 cmp #$06 D0A0 2749 16755 beq FUEL_JUMP ; Check the fuel pressure sensor D0A2 A107 16756 cmp #$07 D0A4 274E 16757 beq EGT_JUMP ; Check the EGT input D0A6 202D 16758 bra Normal_ADSEL 16759 16760 KPa_ADC_Check: D0A8 054229 16761 brclr startw,engine,NormMAP_Count ; Are we in ASE mode? D0AB C6E5B3 16762 lda feature10_f5 D0AE A504 16763 bit #MAPHoldb ; Are we holding the MAP at a fixed value during ASE? D0B0 2722 16764 beq NormMAP_Count D0B2 0E6B1F 16765 brset FxdASEDone,EnhancedBits4,NormMAP_Count ; Is Fixed ASE done? 16766 D0B5 B6CA 16767 lda coolant ; We are in fixed MAP mode D0B7 C1E5B5 16768 cmp CltFixASE_f ; so are we below the temperature setpoint? D0BA 2302 16769 bls FixdMAP_ASE D0BC 2016 16770 bra NormMAP_Count ; Normal MAP mode 16771 16772 FixdMAP_ASE: D0BE B681 16773 lda ASEcount D0C0 C1E5B4 16774 cmp TimFixASE_f D0C3 2504 16775 blo FixdMAP2 ; Have we passed the Fixed timer yet? 16776 D0C5 1E6B 16777 bset FxdASEDone,EnhancedBits4 ; SET the Fixed bit so we dont do it again. D0C7 200B 16778 bra NormMAP_Count ; Normal MAP mode 16779 16780 FixdMAP2: D0C9 B63D 16781 lda adr D0CB C6E5B6 16782 lda MAPFixASE_f ; We are in fixed MAP mode during ASE, load value D0CE B744 16783 sta map D0D0 B775 16784 sta lmap D0D2 200D 16785 bra Done_FIXMAP 16786 16787 NormMAP_Count: D0D4 4F 16788 clra ; reset offset to zero 16789 16790 Normal_ADSEL: D0D5 97 16791 tax D0D6 E644 16792 lda map,x D0D8 E775 16793 sta lmap,x ; Store the old value 16794 D0DA B63D 16795 lda adr ; Load in the new ADC reading D0DC EB44 16796 add map,x ; Perform (map + last_map)/2 16797 ; averaging (for all ADC readings) D0DE 46 16798 rora D0DF E744 16799 sta map,x ; MAP is entry point, offset is 16800 ; loaded in index register 16801 Done_FIXMAP: D0E1 B68C 16802 lda adsel D0E3 4C 16803 inca D0E4 A108 16804 cmp #$08 D0E6 2611 16805 bne ADCPTR D0E8 4F 16806 clra D0E9 200E 16807 bra ADCPTR 16808 16809 FUEL_JUMP: D0EB B63D 16810 lda adr D0ED B75C 16811 sta o2_fpadc ; Fuel Pressure, wheel sensor or 16812 ; second O2 sensor D0EF B68C 16813 lda adsel D0F1 4C 16814 inca D0F2 2005 16815 bra ADCPTR 16816 16817 EGT_JUMP: D0F4 B63D 16818 lda adr D0F6 B75D 16819 sta egtadc ; EGT sensor or wheel sensor input. D0F8 4F 16820 clra 16821 ADCPTR: D0F9 B78C 16822 sta adsel D0FB 8A 16823 pulh D0FC 80 16824 rti 16825 *************************************************************************** 16826 ** msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 138 MC68HC908GP32 User Bootloader 16827 ** SCI Communications 16828 ** 16829 ** Communications is established when the PC communications program sends 16830 ** a command character - the particular character sets the mode: 16831 ** 16832 ** "A" = send all of the realtime variables via txport. 16833 ** "V" = send the VE table and constants via txport (128 bytes) 16834 ** "W"++ = receive new VE or constant byte value and 16835 ** store in offset location 16836 ** "X"++++.... = receive series of new data bytes 16837 ** "B" = jump to flash burner routine and burn VE/constant values in RAM into flash 16838 ** "C" = Test communications - echo back SECL 16839 ** "Q" = Send over Embedded Code Revision Number (irrelevant in Extra, send zero) 16840 ** "S" = Signature - update every time there is a change in data format 32 bytes 16841 ** "T" = full code revision in text. 32 bytes 16842 ** "P"+ = load page of data from Flash to RAM 16843 16844 ** txmode: 16845 ** 01 = Getting realtime data 16846 ** 02 = ? 16847 ** 03 = Sending VE 16848 ** 04 = sending signature 16849 ** 05 = Getting offset VE 16850 ** 06 = Getting data VE 16851 ** 07 = Getting offset chunk write 16852 ** 08 = Getting count chunk write 16853 ** 09 = Getting data chunk write 16854 ** 0A = Bootloader 16855 ** 0B = version string 16856 ** 0C = getting table number 16857 ** 0D = config error message 16858 ** 0E = format string 16859 *************************************************************************** 16860 IN_SCI_RCV: D0FD 8B 16861 pshh D0FE B616 16862 lda SCS1 ; Clear the SCRF bit by reading 16863 ; this register 16864 D100 B68A 16865 lda txmode ; Check if we are in the middle 16866 ; of a receive new VE/constant D102 410515 16867 cbeqa #$05,TXMODE_5 D105 41061A 16868 cbeqa #$06,TXMODE_6 D108 410727 16869 cbeqa #$07,TXMODE_7 D10B 41082C 16870 cbeqa #$08,TXMODE_8 D10E 410931 16871 cbeqa #$09,TXMODE_9 D111 410C03 16872 cbeqa #$0C,TXMODE_C1 D114 CCD1EF 16873 jmp CHECK_TXCMD D117 CCD47A 16874 TXMODE_C1: jmp TXMODE_C 16875 16876 TXMODE_5: ; Getting offset for W command D11A 4E188B 16877 mov SCDR,rxoffset D11D 3C8A 16878 inc txmode ; continue to next mode D11F CCD2AD 16879 jmp DONE_RCV 16880 TXMODE_6: D122 0C690A 16881 brset mv_mode,EnhancedBits2,TX6_MV D125 8C 16882 clrh D126 B618 16883 lda SCDR D128 BE8B 16884 ldx rxoffset D12A D70114 16885 sta VE_r,x ; store it in ram regardless of page D12D 3F8A 16886 clr txmode 16887 TX6_MV: ; in MV mode, just ignore any data sent D12F CCD2AD 16888 jmp DONE_RCV 16889 16890 TXMODE_7: ; Getting offset for X command D132 4E188B 16891 mov SCDR,rxoffset D135 3C8A 16892 inc txmode ; continue to next mode D137 CCD2AD 16893 jmp DONE_RCV 16894 16895 TXMODE_8: ; Getting count for X command D13A 4E1889 16896 mov SCDR,txgoal ; borrow txgoal as we aren't 16897 ; going to using it D13D 3C8A 16898 inc txmode ; continue to next mode D13F CCD2AD 16899 jmp DONE_RCV 16900 16901 TXMODE_9: D142 8C 16902 clrh D143 B618 16903 lda SCDR D145 BE8B 16904 ldx rxoffset D147 D70114 16905 sta VE_r,x ; store it in ram regardless of page D14A 3C8B 16906 inc rxoffset D14C 3A89 16907 dec txgoal ; count down D14E 2602 16908 bne TXMODE_9_CONT D150 3F8A 16909 clr txmode ; have received all bytes we expected 16910 TXMODE_9_CONT: D152 CCD2AD 16911 jmp DONE_RCV 16912 16913 ;MODE_B moved up here to enable relative branches 16914 MODE_B: D155 C60102 16915 lda page D158 A110 16916 cmp #$10 ; see if tooth logging or invalid page D15A 2503 16917 blo MODE_B_OK ; if it is then do not burn D15C CCD1EA 16918 jmp DONE_B 16919 MODE_B_OK: D15F 1B14 16920 bclr SCRIE,SCC2 ; turn off receive interrupt 16921 ; so don't re-enter 16922 ; cli ; re-enable interrupts to reduce 16923 ; stumble during Burn. Too bad D161 6ECC74 16924 mov #$CC,flocker D164 CDD611 16925 jsr burnConst ; routine disables interrupts during 16926 ; critical sections 16927 ; cli ; returns with ints off D167 3F74 16928 clr flocker D169 3F8A 16929 clr txmode 16930 D16B C60102 16931 lda page ; check if page0, if so reload 16932 ; quick vars D16E 2708 16933 beq ck_page0 D170 410346 16934 cbeqa #3,ck_page3 ; do trigger angle / next cyl calc D173 410765 16935 cbeqa #7,ck_page7 ; do rotary setting check D176 2072 16936 bra DONE_B 16937 16938 ck_page0: 16939 ; Set up RAM Variable - also when burning page0 search for "burning page0" D178 C6E00B 16940 lda feature1_f D17B B765 16941 sta feature1 D17D C6E00C 16942 lda feature2_f D180 B766 16943 sta feature2 16944 ; lda feature3_f 16945 ; sta feature3 ; ram copy removed 16946 ; lda feature4_f 16947 ; sta feature4 ; ram copy removed 16948 ; lda feature5_f 16949 ; sta feature5 ; ram copy removed 16950 ; lda feature6_f 16951 ; sta feature6 ; ram copy removed D182 C6E06D 16952 lda feature7_f D185 B767 16953 sta feature7 16954 ; lda feature8_f 16955 ; sta feature8 ; ram copy removed D187 C6E001 16956 lda outputpins_f D18A B764 16957 sta outputpins D18C C6E000 16958 lda personality_f D18F B763 16959 sta personality ; move from flash to ram 16960 16961 ;is PTC4 (pin11) an input (trig2) or output (shiftlight) D191 016504 16962 brclr wd_2trig,feature1,ckp0_norm_ddrc msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 139 MC68HC908GP32 User Bootloader D194 A60F 16963 lda #%00001111 ; make PTC4 an input for second trigger D196 2002 16964 bra ckp0_ddrc 16965 ckp0_norm_ddrc: D198 A61F 16966 lda #%00011111 ; ** Was 11111111 16967 ckp0_ddrc: D19A B706 16968 sta ddrc ; Outputs for LED 16969 ; ALS pin usage D19C C6E87F 16970 lda ALS_CONFIG D19F A501 16971 bit #%00000001 D1A1 2602 16972 bne UsingALS D1A3 1806 16973 bset pin11,ddrc 16974 UsingALS: 16975 ; end ALS pin usage 16976 16977 ;decide if we are doing multiple wasted spark outputs 16978 ;check this here so a changed setting or MSQ load will correctly init the variables D1A5 026307 16979 brset MSNEON,personality,pz_wspk D1A8 046304 16980 brset WHEEL,personality,pz_wspk 16981 pz_nwspk: D1AB 176B 16982 bclr wspk,EnhancedBits4 ; set that we are NOT doing wasted spark D1AD 203B 16983 bra DONE_B 16984 pz_wspk: D1AF 0964F9 16985 brclr REUSE_LED19,outputpins,pz_nwspk D1B2 006CF6 16986 brset rotary2,EnhancedBits5,pz_nwspk D1B5 166B 16987 bset wspk,EnhancedBits4 ; set that we are doing wasted spark D1B7 2031 16988 bra DONE_B 16989 16990 ck_page3: 16991 ;see if inverted or non-inv output and use a quick bit D1B9 C6E3AD 16992 lda SparkConfig1_f ; check if noninv or inv spark D1BC A508 16993 bit #M_SC1InvSpark D1BE 2604 16994 bne ckp3_inv D1C0 1D6B 16995 bclr invspk,EnhancedBits4 ; set non-inverted D1C2 2002 16996 bra ckp3_i_done 16997 ckp3_inv: D1C4 1C6B 16998 bset invspk,EnhancedBits4 ; set inverted 16999 ckp3_i_done: 17000 17001 17002 ;EDIS and NEON are never next-cylinder D1C6 08630E 17003 brset EDIS,personality,not_nc D1C9 02630B 17004 brset MSNEON,personality,not_nc 17005 D1CC C6E3A8 17006 lda TriggAngle_f D1CF A139 17007 cmp #57T ; check for next cyl mode D1D1 2204 17008 bhi not_nc ; trigger angle > 20, continue D1D3 1A6B 17009 bset nextcyl,EnhancedBits4 D1D5 2013 17010 bra DONE_B 17011 not_nc: D1D7 1B6B 17012 bclr nextcyl,EnhancedBits4 D1D9 200F 17013 bra DONE_B 17014 17015 ck_page7: D1DB C6E86F 17016 lda p8feat1_f D1DE A501 17017 bit #rotary2b D1E0 2706 17018 beq ckp7nr D1E2 106C 17019 bset rotary2,EnhancedBits5 D1E4 176B 17020 bclr wspk,EnhancedBits4 ; set that we are NOT doing normal wasted spark D1E6 2002 17021 bra DONE_B 17022 ckp7nr: D1E8 116C 17023 bclr rotary2,EnhancedBits5 17024 DONE_B: D1EA 1A14 17025 bset SCRIE,SCC2 ; re-enable receive interrupt D1EC CCD2AD 17026 jmp DONE_RCV 17027 ; 17028 CHECK_TXCMD: D1EF B618 17029 lda SCDR ; Get the command byte D1F1 41413C 17030 cbeqa #'A',MODE_A ; realtime vars D1F4 414221 17031 cbeqa #'B',jMODE_B ; All I hear is BURN D1F7 414346 17032 cbeqa #'C',MODE_C ; Comm test D1FA 41564C 17033 cbeqa #'V',MODE_V ; (VE) read page D1FD 41571B 17034 cbeqa #'W',jMODE_W ; Write byte D200 41511B 17035 cbeqa #'Q',jMODE_Q ; Query version D203 41501B 17036 cbeqa #'P',jMODE_P ; Page select D206 41211B 17037 cbeqa #'!',jMODE_BOOT ; bootloader D209 41531B 17038 cbeqa #'S',jMODE_SIGN ; signature D20C 415226 17039 cbeqa #'R',MODE_R ; Added for enhanced stuff was "a" 17040 ; now "R" for Megatunix compatabilty D20F 415818 17041 cbeqa #'X',jMODE_X ; Chunk write D212 415418 17042 cbeqa #'T',jMODE_T ; Text version D215 CCD2AD 17043 jmp DONE_RCV 17044 D218 CCD155 17045 jMODE_B: jmp MODE_B D21B CCD279 17046 jMODE_W: jmp MODE_W D21E CCD285 17047 jMODE_Q: jmp MODE_Q D221 CCD297 17048 jMODE_P: jmp MODE_P D224 CCD2AF 17049 jMODE_BOOT: jmp MODE_BOOT D227 CCD29E 17050 jMODE_SIGN: jmp MODE_SIGN D22A CCD27E 17051 jMODE_X: jmp MODE_X D22D CCD28E 17052 jMODE_T: jmp MODE_T 17053 17054 MODE_A: ; Big A D230 6E1689 17055 mov #$16,txgoal ; B&G mode ($17) For Megaview use D233 2005 17056 bra MODE_AA_cont 17057 17058 MODE_R: ; Big R D235 1D69 17059 bclr mv_mode,EnhancedBits2 ; clear MegaView mode to allow 17060 ; enhanced comms 17061 ; mov #39T,txgoal ; was 32T in 021, was 36T in 021u, 17062 ; sph need extra byte for 0.001 in megatune... D237 6E2A89 17063 mov #42T,txgoal ; was 32T in 021, was 36T in 021u, 17064 ; 38T from 021x1 onwards, 023b2:39T 17065 ; 41 for HR code 42 for Load HR11 17066 ; mov #47T,txgoal ; added another 8 bytes for debug 17067 17068 MODE_AA_cont: 17069 ;not here - only save when about to send 17070 ; mov iTimeL,cTimeCommL ; Copy cycle time to comm area 17071 ; mov iTimeH,cTimeCommH ; otherwise it might get out of 17072 ; sync during communication D23A 3F88 17073 clr txcnt ; Send back all real-time variables D23C A601 17074 lda #$01 D23E 2067 17075 bra EN_XMIT 17076 17077 MODE_C: D240 3F88 17078 clr txcnt ; Just send back SECL variable to 17079 ; test comm port D242 6E0189 17080 mov #$1,txgoal D245 A601 17081 lda #$01 D247 205E 17082 bra EN_XMIT 17083 17084 MODE_V: D249 3F88 17085 clr txcnt D24B 0C6924 17086 brset mv_mode,EnhancedBits2,MODE_V_MV D24E 6EBD89 17087 mov #PAGESIZE,txgoal ; no. of bytes to send back 17088 ; (was $7e) was 201 now 213 17089 ; for 12x12 NOW 201 again:-) D251 C60102 17090 lda page D254 41F00F 17091 cbeqa #$F0,MODE_V_F0 D257 41F110 17092 cbeqa #$F1,MODE_V_F1 17093 ;ensure trigger/tooth loggers OFF D25A 156C 17094 bclr toothlog,EnhancedBits5 D25C 176C 17095 bclr triglog,EnhancedBits5 D25E 41F20D 17096 cbeqa #$F2,MODE_V_F23 D261 41F30A 17097 cbeqa #$F3,MODE_V_F23 D264 200F 17098 bra MODE_V2 msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 140 MC68HC908GP32 User Bootloader 17099 MODE_V_F0: D266 156C 17100 bclr toothlog,EnhancedBits5 D268 200B 17101 bra MODE_V2 17102 MODE_V_F1: D26A 176C 17103 bclr triglog,EnhancedBits5 D26C 2007 17104 bra MODE_V2 17105 MODE_V_F23: D26E 3F89 17106 clr txgoal ; send back all 256 bytes (perhaps) D270 2003 17107 bra MODE_V2 17108 MODE_V_MV: D272 6E7D89 17109 mov #$7D,txgoal 17110 MODE_V2: D275 A603 17111 lda #$03 D277 202E 17112 bra EN_XMIT 17113 MODE_W: D279 6E058A 17114 mov #$05,txmode D27C 202F 17115 bra DONE_RCV 17116 17117 MODE_X: D27E 1D69 17118 bclr mv_mode,EnhancedBits2 ; clear MegaView mode to allow 17119 ; enhanced comms D280 6E078A 17120 mov #$07,txmode D283 2028 17121 bra DONE_RCV 17122 17123 MODE_Q: D285 3F88 17124 clr txcnt ; Just send back SECL variable 17125 ; to test comm port D287 6E0189 17126 mov #$1,txgoal D28A A605 17127 lda #$05 D28C 2019 17128 bra EN_XMIT 17129 17130 MODE_T: D28E 3F88 17131 clr txcnt D290 6E2089 17132 mov #$20,txgoal ; Send 32 Chars of Text version D293 A60E 17133 lda #$0E ; TXMode = sending format string D295 2010 17134 bra EN_XMIT 17135 17136 MODE_P: D297 1D69 17137 bclr mv_mode,EnhancedBits2 ; clear MegaView mode to allow 17138 ; enhanced comms D299 6E0C8A 17139 mov #$0C,txmode ; txmode = getting page number D29C 200F 17140 bra DONE_RCV 17141 17142 MODE_SIGN: ; Send Signature text - DJLH D29E 1D69 17143 bclr mv_mode,EnhancedBits2 ; clear MegaView mode to allow 17144 ; enhanced comms D2A0 3F88 17145 clr txcnt D2A2 6E2089 17146 mov #$20,txgoal ; Send 32 Chars of Signature D2A5 A604 17147 lda #$04 ; TXMode = sending signature 17148 EN_XMIT: D2A7 B78A 17149 sta txmode D2A9 1614 17150 bset TE,SCC2 ; Enable Transmit D2AB 1E14 17151 bset SCTIE,SCC2 ; Enable transmit interrupt 17152 17153 DONE_RCV: D2AD 8A 17154 pulh D2AE 80 17155 rti 17156 17157 MODE_BOOT: D2AF B68A 17158 lda txmode D2B1 A10A 17159 cmp #$0A D2B3 2705 17160 beq jBootLoad D2B5 6E0A8A 17161 mov #$0A,txmode D2B8 20F3 17162 bra DONE_RCV 17163 jBootLoad: D2BA CCD3CD 17164 jmp BootLoad 17165 17166 CONF_ERR: D2BD 5596 17167 ldhx tmp5 ; tmp5,6 contain absolute 17168 ; address of data D2BF F6 17169 lda ,x D2C0 2605 17170 bne conf_err2 ; zero is string terminator D2C2 3F8A 17171 clr txmode D2C4 CCD3C5 17172 jmp FIN_TX 17173 conf_err2: D2C7 B718 17174 sta SCDR ; Send char D2C9 AF01 17175 aix #1 D2CB 3596 17176 sthx tmp5 D2CD CCD3CB 17177 jmp DONE_BYTE 17178 17179 tx_done: 17180 ;we get here after we've sent the last byte D2D0 1714 17181 bclr TE,SCC2 ; Disable Transmit D2D2 1F14 17182 bclr SCTIE,SCC2 ; Disable transmit interrupt D2D4 8A 17183 pulh D2D5 80 17184 rti 17185 D2D6 CCD3AD 17186 jIN_SIGN_MODE: jmp IN_SIGN_MODE D2D9 CCD3B2 17187 jIN_T_MODE: jmp IN_T_MODE D2DC CCD38A 17188 jIN_V_MODE: jmp IN_V_MODE 17189 *** Transmit Character Interrupt Handler *************** 17190 IN_SCI_TX: D2DF 8B 17191 pshh D2E0 B616 17192 lda SCS1 ; Clear the SCRF bit by reading 17193 ; this register D2E2 8C 17194 clrh D2E3 BE88 17195 ldx txcnt D2E5 B68A 17196 lda txmode D2E7 27E7 17197 beq tx_done D2E9 410574 17198 cbeqa #$05,IN_Q_MODEJMP D2EC 4104E7 17199 cbeqa #$04,jIN_SIGN_MODE ; see above D2EF 410DCB 17200 cbeqa #$0D,CONF_ERR ; see above D2F2 410EE4 17201 cbeqa #$0E,jIN_T_MODE ; see above D2F5 A101 17202 cmp #$01 D2F7 2622 17203 bne IN_V_MODEjmp 17204 IN_A_OR_C_MODE: 17205 ;check for iTime sending. Now send three bytes but don't waste extra byte, only store two D2F9 A318 17206 cpx #24T ;sph for 0.001mt D2FB 260B 17207 bne ac_chk41 D2FD B6AD 17208 lda iTimeH D2FF 4EAE59 17209 mov iTimeL,cTimeCommL ; Copy cycle time to comm area D302 4EAC58 17210 mov iTimeX,cTimeCommH ; otherwise it might get out of D305 CCD3BA 17211 jmp CONT_TX ; sync during communication 17212 ac_chk41: D308 A329 17213 cpx #41T;sph for 0.001mt 17214 D30A 2606 17215 bne ac_chk40 D30C C60110 17216 lda engineLoad D30F CCD3BA 17217 jmp CONT_TX 17218 17219 ac_chk40: D312 A328 17220 cpx #40T;sph for 0.001mt 17221 D314 2607 17222 bne ac_chk39 D316 B6CC 17223 lda bcDC D318 CCD3BA 17224 jmp CONT_TX 17225 17226 IN_V_MODEjmp: D31B 206D 17227 bra IN_V_MODE 17228 17229 ac_chk39: D31D A327 17230 cpx #39T;sph for 0.001mt 17231 ; bhi R_otherbytes D31F 2605 17232 bne ac_chk38 D321 B658 17233 lda cTimeCommH ; actually holds iTimeX D323 CCD3BA 17234 jmp CONT_TX msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 141 MC68HC908GP32 User Bootloader 17235 17236 ;R_otherbytes: 17237 ; lda dwelldelay1-38T,X ; send dwell delays, may get data corruption 17238 ; bra CONT_TX 17239 ac_chk38: D326 A326 17240 cpx #38T;sph for 0.001mt D328 2605 17241 bne NotTPSLAst_Yet D32A B6CE 17242 lda TPSlast D32C CCD3BA 17243 jmp CONT_TX 17244 17245 NotTPSLAst_Yet: D32F A325 17246 cpx #37T;sph for 0.001mt 17247 D331 2605 17248 bne inac_cont D333 95 17249 tsx ; send stack D334 9F 17250 txa D335 CCD3BA 17251 jmp CONT_TX 17252 inac_cont: D338 A320 17253 cpx #32T;sph for 0.001mt D33A 223E 17254 bhi send_ports 17255 17256 ;Added for MV compatability with 300 & 400KPa MAP sensors D33C A304 17257 cpx #04T ; Are we about to send the MAP value? D33E 2636 17258 bne Send_Data_Normal ; No so carry on as normal D340 0D6933 17259 brclr mv_mode,EnhancedBits2,Send_Data_Normal ; Yes so are we in 17260 ; MV mode? 17261 D343 C6E1B6 17262 lda config11_f1 D346 A403 17263 and #$03 D348 410205 17264 cbeqa #2T,kpa300_reading D34B 410314 17265 cbeqa #3T,kpa400_reading D34E 2026 17266 bra send_data_normal 17267 17268 kpa300_reading: 17269 ; If we are here we are using a 300KPa sensor and we have a MV connected, 17270 ; so send 86% of the raw map value to MV so it converts it correctly D350 B6C9 17271 lda kpa D352 A1D9 17272 cmp #217T D354 221C 17273 bhi Load_Max_Map ; If raw map > 217 then we are 17274 ; above 255KPa, thats the limit in MV D356 97 17275 tax D357 A6DB 17276 lda #219T ; 86% = 219 in 255 bytes D359 42 17277 mul D35A 9F 17278 txa D35B 2417 17279 bcc Send_Fudged_Data D35D 4C 17280 inca D35E 2014 17281 bra Send_Fudged_Data 17282 17283 IN_Q_MODEJMP: D360 2055 17284 bra IN_Q_MODE 17285 17286 ; If we get here we are using a 400KPa sensor and we have a MV connected, 17287 ; so send 63% of the raw map value to MV 17288 KPa400_Reading: D362 B6C9 17289 lda kpa D364 A19F 17290 cmp #159T D366 220A 17291 bhi Load_Max_Map ; If raw map > 159 then we are 17292 ; above 255KPa, the limit in MV D368 97 17293 tax D369 A6A0 17294 lda #160T D36B 42 17295 mul D36C 9F 17296 txa D36D 2405 17297 bcc Send_Fudged_Data D36F 4C 17298 inca D370 2002 17299 bra Send_Fudged_Data 17300 17301 Load_Max_Map: D372 A6FF 17302 lda #255T ; Load in KPa limit 17303 Send_Fudged_Data: D374 2044 17304 bra CONT_TX 17305 17306 17307 Send_Data_Normal: D376 E640 17308 lda secl,X D378 2040 17309 bra CONT_TX 17310 send_ports: D37A 9F 17311 txa 17312 ;sub #31T D37B A021 17313 sub #33T;sph for 0.001mt D37D 97 17314 tax D37E F6 17315 lda porta,X ; load porta,b,c,d 31=a, 34=d D37F A302 17316 cpx #2 D381 2637 17317 bne CONT_TX D383 0F6634 17318 brclr config_error,feature2,CONT_TX D386 AA80 17319 ora #128T ; set top bit in portc if config error D388 2030 17320 bra CONT_TX 17321 IN_V_MODE D38A C60102 17322 lda page D38D 41F20E 17323 cbeqa #$F2,V_f2 D390 41F315 17324 cbeqa #$F3,V_f3 D393 0C6905 17325 brset mv_mode,EnhancedBits2,IN_V_MV D396 D60114 17326 lda ve_r,x ; get data from RAM (must have 17327 ; loaded a page first) D399 201F 17328 bra CONT_TX 17329 IN_V_MV: D39B CCD468 17330 jmp MV_V_EMUL 17331 V_f2: D39E A340 17332 cpx #$40 D3A0 2503 17333 blo V_f2zero D3A2 F6 17334 lda 0,x D3A3 2015 17335 bra CONT_TX 17336 V_f2zero: D3A5 4F 17337 clra D3A6 2012 17338 bra CONT_TX 17339 V_f3: D3A8 D60100 17340 lda $0100,x D3AB 200D 17341 bra CONT_TX 17342 IN_SIGN_MODE: D3AD D6DE20 17343 lda SIGNATURE,x D3B0 2008 17344 bra CONT_TX 17345 IN_T_MODE: D3B2 D6DE00 17346 lda textversion_f,x D3B5 2003 17347 bra CONT_TX 17348 IN_Q_MODE: D3B7 D6DDFF 17349 lda REVNUM,X 17350 17351 CONT_TX: D3BA B718 17352 sta SCDR ; Send char D3BC B688 17353 lda txcnt D3BE 4C 17354 inca ; Increase number of chars sent D3BF B788 17355 sta txcnt D3C1 B189 17356 cmp txgoal ; Check if done D3C3 2606 17357 bne DONE_BYTE ; Branch if NOT finished to DONE_BYTE 17358 17359 FIN_TX: D3C5 3F88 17360 clr txcnt D3C7 3F89 17361 clr txgoal D3C9 3F8A 17362 clr txmode 17363 17364 ; do these on next entry with TXMODE=0 17365 ; bclr TE,SCC2 ; Disable Transmit 17366 ; bclr SCTIE,SCC2 ; Disable transmit interrupt 17367 17368 DONE_BYTE: D3CB 8A 17369 pulh D3CC 80 17370 rti msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 142 MC68HC908GP32 User Bootloader 17371 17372 BootLoad: D3CD 121D 17373 bset IMASK,INTSCR ; disable interrupts for IRQ 17374 ; (the ignition i/p) 17375 17376 ; that should be enough to stop the engine and then keep it stalled 17377 ; I wouldn't recommend updating the flash with a running engine anyway 17378 ; stop timers, disable interrupts D3CF 1A20 17379 bset TSTOP,T1SC D3D1 1D20 17380 bclr TOIE,T1SC D3D3 1A2B 17381 bset TSTOP,T2SC D3D5 1D2B 17382 bclr TOIE,T2SC 17383 17384 ; switch off inj1 D3D7 4E0025 17385 mov ClrOCstateHR,T1SC0 ;sph turn off INJ1 for HR 17386 ;(inverted drive) D3DA 1741 17387 bclr firing1,squirt D3DC 1541 17388 bclr sched1,squirt D3DE 1141 17389 bclr inj1,squirt 17390 17391 ; switch off inj2 D3E0 4E0028 17392 mov ClrOCstateHR,T1SC1 ;sph turn off INJ2 17393 ; (inverted drive) D3E3 1B41 17394 bclr firing2,squirt D3E5 1941 17395 bclr sched2,squirt D3E7 1341 17396 bclr inj2,squirt 17397 D3E9 3F42 17398 clr engine ; Engine is stalled, clear all 17399 ; in engine settings D3EB 1100 17400 bclr fuelp,porta ; Turn off fuel pump D3ED 3F70 17401 clr rpmch D3EF 3F71 17402 clr rpmcl D3F1 4F 17403 clra 17404 ; sph for hi-res 17405 ; removed pwuse kg D3F2 B74E 17406 sta pwcalch D3F4 B74F 17407 sta pwcalcl D3F6 B754 17408 sta pwcalc2h D3F8 B755 17409 sta pwcalc2l 17410 ; sta pw1 ;sph 17411 ; clr pw1 ; zero out pulsewidths 17412 ; clr pw2 D3FA 3F4D 17413 clr rpm 17414 17415 ; turn spark outputs to inactive to avoid burning out coil. This will 17416 ; cause coils to fire, but that in unavoidable. A "non-inverted" output 17417 ; charges coil when signal from board is high i.e. the output pin is low. 17418 ; So to make inactive set these pins high 17419 ; if inverted set low 17420 D3FC macro 17421 TurnAllSpkOff ; macro to turn off all spark outputs D3FC 0D6B10 17422 BRCLR INVSPK,ENHANCEDBITS4,SOIN D3FF 1300 17423 BCLR IASC,PORTA D401 1102 17424 BCLR SLED,PORTC D403 1502 17425 BCLR WLED,PORTC D405 1302 17426 BCLR ALED,PORTC D407 1103 17427 BCLR OUTPUT3,PORTD D409 1702 17428 BCLR PIN10,PORTC D40B 1503 17429 BCLR KNOCKIN,PORTD D40D 203E 17430 BRA SOIN_DONE 17431 SOIN: D40F 006404 17432 BRSET REUSE_FIDLE,OUTPUTPINS,SOIN1 D412 1300 17433 BCLR IASC,PORTA D414 2002 17434 BRA SOIN2 D416 1200 17435 SOIN1: BSET IASC,PORTA D418 026404 17436 SOIN2: BRSET REUSE_LED17,OUTPUTPINS,SOIN3 D41B 1102 17437 BCLR SLED,PORTC D41D 2002 17438 BRA SOIN4 D41F 1002 17439 SOIN3: BSET SLED,PORTC D421 086404 17440 SOIN4: BRSET REUSE_LED19,OUTPUTPINS,SOIN5 D424 1302 17441 BCLR ALED,PORTC D426 2002 17442 BRA SOIN6 D428 1202 17443 SOIN5: BSET ALED,PORTC D42A 056407 17444 SOIN6: BRCLR REUSE_LED18,OUTPUTPINS,SOIN7 D42D 076404 17445 BRCLR REUSE_LED18_2,OUTPUTPINS,SOIN7 D430 1402 17446 BSET WLED,PORTC D432 2002 17447 BRA SOIN8 D434 1502 17448 SOIN7: BCLR WLED,PORTC 17449 SOIN8: D436 096602 17450 BRCLR OUT3SPARKD,FEATURE2,SOIN9 D439 1003 17451 BSET OUTPUT3,PORTD 17452 SOIN9: D43B C6E074 17453 LDA FEATURE8_F D43E A508 17454 BIT #SPKEOPB D440 2702 17455 BEQ SOIN10 D442 1602 17456 BSET PIN10,PORTC 17457 SOIN10: D444 C6E074 17458 LDA FEATURE8_F D447 A510 17459 BIT #SPKFOPB D449 2702 17460 BEQ SOIN11 D44B 1403 17461 BSET KNOCKIN,PORTD 17462 SOIN11: 17463 SOIN_DONE: D44D 3FB1 17464 CLR SPARKONLEFTAH D44F 3FB2 17465 CLR SPARKONLEFTAL D451 3FB3 17466 CLR SPARKONLEFTBH D453 3FB4 17467 CLR SPARKONLEFTBL D455 3FB5 17468 CLR SPARKONLEFTCH D457 3FB6 17469 CLR SPARKONLEFTCL D459 3FB7 17470 CLR SPARKONLEFTDH D45B 3FB8 17471 CLR SPARKONLEFTDL D45D 3FB9 17472 CLR SPARKONLEFTEH D45F 3FBA 17473 CLR SPARKONLEFTEL D461 3FBB 17474 CLR SPARKONLEFTFH D463 3FBC 17475 CLR SPARKONLEFTFL 17476 D465 CCFB59 17477 jmp BootReset1 17478 17479 MV_V_EMUL: 17480 ; we are in Megaview mode. Ideally we'd like to return a B&G 17481 ;style view of our data D468 A374 17482 cpx #116T D46A 250A 17483 blo V_MV2 D46C 9F 17484 txa ; need to return config11,12,13 17485 ; to get correct map reading D46D AB58 17486 add #88T ; B&G byte 116 is at 204 in this code D46F 97 17487 tax D470 D6E1B6 17488 lda config11_f1,x D473 CCD3BA 17489 jmp CONT_TX 17490 V_MV2: D476 4F 17491 clra ; for now, return zero. D477 CCD3BA 17492 jmp CONT_TX 17493 17494 TXMODE_C: D47A B618 17495 lda SCDR ; expect 0 to 7 or $F0 or $F1 D47C C10102 17496 cmp page ; check if already loaded D47F 2748 17497 beq DONE_LOAD D481 41F02F 17498 cbeqa #$F0,toothl_F0 D484 41F130 17499 cbeqa #$F1,toothl_F1 D487 41F224 17500 cbeqa #$F2,okpage D48A 41F321 17501 cbeqa #$F3,okpage D48D 156C 17502 bclr toothlog,EnhancedBits5 ; ensure tooth logger is off D48F 176C 17503 bclr triglog,EnhancedBits5 ; ensure tooth logger is off D491 A10A 17504 cmp #10T ; only 0-8 used in code at present D493 2234 17505 bhi DONE_LOAD D495 5F 17506 clrx msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 143 MC68HC908GP32 User Bootloader D496 C70102 17507 sta page D499 ABE0 17508 add #$E0 ; hardcoded high byte of page 17509 ; area $Ex00 D49B 87 17510 psha D49C 8A 17511 pulh D49D 1B14 17512 bclr SCRIE,SCC2 ; turn off receive interrupt so 17513 ; don't re-enter D49F 9A 17514 cli ; re-enable interrupts to reduce 17515 ; stumble when MT changes page 17516 load_table: D4A0 F6 17517 lda 0,x ; h:x D4A1 8B 17518 pshh D4A2 8C 17519 clrh D4A3 D70114 17520 sta VE_r,x ; dump into RAM. Bit of a kludge, 17521 ; want h=0 D4A6 8A 17522 pulh D4A7 5C 17523 incx D4A8 A3BE 17524 cpx #PAGESIZE+1 ; copy 256 bytes 17525 ; reduced to 200 17526 ; Increased to 212 for 12x12 17527 ; Back to 200 now for 022+ D4AA 26F4 17528 bne load_table D4AC 201B 17529 bra DONE_LOAD 17530 okpage: D4AE C70102 17531 sta page D4B1 2016 17532 bra DONE_LOAD 17533 toothl_F0: D4B3 146C 17534 bset toothlog,EnhancedBits5 D4B5 2002 17535 bra tooth_log_setup 17536 toothl_F1: D4B7 166C 17537 bset triglog,EnhancedBits5 17538 tooth_log_setup: D4B9 C70102 17539 sta page D4BC 1B14 17540 bclr SCRIE,SCC2 D4BE 4F 17541 clra D4BF 5F 17542 clrx D4C0 8C 17543 clrh 17544 clear_table: D4C1 D70114 17545 sta VE_r,x ; dump into RAM. Bit of a kludge, D4C4 5C 17546 incx D4C5 A3BE 17547 cpx #PAGESIZE+1 ; clear PAGESIZE bytes D4C7 26F8 17548 bne clear_table 17549 17550 ;bytes VE_r+0 - VE_r+197 = data, VE_r+198 = counter 17551 17552 DONE_LOAD: D4C9 1A14 17553 bset SCRIE,SCC2 ; re-enable receive interrupt D4CB 3F8A 17554 clr txmode D4CD 8A 17555 pulh ; (same as DONE_RECV) D4CE 80 17556 rti 17557 17558 *************************************************************************** 17559 ** 17560 ** Timer 2 overflow, extends hardware timer with an extra byte in software 17561 ** 17562 *************************************************************************** 17563 T2overflow: D4CF B62B 17564 lda T2SC ; Read interrupt D4D1 1F2B 17565 bclr TOF,T2SC ; Reset interrupt D4D3 3CA8 17566 inc T2CNTX ; increment software byte D4D5 116B 17567 bclr roll1,EnhancedBits4 ; clear the roll-over detect bits D4D7 136B 17568 bclr roll2,EnhancedBits4 D4D9 80 17569 rti 17570 17571 *************************************************************************** 17572 ** 17573 ** Injector Interrupt routines - sph 17574 ** 17575 *************************************************************************** 17576 ;These IRQs trigger after the T1CHx timer has 'matched' the required PW 17577 ;Used to turn off injection LEDs and turn off injection scheduling 17578 ;The injector is turned off by the timer channel itself 17579 INJ1_Done: D4DA 8B 17580 pshh ;do we use H? D4DB B625 17581 lda T1SC0 ; ack the interrupt D4DD 1F25 17582 bclr CHxF,T1SC0 ; clear pending bit 17583 ; bclr CHxIE,T1SCO ; disable the interrupt D4DF 1741 17584 bclr firing1,squirt D4E1 1541 17585 bclr sched1,squirt D4E3 1141 17586 bclr inj1,squirt 17587 ;kg attempt to clear ghost PW D4E5 004204 17588 brset running,engine,jump_over1 D4E8 3F4F 17589 clr pwcalcl D4EA 3F4E 17590 clr pwcalch 17591 jump_over1: D4EC 8A 17592 pulh D4ED 80 17593 rti 17594 17595 INJ2_Done: D4EE 8B 17596 pshh D4EF B628 17597 lda T1SC1 ; ack the interrupt D4F1 1F28 17598 bclr CHxF,T1SC1 ; clear pending bit 17599 ; bclr CHxIE,T1SC1 ; disable the interrupt D4F3 1B41 17600 bclr firing2,squirt D4F5 1941 17601 bclr sched2,squirt D4F7 1341 17602 bclr inj2,squirt 17603 ;kg attempt to clear ghost PW D4F9 004204 17604 brset running,engine,jump_over2 D4FC 3F55 17605 clr pwcalc2l D4FE 3F54 17606 clr pwcalc2h 17607 jump_over2: D500 8A 17608 pulh D501 80 17609 rti 17610 17611 *************************************************************************** 17612 ** 17613 ** Dummy ISR - just performs RTI 17614 ** 17615 *************************************************************************** 17616 Dummy: ; Dummy vector - there just to 17617 ; keep the assembler happy D502 80 17618 rti 17619 17620 *************************************************************************** 17621 ** 17622 ** Various functions/subroutines Follow 17623 ** 17624 ** - Ordered Table Search 17625 ** - Linear Interpolation 17626 ** - 32 x 16 divide 17627 *************************************************************************** 17628 17629 17630 *************************************************************************** 17631 ** 17632 ** Ordered Table Search 17633 ** 17634 ** X is pointing to the start of the first value in the table 17635 ** tmp1:2 initially hold the start of table address, then they hold the bound values 17636 ** tmp3 is the end of the table (nelements - 1) 17637 ** tmp4 is the comparison value 17638 ** tmp5 is the index result - if zero then comp value is less than beginning of table, and 17639 ** if equal to nelements then it is rail-ed at upper end 17640 ** 17641 *************************************************************************** 17642 tablelookup: msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 144 MC68HC908GP32 User Bootloader D503 3F96 17643 clr tmp5 D505 5592 17644 ldhx tmp1 D507 F6 17645 lda ,x 17646 ; sta tmp1 D508 B793 17647 sta tmp2 17648 ; cmp tmp4 17649 ; bhi GOT_ORD_NUM 17650 REENT: D50A 5C 17651 incx D50B 3C96 17652 inc tmp5 D50D 4E9392 17653 mov tmp2,tmp1 D510 F6 17654 lda ,x D511 B793 17655 sta tmp2 17656 D513 B195 17657 cmp tmp4 D515 2206 17658 bhi GOT_ORD_NUM D517 B696 17659 lda tmp5 D519 B194 17660 cmp tmp3 D51B 26ED 17661 bne REENT 17662 17663 ; inc tmp5 17664 ; mov tmp2,tmp1 17665 GOT_ORD_NUM: D51D 81 17666 rts 17667 17668 *************************************************************************** 17669 ** 17670 ** Linear Interpolation - 2D 17671 ** 17672 ** (y2 - y1) 17673 ** Y = Y1 + --------- * (x - x1) 17674 ** (x2 - x1) 17675 ** 17676 ** tmp1 = x1 17677 ** tmp2 = x2 17678 ** tmp3 = y1 17679 ** tmp4 = y2 17680 ** tmp5 = x 17681 ** tmp6 = y 17682 *************************************************************************** 17683 LININTERP: D51E 3F98 17684 clr tmp7 ; This is the negative slope 17685 ; detection bit D520 4E9497 17686 mov tmp3,tmp6 17687 CHECK_LESS_THAN: D523 B696 17688 lda tmp5 D525 B192 17689 cmp tmp1 D527 2202 17690 bhi CHECK_GREATER_THAN D529 2044 17691 bra DONE_WITH_INTERP 17692 CHECK_GREATER_THAN: D52B B696 17693 lda tmp5 D52D B193 17694 cmp tmp2 D52F 2505 17695 blo DO_INTERP D531 4E9597 17696 mov tmp4,tmp6 D534 2039 17697 bra DONE_WITH_INTERP 17698 17699 DO_INTERP: D536 4E9497 17700 mov tmp3,tmp6 D539 B693 17701 lda tmp2 D53B B092 17702 sub tmp1 D53D 2730 17703 beq DONE_WITH_INTERP D53F 87 17704 psha D540 B695 17705 lda tmp4 D542 B094 17706 sub tmp3 D544 2403 17707 bcc POSINTERP D546 40 17708 nega D547 3C98 17709 inc tmp7 17710 POSINTERP: D549 87 17711 psha D54A B696 17712 lda tmp5 D54C B092 17713 sub tmp1 D54E 271D 17714 beq ZERO_SLOPE D550 88 17715 pulx D551 42 17716 mul D552 89 17717 pshx D553 8A 17718 pulh D554 88 17719 pulx 17720 D555 52 17721 div 17722 D556 87 17723 psha D557 B698 17724 lda tmp7 D559 2607 17725 bne NEG_SLOPE D55B 86 17726 pula D55C BB94 17727 add tmp3 D55E B797 17728 sta tmp6 D560 200D 17729 bra DONE_WITH_INTERP 17730 NEG_SLOPE: D562 86 17731 pula D563 B798 17732 sta tmp7 D565 B694 17733 lda tmp3 D567 B098 17734 sub tmp7 D569 B797 17735 sta tmp6 D56B 2002 17736 bra DONE_WITH_INTERP 17737 ZERO_SLOPE: D56D 86 17738 pula ;clean stack D56E 86 17739 pula ;clean stack 17740 DONE_WITH_INTERP: D56F 81 17741 rts 17742 17743 17744 ******************************************************************************** 17745 ** Multiply then divide. 17746 ******************************************************************************** 17747 17748 uMulAndDiv: 17749 17750 ******************************************************************************** 17751 ** 8 x 16 Multiply 17752 ** 17753 ** 8-bit value in Accumulator, 16-bit value in tmp11-12, result overwrites 17754 ** 16-bit input. Assumes result cannot overflow. 17755 ******************************************************************************** 17756 17757 uMul16: D570 87 17758 psha ; Save multiplier. D571 BE9C 17759 ldx tmp11 ; LSB of multiplicand. D573 42 17760 mul D574 B79C 17761 sta tmp11 ; LSB of result stored. D576 86 17762 pula ; Pop off multiplier. D577 89 17763 pshx ; Carry on stack. D578 BE9D 17764 ldx tmp12 ; MSB of multiplicand. D57A 42 17765 mul D57B 9EEB01 17766 add 1,SP ; Add in carry from LSB. D57E B79D 17767 sta tmp12 ; MSB of result. D580 86 17768 pula ; Clear the stack. 17769 17770 ******************************************************************************** 17771 ** 16-bit divide by 100T 17772 ** 17773 ** 16-bit value in tmp11-12 is divided by 100T. Result is left in tmp11-12. 17774 ******************************************************************************** 17775 17776 uDivBy100: D581 8C 17777 clrh D582 B69D 17778 lda tmp12 ; MSB of dividend. msns-extra.asm Assembled with CASMW 11/16/2008 9:48:06 AM PAGE 145 MC68HC908GP32 User Bootloader D584 AE64 17779 ldx #100T ; Divisor. D586 52 17780 div D587 B79D 17781 sta tmp12 ; MSB of quotient. D589 B69C 17782 lda tmp11 ; LSB of dividend. D58B 52 17783 div D58C B79C 17784 sta tmp11 ; LSB of quotient. 17785 17786 ; See if we need to round up the quotient. D58E 8B 17787 pshh D58F 86 17788 pula ; Remainder in A. D590 A132 17789 cmp #50T ; Half of the divisor. D592 9306 17790 ble uDivRoundingDone D594 3C9C 17791 inc tmp11 D596 2402 17792 bcc uDivRoundingDone D598 3C9D 17793 inc tmp12 17794 uDivRoundingDone: D59A 81 17795 rts 17796 17797 ******************************************************************************** 17798 ******************************************************************************** 17799 * uses tmp1 - tmp 11 17800 * 32 / 16